DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over HARASHIMA et al (TW 1744745) in view of KIM et al. (US PUB. 2019/0221557).
Regarding claim 11, HARASHIMA teaches a non-volatile memory device comprising:
a first semiconductor chip comprising:
gate electrodes (52-54) each extending in a first direction and stacked in a second direction (Fig. 4-Fig. 6);
channel structures MP extending from a first region in the second direction (Fig. 6);
cell contact plugs each coupled to the gate electrodes in a second region (see Fig. 6 below);
a first upper bonding pad (note the first upper bonding pad in Fig. 6 below); and
a second upper bonding pad (note the second upper bonding pad in Fig. 6 below); and
a second semiconductor chip 200 comprising:
a first lower bonding pad (note the first lower bonding pad in Fig. 6 below);
a second lower bonding pad (note the second lower bonding pads in Fig. 6 below);
a first peripheral circuit element overlapping the channel structures (see Fig. 6 below and note the annotations); and
a second peripheral circuit element overlapping the cell contact plugs (see Fig. 6 below and note the annotations), wherein a first cell contact plug (e.g. CP1) of the cell contact plugs is coupled to the first peripheral circuit element through the first upper bonding pad and the first lower bonding pad (see Fig. 6), and
wherein a second cell contact plug of the cell contact plugs is coupled to the second peripheral circuit element through the second upper bonding pad and the second lower bonding pad (see Fig. 6 below), and
wherein at least one of the first upper bonding pad and the first lower bonding pad extends in the first direction in the first region (10,20) and the second region 30 (Fig. 6).
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HARASHIMA is silent on wherein the second upper bonding pad and the second lower bonding pad have a first width in the first direction, and wherein at least one of the first upper bonding pad and the first lower bonding pad has a second width in the first direction greater than the first width.
However, KIM teaches in Fig. Fig. 28, wherein the second upper bonding pad and the second lower bonding pad have a first width in the first direction, and wherein at least one of the first upper bonding pad and the first lower bonding pad has a second width in the first direction greater than the first width (note the upper and lower bonding pads (1792 & 2792) in Fig. 28 and wherein a first upper bonding pad and a first lower bonding pad have a width greater than the width of a second upper bonding pad and a second lower bonding pad). This has the advantage of offering an alternative design choice to employ bonding bads of varying width to provide stable electrical connections and accommodate other device components. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of HARASHIMA with the bonding pads of different width, as taught by KIM, so as to employ an alternative design choice to provide improved electrical connections and accommodate other device components.
Regarding claim 12, the combination of HARASHIMA and KIM teaches the non-volatile memory device of claim 11, wherein the gate electrodes (52-54) comprises a string selection line SGD, word lines WL, and a ground selection line SGS, wherein the first cell contact plug is coupled to the string selection line, and wherein the second cell contact plug is in the first direction to a word line of the word lines and the ground selection line (Fig. 4-Fig. 6 and associated texts).
Regarding claim 13, the combination of HARASHIMA and KIM teaches the non-volatile memory device of claim 11, wherein the first semiconductor chip 300 further comprises a third upper bonding pad having the second width in the first direction, wherein the second semiconductor chip further comprises a third lower bonding pad and a third peripheral circuit element overlapping the cell contact plugs, and wherein a third cell contact plug of the cell contact plugs is coupled to the third peripheral circuit element through the third upper bonding pad and the third lower bonding pad (Fig. 6 below and note the annotations).
Allowable Subject Matter
Claims 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 1-10 are allowed.
Response to Arguments
Applicant’s arguments, filed on 12/02/2025, with respect to claim 1 have been fully considered and are persuasive. As such, claim 1 and the associated dependent claims are allowed. However, the combination of prior art continues to read on claims 11-13 as addressed in the rejection above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOR KARIMY whose telephone number is (571)272-9006. The examiner can normally be reached Monday - Friday: 8:30 AM -5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TIMOR KARIMY/Primary Examiner, Art Unit 2818
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