Prosecution Insights
Last updated: August 17, 2026
Application No. 18/096,174

THIN SYSTEM-IN-PACKAGE WITH SHIELDED STEPPED MOLD

Final Rejection §103
Filed
Jan 12, 2023
Examiner
FAN, SU JYA
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Apple Inc.
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
716 granted / 946 resolved
+7.7% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
36 currently pending
Career history
1002
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
50.5%
+10.5% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 946 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Response to Amendment The following office action is in response to the amendment and remarks filed on 5/12/26. Applicant’s amendment to claims 1, 12, 14, 19 is acknowledged. Applicant’s cancellation of claims 4, 5, 16 and 18 is acknowledged. Applicant’s addition of new claims 24 is acknowledged. Claims 1-3, 6-15, 17 and 19-24 are pending and subject to examination at this time. Response to Arguments Applicant's arguments with respect to claim 19 have been considered but are moot in view of the new ground(s) of rejection. Allowable Subject Matter Claims 1-3, 6-15, 17 and 21 are allowed. Claim 24 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al., US Publication No. 2023/0146085 in view of Lee et al. US Publication No. 2021/0289629 A1. Kang teaches: 19. A system-in-package, comprising (see fig. 1): a stepped mold (161+130; e.g. The mold has right angles that form stepped surfaces so under broadest reasonable interpretation, it is a stepped mold.); a multi-layer board (e.g. attached to 191; see Remarks below); an insulation film substrate (111+113; e.g. see substrate annotated in fig. 1 below) connected to the multi-layer board via a first plurality of connectors (191); at least one processor die (141) integrated into the stepped mold and stacked onto the insulation film substrate via a second plurality of connectors (151); and a passive element (e.g. 121 on the right), comprising: a first element portion placed in a recess (e.g. recess due to displacement) of the stepped mold (161+130); and a second element portion placed in a cavity (e.g. cavity is the space between the substrate 111+113) of the insulation film substrate that extends vertically from a top surface of the insulation film substrate (111+113) through a bottom surface of the insulation film substrate. See Kang at para. [0001] – [0096], figs. 1-5. Regarding claim 19: In fig. 1, Kang does not show a multi-layer board. However, it would have been obvious to one of ordinary skill in the art to mound the insulation film substrate on a multi-layer board because Kang teaches “The external connection bump 191 may electrically and physically connect between the semiconductor package 1000 and an external device, on which the semiconductor package 1000 is mounted.” See Kang at para. [0042]. Furthermore, in an analogous art, Lee teaches (see fig. 5) a multi-layer board (500A). See Lee at para. [0055] – [0064]. It would have been obvious to one of ordinary skill in the art to attach Kang’s package to a multi-layer board for the purpose of “keeping up with a high-multilayer and large-scale substrate” and “improving power integrity”. See Lee at para. [0114] – [0115]. PNG media_image1.png 464 776 media_image1.png Greyscale Regarding claim 20: Lee further teaches: 20. The system-in-package of claim 19, further comprising at least one passive element (300) directly connected to the multi-layer board (500A) via a third plurality of connectors (350), fig. 5. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Kang with the teachings of Lee because this enables “keeping up with a high-multilayer and large-scale substrate” and “improving power integrity”. See Lee at para. [0114] – [0115]. Claim(s) 22 and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang, as applied to claim 19 above, in view of Jung et al., US Publication No. 2019/0206804 A1. Regarding claims 22 and 23: Kang teaches all the limitations of claim 19 above, but does not expressly teach a shield. In an analogous art, Jung teaches (see fig. 1) forming a shield (130) around a package at para. [0031] – [0040]. One of ordinary skill in the art modifying Kang with Jung to form a shield (130) around Kang’s package (1000) in fig. 1 would form: further comprising a shield disposed along sidewalls of the recess (e.g. The shield on the outside of the package runs parallel to sidewalls of the recess so it is disposed along sidewalls of the recess.) of the stepped mold (161+130); and further comprising a shield disposed on and in contact (e.g. through intervening layers) with a top surface and sidewalls of the first element portion (e.g. of 121) It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Kang with the teachings of Jung because “Electromagnetic interference (EMI) generated in such an electronic device may cause interference between devices or may be harmful to a human body…Therefore, techniques for coating a shielding layer to block electromagnetic waves in electronic components within such small electronic devices have been developed.” See Jung at para. [00003. Relevant Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Tsai US 20200006307 A1 (e.g. Tsai teaches in figs. 79 and 84 a package with a stepped mold.) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini, can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Michele Fan/ Primary Examiner, Art Unit 2818 17 July 2026
Read full office action

Prosecution Timeline

Jan 12, 2023
Application Filed
Dec 12, 2025
Non-Final Rejection mailed — §103
May 05, 2026
Applicant Interview (Telephonic)
May 08, 2026
Examiner Interview Summary
May 12, 2026
Response Filed
Jul 21, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12702030
POWER MODULE AND METHOD FOR MANUFACTURING SAME
3y 10m to grant Granted Aug 04, 2026
Patent 12702031
POWER MODULE
2y 8m to grant Granted Aug 04, 2026
Patent 12696665
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE
3y 3m to grant Granted Jul 28, 2026
Patent 12684906
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
3y 11m to grant Granted Jul 14, 2026
Patent 12672569
POWER SEMICONDUCTOR MODULE AND POWER CONVERSION DEVICE
3y 5m to grant Granted Jun 30, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
87%
With Interview (+11.1%)
2y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 946 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month