DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election without traverse of species E, fig .7, claims 1-3, 5-15, 17, 19, 20 and new claims 21-23, in the reply filed on 9/10/25 is acknowledged.
Response to Amendment
Applicant’s preliminary amendment to claims 1, 3, 5, 6, 12, 14, 15, 19 and 20 is acknowledged.
Applicant’s cancellation of claims 4, 16 and 18 is acknowledged.
Claims 1-3, 5-15, 17 and 19-23 are pending subject to examination at this time.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 6, 7, 11-15, 17, 19 and 21-23 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Baek et al., US Publication No. 2019/0013300 A1.
Baek anticipates:
1. A system-in-package, comprising (see fig. 17 annotated):
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a stepped mold (132; e.g. See dotted outline that is T-shaped);
an insulation film substrate (140+150+111; e.g. See solid outline that comprises 140+150 and 111 extending upwards from 140+150 forms cavities between the sidewalls of 111.) connected to a multi-layer board (e.g. “main board”, para. [0095]) via a first plurality of connectors (170);
at least one processor die (121) integrated into the stepped mold and stacked onto the insulation film substrate via a second plurality of connectors (122); and
at least one passive element (125F, 125A, 125B) integrated into the stepped mold (e.g. Passive element 125F is placed inside the mold 132. Passive elements 125A, 126B are placed in a recess of the mold 132.) and stacked onto the insulation film substrate, wherein a passive element (e.g. 125B) of the at least one passive element is partially placed within a recess (e.g. recess annotated in fig. 17) of the stepped mold (132) and through a cavity (e.g. cavity annotated in fig. 17) of the insulation film substrate (140+150+111). See Baek at para. [0001] – [0139], figs. 1-21.
2. The system-in-package of claim 1, wherein the at least one passive element (125F, 125A, 125B) comprises a plurality of passive elements of different heights integrated into the stepped mold, fig. 17.
3. The system-in-package of claim 1, wherein another passive element (e.g. 125F or 125A) of the at least one passive element is stacked directly onto the insulation film substrate (140+150+111), fig. 17.
6. The system-in-package of claim 1, wherein a mechanical shield (181, 182) is placed around at least a portion of the passive element (125B), fig. 17, para. [0110].
7. The system-in-package of claim 1, further comprising a shielding layer (182) covering the stepped mold as an outer layer of the system-in-package, fig. 17, para. [0110].
11. The system-in-package of claim 1, wherein the insulation film substrate (140+150+111) comprises an insulating build-up material para. [0089] – [0093], para. [0082].
12. The system-in-package of claim 1, wherein the passive element (125B) is stacked onto the multi-layer board (e.g. “main board”, para. [0095]) via a third plurality of connectors (211), para. [0100], figs. 12A (e.g. Passive element 125B is stacked onto the multi-layer board through the intervening insulating build-up material 140+150+111 and the plurality of first connectors 170.)
13. The system-in-package of claim 1, wherein the multi-layer board (e.g. “main board”, para. [0095]) is external to the system-in-package.
Regarding claim 14:
Baek teaches the limitations as applied to claims 1 and 2 above, and further teaches the added limitation:
wherein a passive element (125B) from the plurality of passive elements (125F, 125A, 125B) extends vertically through a recess (e.g. recess annotated in fig. 17) of the stepped mold (132) and a cavity (e.g. cavity annotated in fig. 17) of the insulation film substrate (140+150+111).
15. The system-in-package of claim 14, wherein the passive element (125B) from the plurality of passive elements is stacked on the multi-layer board (e.g. “main board”, para. [0095]) via a plurality of land grid array (LGA) connectors (e.g. The electrical connection structure 170 may be a land, a ball, a pin, or the like, para. [0095].)
Regarding claim 17:
Baek teaches the limitations as applied to claim 7 above.
Regarding claim 19:
Baek teaches the limitations as applied to claims 1 and 2 above, and further teaches the added limitation:
a passive element (125B), comprising:
a first element portion (e.g. left portion or top portion) placed in a recess (e.g. recess annotated in fig. 17) of the stepped mold (132); and
a second element portion (e.g. right portion or bottom portion) placed in a cavity (e.g. cavity annotated in fig. 17) of the insulation film substrate (140+150+111).
21. The system-in-package of claim 14, wherein the stepped mold (132) covers a top surface and sidewalls of a top portion of the passive element (125B), and wherein the insulation film substrate (140+150+111) is in contact (e.g. through intervening layer 131) with sidewalls of a bottom portion of the passive element (125B), fig. 17.
22. The system-in-package of claim 19, further comprising a shield (181, 182) disposed along sidewalls of the recess of the stepped mold, fig. 17, para. [0110].
23. The system-in-package of claim 19, further comprising a shield (181, 182) disposed on and in contact (e.g. through intervening layers) with a top surface and sidewalls of the first element portion (e.g. left portion or top portion of 125B), fig. 17.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 8 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied to claim 1 above, in view of Hong et al., US Publication No. 2020/0084924 A1.
Regarding claims 8 and 9:
Baek teaches all the limitations of claim 1 above, but does not expressly teach:
further comprising an electro-magnetic interference (EMI) absorber placed above a portion of an outer surface of the shielding layer; and
an electro-magnetic interference (EMI) absorber placed below a portion of an inner surface of the shielding layer.
In an analogous art, Hong teaches “EMI shielding film pre-form 50 may include multiple layers, including layers with different EMI shielding properties. Various layers of a multiple-layer pre-form 50 may be polymer-based or non-polymer-based, including one or more metal foil layers. Different layers of a multiple-layer film used as pre-form 50 may absorb and/or reflect different or overlapping frequency ranges of electromagnetic radiation.” See Hong at para. [0048].
The disclosure of an EMI shielding film comprising multiple layers that absorb electromagnetic radiation teaches the limitation “further comprising an electro-magnetic interference (EMI) absorber placed above (e.g. top layer of multiple layers) a portion of an outer surface of a shielding layer (e.g. middle layer) and an electro-magnetic interference (EMI) absorber placed below (e.g.. bottom layer) a portion of an inner surface of the shielding layer”, as recited in the claim.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Baek with the teachings of Hong because a shielding layer comprising multiple layers enables different EMI shielding properties to absorb different frequency ranges of electromagnetic radiation.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied to claim 1 above, in view of Choi et al., US Publication No. 2009/0283888 A1.
Regarding claim 10:
Baek teaches all the limitations of claim 1 above, and further teaches:
10. The system-in-package of claim 1, wherein:
the first plurality of connectors (170) comprise a plurality of land grid array (LGA) connectors or a plurality of ball grid array (BGA) connectors (e.g. See para. [0095], “The electrical connection structure 170 may be a land, a ball, a pin, or the like.”); and
the second plurality of connectors (122) comprise a plurality of connection pads, fig. 17.
Baek does not expressly teach:
the second plurality of connectors comprise a plurality of “solder ball connectors”.
In an analogous art, Choi teaches (see fig. 4) “The third semiconductor die 410 is connected to a contact pad 414 on the second package substrate 412 through a bottom interconnect 416 implemented using a solder ball, a bump, a stud, or other interconnect elements known in the art.” See Choi at para. [0041].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Baek with the teachings of Choi to form the second plurality of connectors to comprise a plurality of “solder ball connectors” because solder balls are “interconnect elements known in the art” that are suitable for connecting a semiconductor chip. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek, as applied to claim 1 above, in view of Lee et al., US Publication No. 2021/0289629 A1.
Regarding claim 20:
Baek teaches all the limitations of claim 1 above, but does not expressly teach:
further comprising at least one passive element directly connected to the multi-layer board via a third plurality of connectors.
In an analogous art, Lee teaches:
(see figs. 3 and 5) further comprising at least one passive element (300) directly connected to the multi-layer board (100) via a third plurality of connectors (350). See Lee at para. [0046], [0058].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Baek with the teachings of Lee because “power integrity may be improved”. See Lee at para. [0046].
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
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/Michele Fan/
Primary Examiner, Art Unit 2818
17 November 2025