DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Previous action: 1, 11,12, 18, and 19 objected, claims 1, 11, 12, 18 and 19 rejected.
Present action: claims 1, 3-8, 11, 14-18 and 21-24 allowed, claims 9 and 10 rejected.
Claim Rejections - 35 USC § 112
Claims 9 and 10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 9 and 10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 depends from claim 2, however claim 2 has been cancelled. Therefore, it is unclear and ambiguous what the correct dependency of claim 9 is, and the proper scope claim 9 cannot be determined.
Claim 10 depends from and incorporates claim 9.
Allowable Subject Matter
Claims 1, 3 through 8, 11, 14 through 18, and 21 through 24 are allowed.
Claims 9 and 10 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, the prior art does not teach a stacked integrated circuit comprising: an upper chip that is rotated around a rotation axis and stacked on a lower chip in a mirror symmetric structure form, and the lower chip configured to generate a second input/output control signal for the input/output of the power signal based on the second internal distinguishment signal and the chip selection signal, the upper chip comprises: a first rear pad configured to receive the distinguishment signal; and a second rear pad configured to receive the chip selection signal in combination with other elements of the claim.
Regarding claim 11, the prior art does not teach a stacked integrated circuit comprising: an upper chip that is rotated around a rotation axis and stacked on a lower chip in a mirror symmetric structure form, and each of the lower chip and the upper chip is configured to control an input of a first power signal and a second power signal based on an internal distinguishment signal and an input and output (input/output) control signal, and the first input/output control signal and the second input/output control signal are selectively activated in response to a chip selection signal in combination with other elements of the claim.
Regarding claim 18, the prior art does not teach, a stacked integrated circuit comprising: an upper chip that is rotated around a rotation axis and stacked on a lower chip in a mirror symmetric structure form, and the upper chip is configured to control an output of a first power signal and a second power signal based on an internal distinguishment signal and an input and output (input/output) control signal, the input/output control signal comprises a first input/output control signal that is generated from the upper chip and a second input/output control signal that is generated from the lower chip, and the first input/output control signal and the second input/output control signal are selectively activated in response to a chip selection signal.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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