DETAILED ACTION
This office action is in response to amendment filed 3/2/2026.
Claims 1-2 and 4-15 are pending. Claim 3 has been canceled. Claims 9-12 and 14 have been withdrawn. Claims 1, 5, 13, and 15 have been amended.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 4-8, 13 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 1, 13 and 15 reciting “wherein the semiconductor layer is formed in an area of the current guiding part” renders the claim indefinite. According to Applicant’s remark, the semiconductor layer correspond to layer 151, while the current guiding part correspond to element 153. As such, the semiconductor layer 151 and the current guiding part 153 are distinct elements of the device, with the semiconductor layer 151 being surrounded by current guiding part 153. However, it is unclear how would the semiconductor layer 151 be construed as being “formed in an area of the current guiding part”. The semiconductor layer 151 is not formed in an area of the current guiding part 153 as disclosed. Rather, the semiconductor layer 151 is formed in an area that is not occupied by the current guiding part 153, more particularly in an area surrounded by the current guiding part. Therefore, it is unclear what is meant by “the semiconductor layer is formed in an area of the current guiding part” as recited in the claim.
Claim 2 reciting “an area of the current guiding part” renders the claim indefinite it is unclear if this is referring to the same “area of the current guiding part” previously recited in claim 1. Furthermore, as explained with respect to claim 1 above, if the “area of the current guiding part” is intended to refer to a region occupied by the semiconductor layer 115 where the current guiding part is vacant, it is unclear how does it constitute “an area of the current guiding part”.
Claim 13 reciting “a lateral length of an area of the current guiding part” renders the claim indefinite it is unclear if this is referring to the same “area of the current guiding part” previously recited in the claim. Furthermore, if the “area of the current guiding part” is intended to refer to a region occupied by the semiconductor layer 115 where the current guiding part is vacant, it is unclear how does it constitute “an area of the current guiding part”.
Other claims are rejected for depending on a rejected claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 5, 8 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by McGroddy et al. US 2015/0187991 A1 (McGroddy).
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In re claim 1, as best understood, McGroddy discloses (e.g. FIGs. 25 & 32) a micro light emitting diode (LED) 156 comprising:
a current spreading layer 104 comprising a light-emitting surface (top surface shown);
a first electrode 150,152 disposed on the current spreading layer 104 and electrically connected to the current spreading layer 104;
a first cladding layer 106 and a second cladding layer 110 that are stacked on the current spreading layer 104;
an active layer 108 disposed between the first cladding layer 106 and the second cladding layer 110 (¶ 81);
a second electrode 124 disposed on a semiconductor layer (180 in FIG. 25, ¶ 81,122; 188 in FIG. 30, ¶ 130); and
a current guiding part (178 in FIG. 25, ¶ 122; 186 in FIG. 32, ¶ 130) disposed between the second electrode 124 and the second cladding layer 110;
wherein the semiconductor layer 180,188 is formed on the second cladding layer 110 at a position below the second electrode 124 (when the device is flipped upside down, e.g. prior to transferring to carrier substrate, see FIGs. 24 & 31),
wherein the semiconductor layer 180,188 is “formed in an area of the current guiding part 178,186” (as best understood, 180,188 is formed in an area surrounded by current guiding part 178,186 as is consistent with Applicant’s disclosure), through which current passes and reaches to the second cladding layer 110, the active layer 108, and the first cladding layer 106 in their sequential order (current flows from electrode 124 toward electrode 152 and is injected through “current injection region” 180,188 surrounded by confinement region 178,186, ¶ 122,130; as such, the current sequentially reaches the second cladding layer 110, the active layer 108, and the first cladding layer 106 due to their respective proximity to electrode 124), and
wherein the current guiding part 178,186 is configured to guide the current to flow away from a side surface of the micro LED 156 (¶ 72,122,130).
In re claim 2, as best understood, McGroddy discloses (e.g. see FIGs. 25 & 32) wherein the second electrode 124 has a lateral length greater than a lateral length of “an area of the current guiding part” (as best understood, area of 180,188 surrounded by the current guiding part 178,186), through which the current passes (“current injection region” 180,188; ¶ 122,130).
In re claim 5, McGroddy discloses (e.g. FIGs. 10, 25 & 32) wherein each of the first electrode 150,152 and the second electrode 124 comprises of any one of aluminum (Al) , titanium (Ti) , chromium (Cr) , nickel (Ni), palladium (Pd) , silver (Ag) , germanium (Ge) , gold (Au) , or an alloy thereof (¶ 86,94-95).
In re claim 8, McGroddy discloses (e.g. FIG. 32) further comprising a passivation layer 120 provided on the side surface of the micro LED 156, and
wherein the passivation layer 120 (¶ 85) comprises of any one of alumina (Al2O3), silica (SiO2), or silicon nitride (SiN).
In re claim 13, as best understood, McGroddy discloses (e.g. FIGs. 25 & 32) a micro light emitting diode (LED) 156 comprising:
a current spreading layer 104 comprising a light-emitting surface (top surface shown);
a first electrode 150,152 disposed the current spreading layer 104 and electrically connected to the current spreading layer 104;
a first cladding layer 106 and a second cladding layer 110 that are stacked on the current spreading layer 104;
an active layer 108 disposed between the first cladding layer 106 and the second cladding layer 110 (¶ 81);
a second electrode 124 disposed on a semiconductor layer (180 in FIG. 25, ¶ 81,122; 188 in FIG. 30, ¶ 130); and
a current guiding part (178 in FIG. 25, ¶ 122; 186 in FIG. 32, ¶ 130) disposed between the second electrode 124 and the second cladding layer 110, the current guiding part 178,186 being configured to guiding a current to flow away from a side surface of the micro LED 156 (¶ 72,122,130); and
a passivation layer (120 shown in FIG. 32, or 348 in FIG. 37B for LED shown in FIG. 25) provided on the side surface of the micro LED 156,
wherein the semiconductor layer 180,188 is formed on the second cladding layer 110 at a position below the second electrode 124 (when the device is flipped upside down, e.g. prior to transferring to carrier substrate, see FIGs. 24 & 31),
wherein the semiconductor layer 180,188 is “formed in an area of the current guiding part 178,186” (as best understood, 180,188 is formed in an area surrounded by current guiding part 178,186 as is consistent with Applicant’s disclosure), through which the current passes and reaches to the second cladding layer 110, the active layer 108, and the first cladding layer 106 in their sequential order (current flows from electrode 124 toward electrode 152 and is injected through “current injection region” 180,188 surrounded by confinement region 178,186, ¶ 122,130; as such, the current sequentially reaches the second cladding layer 110, the active layer 108, and the first cladding layer 106 due to their respective proximity to electrode 124), and
wherein the second electrode 124 has a lateral length greater than a lateral length of “an area of the current guiding part” (as best understood, area of 180,188 surrounded by the current guiding part 178,186), through which the current passes (“current injection region” 180,188; ¶ 122,130).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over McGroddy in view of Ahmed et al. US 2019/0041562 A1 (Ahmed).
In re claim 15, as best understood, McGroddy discloses a display module (see FIGs. 37A-38B, ¶ 139) comprising:
a thin film transistor (TFT) substrate comprising a TFT layer 300 provided on one surface of the substrate (¶ 139); and
a plurality of TFT electrodes 342 provided on the TFT layer 300;
a plurality of micro light emitting diodes (LEDs) 156 electrically connected to the plurality of TFT electrodes 342,
wherein each of the micro LEDs 156 comprises (e.g. see FIGs. 25 & 32):
a current spreading layer 104 comprising a light-emitting surface (top surface shown);
a first electrode 150,152 disposed on the current spreading layer 104 and electrically connected to the current spreading layer 104;
a first cladding layer 106 and a second cladding layer 110 that are stacked on the current spreading layer 104;
an active layer 108 disposed between the first cladding layer 106 and the second cladding layer 110 (¶ 81);
a second electrode 124 disposed on a semiconductor layer (180 in FIG. 25, ¶ 81,122; 188 in FIG. 30, ¶ 130);
a current guiding part (178 in FIG. 25, ¶ 122; 186 in FIG. 32, ¶ 130) disposed between the second electrode 124 and the second cladding layer 110; the current guiding part 178,186 being configured to guiding a current to flow away from a side surface of the micro LED 156 (¶ 72,122,130); and
a passivation layer (120 shown in FIG. 32, or 348 in FIG. 37B for LED shown in FIG. 25) provided on the side surface of the micro LED 156,
wherein the semiconductor layer 180,188 is formed on the second cladding layer 110 at a position below the second electrode 124 (when the device is flipped upside down, e.g. prior to transferring to carrier substrate, see FIGs. 24 & 31),
wherein the semiconductor layer 180,188 is “formed in an area of the current guiding part 178,186” (as best understood, 180,188 is formed in an area surrounded by current guiding part 178,186 as is consistent with Applicant’s disclosure), through which the current passes and reaches to the second cladding layer 110, the active layer 108, and the first cladding layer 106 in their sequential order (current flows from electrode 124 toward electrode 152 and is injected through “current injection region” 180,188 surrounded by confinement region 178,186, ¶ 122,130; as such, the current sequentially reaches the second cladding layer 110, the active layer 108, and the first cladding layer 106 due to their respective proximity to electrode 124), and
wherein the second electrode 124 has a lateral length greater than a lateral length of “an area of the current guiding part” (as best understood, area of 180,188 surrounded by the current guiding part 178,186), through which the current passes (“current injection region” 180,188; ¶ 122,130).
McGroddy does not explicitly disclose the display substrate comprises a glass substrate.
However, Ahmed discloses (e.g. FIGs. 1-2) a display device comprising a TFT substrate 201 including TFT switching elements 220 on a glass 210 (¶ 26), and micro LEDs 130 disposed above the TFT substrate 201.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the McGroddy’s TFT substrate using a glass substrate as taught by Ahmed for its well-known property and low cost in display device. It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over McGroddy as applied to claim 1 above, and further in view of Sugawara et al. US 5,048,035 (Sugawara).
In re claim 4, McGroddy discloses the claimed invention including the second cladding layer 110 which is p-type doped and has a lower dopant concentration than the first cladding layer 106, including no doping (¶ 81).
McGroddy does not explicitly discloses a carrier concentration of the second cladding layer is less than 5E+17/cm3.
Sugawara discloses a LED structure (FIG. 1) comprising an n-type cladding layer 12 and a p-type cladding layer 14 (Column 3, lines 43-50), and an active layer 13 between the cladding layers. Sugawara further discloses the p-type cladding layer 14 has a carrier concentration of 4×1017cm-3 (Column 4, lines 15-23) as adequate for current injection and desired emission efficiency.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form McGroddy’s p-type cladding layer 110 to have carrier concentration of less than 5E+17/cm3, e.g. 4×1017cm-3 as taught by Sugawara as for desired electrical and optical characteristics.
“[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over McGroddy as applied to claim 5 above, and further in view of Jang et al. US 2007/0252165 A1 (Jang).
In re claim 6, McGroddy discloses the first electrode 150,152 and the second electrode 124 may each comprise electrically conductive oxides and in combination with metal layers (¶ 86,94).
McGroddy does not explicitly disclose the conductive oxides are each respectively positioned between the first electrode and the current spreading layer 104, and between the second electrode and the semiconductor layer 180,188.
However, Jang discloses a LED structure (FIG. 5) comprising a semiconductor stack 20 between a first electrode 60 and a second electrode 40. Jang further discloses
a first semiconductor contact layer 50 comprising an electrically conductive oxide (¶ 56) and positioned between the first electrode 60 and the semiconductor stack 20; and
a second semiconductor contact layer 30 comprising the electrically conductive oxide (¶ 50-51) and positioned between the second electrode 40 and the semiconductor stack 20.
Jang discloses disposing conductive oxide between the metal electrode and the semiconductor layer to form ohmic contact that efficiently supply current to the semiconductor layer to enhance light emission efficiency (¶ 56).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form conductive oxide between McGroddy’s electrode 124,150 and the semiconductor stack to improve current supply efficiency for enhancing light emission as taught by Jang.
In re claim 7, McGroddy discloses the electrically conductive oxide is ITO (¶ 94). Jang discloses the electrically conductive oxide (¶ 51,59) of each of the first semiconductor contact layer 50 and the second semiconductor contact layer 30 is indium tin oxide (ITO) or zinc oxide (ZnO).
Response to Arguments
Applicant's arguments filed 3/2/2026 have been fully considered but they are not persuasive.
Applicant's arguments amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
Applicant argues McGroddy fails to teach “a second electrode disposed on the semiconductor layer, the semiconductor layer is formed on the second cladding layer at a position below the second electrode, and the semiconductor layer is formed in an area of the current guiding part, through which a current passes and reaches to the second cladding layer, the active layer, and the first cladding layer in their sequential order” (Remark, pages 11).
This is not persuasive. McGroddy teaches a semiconductor layer corresponding to element 180 in FIG. 25 (¶ 81,122) and element 188 in FIG. 30 (¶ 130). The second electrode 124 is disposed on a semiconductor layer 180,188. The semiconductor layer 180,188 is formed on the second cladding layer 110 at a position below the second electrode 124 (when the device is flipped upside down, e.g. prior to transferring to carrier substrate, see FIGs. 24 & 31). Furthermore, “an area of the current guiding part”, as best understood, refer to an area surrounded by current guiding part 178,186 and is occupied by the semiconductor layer 180,188, as is consistent with Applicant’s disclosure. As such, McGroddy teaches the semiconductor layer 180,188 is “formed in an area of the current guiding part 178,186”, through which current passes and reaches to the second cladding layer 110, the active layer 108, and the first cladding layer 106 in their sequential order. In the LED taught by McGroddy, current flows from electrode 124 toward electrode 152 and is injected through “current injection region” 180,188 surrounded by confinement region 178,186 (¶ 122,130). As such, the current sequentially reaches the second cladding layer 110, the active layer 108, and the first cladding layer 106 due to their respective proximity to electrode 124.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET.
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/YU CHEN/Primary Examiner, Art Unit 2896
YU CHEN
Examiner
Art Unit 2896
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