DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Status
Claims 12-20 are currently being examined. Claim 12 has been amended.
Response to Arguments
Applicant’s arguments with respect to claim 12 have been considered but are moot because the new ground of rejection relies on a new reference combination not applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Lastly, no arguments against the rejections of claims 13-20 beyond their allowability due to their dependence from claim 12 are presented. Thus, their rejections are maintained.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over HODO et al (US 2017/0125450 A1-of record, hereafter Hodo) in view of Shih et al (US 2007/0269978 A1-of record, hereafter Shih) and Zierath et al (US 2013/0270703 A1, hereafter Zierath).
Re claim 12, Hodo discloses in FIG. 16 a display device comprising:
a first interlayer insulating layer (98; [0323]) positioned on a substrate (91; [0333]); and
at least one first signal line (51a-52a/51b-52b/51c-52c; [0323]) and one first side wall insulating layer (laminate 102a/102b; [0323]) positioned on the first interlayer insulating layer (98), the at least one first signal line (51a-52a/51b-52b/51c-52c) comprising a refractory metal layer (Ti 51a/51b/51c; [0322]) and a low resistivity layer (Cu 52a/52b/52c; [0323]), wherein
the first side wall insulating layer (laminate 102a/102b) is positioned between at least two (51a-52a/51b-52b) of the first signal lines (51a-52a/51b-52b/51c-52c),
a height measured from (vertical extension above) a surface (upper horizontal plane) of the substrate (91) to a surface (upper horizontal plane) of the at least one first signal line (51a-52a/51b-52b/51c-52c) along a first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91) is a same (co-planar/level; Abstract) as a height measured from (vertical extension above) the surface (upper horizontal plane) of the substrate (91) to a surface (upper horizontal plane) of the first side wall insulating layer (laminate 102a/102b) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91).
Hodo fails to disclose the at least one first signal line (51a-52a/51b-52b/51c-52c)
comprising a lower refractory metal layer, a middle low resistivity layer, and an upper refractory metal layer, the lower refractory metal including at least one of molybdenum and chromium, and a height measured from a surface of the substrate (91) to a surface of the upper refractory metal layer of the at least one first signal line (51a-52a/51b-52b/51c-52c) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91) is a same as a height (co-planar/level; Abstract) as a height measured from (vertical extension above) the surface (upper horizontal plane) of the substrate (91) to the surface (upper horizontal plane) of the first side wall insulating layer (laminate 102a/102b) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91).
However,
A. However, Hodo discloses wherein a surface of at the least one signal line (51a-52a/51b-52b/51c-52c) and a surface of a side wall insulating layer (laminate 102a/102b) are each a polished surface in FIGS. 4A and 4C ([0142]-[0143]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use polished surfaces of the embodiment of FIG. 4C such that the first side wall insulating layer (laminate 102a/102b) may have a polished surface, to form conductors and insulating layers of equal level with flat top surfaces (Hodo; Abstract and [0143]).
And,
B, Shih discloses in FIG. 7A a display device component comprising: at least one first signal line (40/32/48 or 42/34/50; [0022]; [0029]; [0031]) comprising a lower refractory metal layer (Ti 40/42; [0022]), a middle low resistivity layer (Cu 32/34; [0023]), and an upper refractory metal layer (Mo 48/50; [0029]), and a height (vertical extension) measured from a surface (upper horizontal plane) of a substrate (20; [0020]) to a surface (upper plane) of the upper refractory metal layer (Mo 48/50) of the at least one first signal line (40/32/48 or 42/34/50) along the first direction (vertically) perpendicular (normal) to the surface (upper horizontal plane) of the substrate (20) is a same as a height (co-planar/level; [0033]) as a height measured from (vertical extension above) the surface (upper horizontal plane) of the substrate (20) to a surface (upper horizontal plane) of a first side wall insulating layer (21; [0021]) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (20), and the upper refractory metal layer (Mo 48/50) of the first signal line (40/32/48 or 42/34/50) may have a polished surface (CMP; [0032]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Hodo by adding the upper refractory metal layer of Shih, resulting in the at least one first signal line comprising a lower refractory metal layer, a middle low resistivity layer, and an upper refractory metal layer, and a height measured from a surface of the substrate (91) to a surface of the upper refractory metal layer of the at least one first signal line along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91) is a same as a height (co-planar/level) as a height measured from (vertical extension above) the surface (upper horizontal plane) of the substrate (91) to the surface (upper horizontal plane) of the first side wall insulating layer (laminate 102a/102b) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91), the upper refractory metal layer of the first signal line having a polished surface reducing, parasitic capacitances and leakage currents of the signal lines (Shih; [0014]).
Futher, it would have been obvious to modify the signal line of Shih such that the lower refractory metal includes at least one of molybdenum and chromium, and the upper refractory metal includes titanium by rearrangement of parts (MPEP 2144.04 VI. C.), as disclosed by Zierath’s lower refractory metal (ESM) and upper refractory metal (Cap Material) including molybdenum (ESM molybdenum nitride in FIG. 4E’; [0026] and [0049]), and titanium (Cap Material titanium in FIG. 4E; [0041]), respectively, the lower refractory metal for suppression of unwanted growth for desired middle low resistivity layer or otherwise configured to provide acceptable diffusion barrier properties (Zierath; [0026]), and the upper refractory metal to improve conductivity, process integration and/or to minimize the possibility of galvanic corrosion (Zierath; [0041]).
Re claim 13, Hodo discloses the display device of claim 12, wherein the at least one first signal line (51a-52a/51b-52b/51c-52c) includes copper (Cu; [0323] and [0325]).
Re claims 14; and 19, Hodo discloses the display device of claims 12; and 17.
But, fails to disclose wherein a surface of at the least one first signal line (51a-52a/51b-52b/51c-52c) and a surface of the first side wall insulating layer (laminate 102a/102b) are each a polished surface; and wherein a surface of the at least one second signal line (111a-112a/111b-112b/111c-112c) and a surface of the second side wall insulating layer (108) are each a polished surface.
However, Hodo would render these limitations obvious by disclosing wherein a surface of at the least one signal line (51a-52a/51b-52b/51c-52c) and a surface of a side wall insulating layer (laminate 102a/102b) are each a polished surface in FIGS. 4A and 4C ([0142]-[0143]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use polished surfaces of the embodiment of FIG. 4C such that a surface of at the least one first signal line (51a-52a/51b-52b/51c-52c) and a surface of the first side wall insulating layer (laminate 102a/102b) are each a polished surface; and a surface of the at least one second signal line (111a-112a/111b-112b/111c-112c) and a surface of the second side wall insulating layer (108) are each a polished surface, to form conductors and insulating layers of equal level with flat top surfaces (Hodo; Abstract and [0143]).
Re claim 15, Hodo discloses the display device of claim 12, wherein in at least one first signal line (51a-52a/51b-52b/51c-52c), an angle (slant) between a lower surface (interface of 98/102a) of the at least one first signal line (51a-52a/51b-52b/51c-52c) and a side surface (left/right upper slanted planes) of the at least one first signal line (51a-52a/51b-52b/51c-52c) is 90 degrees or more (counterclockwise/clockwise from vertical).
Re claim 16, Hodo discloses the display device of claim 12, wherein the first interlayer insulating layer (laminate 102a/102b) includes one or more of a silicon oxide and a silicon nitride ([0323]).
Re claim 17, Hodo discloses the display device of claim 12, further comprising:
a second interlayer insulating layer (laminate 104/106; [0324]) positioned on the at least one first signal line (51a-52a/51b-52b/51c-52c) and the first side wall insulating layer (laminate 102a/102b); and
at least one second signal line (111a-112a/111b-112b/111c-112c; [0326]) and a second side wall insulating layer (108; [0324]) positioned on the second interlayer insulating layer (laminate 104/106), wherein
the second side wall insulating layer (108) is positioned between at least two (111a-112a/111b-112b) of the second signal lines (111a-112a/111b-112b/111c-112c),
a height measured from (vertical extension above) a surface (upper horizontal plane) of the substrate (91) to a surface (upper horizontal plane) of the at least one second signal line (111a-112a/111b-112b/111c-112c) along a first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91) is a same (co-planar/level; Abstract) as a height measured from (vertical extension above) the surface (upper horizontal plane) of the substrate (91) to a surface (upper horizontal plane) of the second side wall insulating layer (108) along the first direction perpendicular (normal) to the surface (upper horizontal plane) of the substrate (91).
Re claim 18, Hodo discloses the display device of claim 17, wherein the at least one second signal line (111a-112a/111b-112b/111c-112c) includes copper (Cu; [0142] and [0327]).
Re claim 20, Hodo discloses the display device of claim 17, wherein in at least one second signal line (111a-112a/111b-112b/111c-112c), an angle (slant) between a lower surface (interface of 106/108) of the at least one second signal line (111a-112a/111b-112b/111c-112c) and a side surface (left/right upper slanted planes) of the at least one second signal line (111a-112a/111b-112b/111c-112c) is 90 degrees or more (counterclockwise/clockwise from vertical).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408)918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ERIC W JONES/
Primary Examiner, Art Unit 2892
Prosecution Insights