CTNF 18/103,894 CTNF 69602 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 08-25-01 AIA Applicant’s election without traverse of claims 1-10 in the reply filed on 4/15/26 is acknowledged. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1, 3, and 10 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Kwon (US pat 10163946) . With respect to claim 1, Kwon teaches an image sensor, comprising (see figs. 1-7, particularly fig. 3A and associated text): a first substrate 30 comprising unit pixel regions PD, the first substrate having a first surface (bottom) and a second surface (top) on an opposite side of the first surface; a second substrate 20 provided below the first surface of the first substrate; a third substrate 10 provided below the second substrate; a lower dielectric layer 19 provided between the second substrate and the third substrate; a lower wiring line 15 provided in the lower dielectric layer; an intermediate dielectric layer 29 provided between the first substrate and the second substrate; a first bonding pad 25 provided in the intermediate dielectric layer; a connection contact (bottom part of 27) configured to penetrate the second substrate and electrically connect the lower wiring line to the first bonding pad; and a contact pattern (top part of 27) provided in the intermediate dielectric layer and below the first bonding pad, wherein the first bonding pad is spaced apart from the connection contact by the contact pattern. With respect to claim 3, Kwon teaches a logic transistor (transistors above 10) provided in the third substrate, wherein the lower dielectric layer covers the logic transistor. See fig. 3A and associated text. With respect to claim 10, Kwon teaches the contact pattern comprises a plurality of contact patterns, and the connection contact is in contact with one or more of the plurality of contact patterns. See fig. 3A and associated text . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 2, 4-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Examiner’s Cited References The cited references generally show the similar or related structure having first, second, and third stacked substrates having pixel regions and transistors having dielectric layers therebetween and various connections be between contacts of second and third substrates as presently claimed by applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG PHAM whose telephone number is (571)272-1714. The examiner can normally be reached Mon-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. LONG . PHAM Examiner Art Unit 2823 /LONG PHAM/Primary Examiner, Art Unit 2897 Application/Control Number: 18/103,894 Page 2 Art Unit: 2897 Application/Control Number: 18/103,894 Page 3 Art Unit: 2897
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