DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s argument filed 12/24/25 is persuasive, the restriction requirement is withdrawn.
Information Disclosure Statement
IDS filed 1/3/24, 6/5/25, 7/29/25 and 10/14/25 are acknowledged, the references therein relating to the general background of applicant’s invention with the exception of U.S. patent application publication 2022/0374470 by Kontkanen et al. and U.S. patent application publication 2022/0038653 by Reda et al. which have particular relevance as noted below.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
1) Claim(s) 1-3, 6, 8-10, 13, 15-17 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. patent application publication 2022/0374470 by Kontkanen et al.
2) Regarding claim 1, Kontkanen teaches a processor (figure 2, item 235; paragraph 32; a processor) comprising: one or more circuits to perform an application programming interface (API) to enable frame interpolation to use one or more neural networks (paragraph 88; API can be utilized to enable interpolation machine learning module 306 to perform its function [i.e. frame interpolation, paragraph 25], wherein module 306 utilizes neural networks as detailed in paragraph 90).
3) Regarding claim 2, Kontkanen teaches the processor of claim 1, wherein the API is to receive one or more input values indicating a feature to perform the frame interpolation (paragraph 25; input values can be the image frames to interpolate between).
4) Regarding claim 3, Kontkanen teaches the processor of claim 1, wherein the API is to receive one or more input values indicating one or more graphics processing units (GPUs) of which the frame interpolation is to be enabled (paragraph 100; interpolation receives the number of GPU cores to utilize in performance of the function).
5) Regarding claim 6, Kontkanen teaches the processor of claim 1, wherein the API is performed after performing a second API to indicate support to use the one or more neural networks to perform the frame interpolation (paragraph 54; API for filtering module 304 is utilized prior to utilizing the interpolation API for the frame interpolation module, the preparation of feature vectors for interpolation input being an “indication of support”).
6) Claims 8-10 and 13 are taught in the same manner as described in the rejections of claims 1-3 and 6 above, respectively.
7) Claims 15-17 and 20 are taught in the same manner as described in the rejections of claims 1-3 and 6 above, respectively, with the exception of: memory storing executable instructions (figure 2, item 237; a memory).
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8) Claim(s) 4, 5, 11, 12, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. patent application publication 2022/0374470 by Kontkanen et al.
as applied to claims 1, 8 and 15 above, and further in view of U.S. patent application publication 2022/0038653 by Reda et al.
9) Regarding claim 4, Kontkanen does not specifically teach the processor of claim 1, wherein the API is to enable the frame interpolation based, at least in part, on setting a value in a driver of a GPU of which the frame interpolation is to be enabled.
Reda teaches the processor of claim 1, wherein the API is to enable the frame interpolation based, at least in part, on setting a value in a driver of a GPU of which the frame interpolation is to be enabled (paragraph 250; driver allows access to image processing of unit 3100 through an API call, any allowed access being an “enabling” setting).
Kontkanen and Reda are combinable because they are both from the frame interpolation field of endeavor.
It would have been obvious to a person of ordinary skill in the art at the time the invention was effectively filed to combine Kontkanen with Reda to add enabling processing through a driver. The motivation for doing so would have been so that threads can be organized and executed in parallel (paragraph 250). Therefore it would have been obvious to combine Kontkanen with Reda to obtain the invention of claim 4.
10) Regarding claim 5, Reda (as combined with Kontkanen in the rejection of claim 4 above) teaches the processor of claim 1, wherein the API is to enable the frame interpolation based, at least in part, on setting a value in a hardware state of a GPU of which the frame interpolation is to be enabled (paragraphs 167, 168 and 171; register for each GPU [table 1] tracks a state of the GPU to enable invocation of the GPU for image processing such as frame interpolation).
11) Claims 11 and 12 are taught in the same manner as described in the rejections of claims 4 and 5 above, respectively.
12) Claims 18 and 19 are taught in the same manner as described in the rejections of claims 4 and 5 above, respectively.
13) Claim(s) 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. patent application publication 2022/0374470 by Kontkanen et al. as applied to claims 1 and 8 above, and further in view of U.S. patent application publication 2023/0147063 by Kim et al.
14) Regarding claim 7, Kontkanen does not specifically teach the processor of claim 1, wherein the API is performed before performing a second API to disable the frame interpolation.
Kim teaches the processor of claim 1, wherein the API is performed before performing a second API to disable the frame interpolation (paragraph 294 and 337; access to a GPU core can be disabled depending upon the resources required for the image processing API call).
Examiner notes that the API of Kontkanen could enable a successful frame interpolation using a particular GPU and then when another call is later made, the GPU could be disabled as taught by Kim.
Kontkanen and Kim are combinable because they are both from the image processing field of endeavor.
It would have been obvious to a person of ordinary skill in the art at the time the invention was effectively filed to combine Kontkanen with Kim to add disabling a GPU. The motivation for doing so would have been to correctly size the utilization of resources (paragraph 294). Therefore it would have been obvious to combine Kontkanen with Kim to obtain the invention of claim 7.
15) Claims 14 is taught in the same manner as described in the rejection of claim 7 above.
Conclusion
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BENJAMIN O. DULANEY
Primary Examiner
Art Unit 2676
/BENJAMIN O DULANEY/Primary Examiner, Art Unit 2683