DETAILED ACTION
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o).
Correction of the following is required:
In claim 1, the claim terminology “system memory” has no antecedent basis to specification.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims.
Therefore, the claim limitation of “a first portion of a scan-out path from the VM to a portion of system memory … a second portion of the scan-out path from the portion of the system memory to the display device …” of claim 1 must be shown or the feature canceled from the claims.
No new matter should be entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor at the time the application was filed, had possession of the claimed invention.
“a first portion of a scan-out path from the VM to a portion of system memory … a second portion of the scan-out path from the portion of the system memory to the display device …” in claim 1.
Presently, the disclosure is found disclosing scan-out path from VM 102A to virtual functions 230 as the first portion of a scan-out path, and from the virtual function 230 to display hardware 106 as the second portion of the scan-out path as shown as examples in figs. 1 and 2. The disclosure does not state the virtual function 230 as a system memory of a host. Neither does the disclosure state a system memory of a host situated between VM and display. Independent claims 9 and 16 have the same issue. Dependent claims are rejected for the same reason as their corresponding independent claims as above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-9 and 11-20 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng (US 2013/0,229,421) in view of Badiger (US 11,698,737).
Referring to claims 1, 9 and 16, Cheng discloses a method comprising:
based on an allocation (fig. 3, hypervisor 311; para.0028, hypervisor 311 allocates resources) of display surface (fig. 2, virtual machine display 210/211/212) to a virtual machine VM (fig. 3, virtual machine 310-1/…/310-N);
transmitting image data (fig. 7, surface 702) representing the display surface over virtual channels (fig. 4, virtual function 411-1) that form a first portion of a scan-out path (fig. 5, from VM 511-2 to virtual function 513-2) from the VM (fig. 3, virtual machine 310-1) to a portion of system memory (fig. 4, GPU SR-IOV 400; fig. 3, system memory 300) of a host system (fig. 1, system 100) of the VM, the portion being assigned to the display surface in an [virtual] address space (fig. 4, virtual function 411-1; para.0039, virtual function memory space) corresponding to the VM, and the scan-out path being from the VM to a display device (fig. 1, display 200) with access to the image data by a host operating system OS (fig. 2, operating system 116) of the host system being prevented (para.0046, virtual function with independent resources) throughout the scan-out path; and
based on the transmitting, causing a physical display engine (fig. 4, physical card 412) to provide a second portion (fig. 5, virtual function 513-2 to GPU frame buffer memory partition VF 519-2) of the scan-out path from the portion of the system memory to the display device (fig. 2, host operating system display 200) based on the physical display engine:
issuing, using the [virtual] address space, a request (para.0030, hypervisor request of virtual machine translation and mapping) to a memory system (fig. 5, GPU frame buffer memory partitions) for the image data,
the request causing the memory system to provide the image data (fig. 5, virtual function 513-2 of VM 511-2) from the portion of the system memory (fig. 4, GPU SR-IOV 400; fig. 3, system memory 300) to the physical display engine (fig. 4, physical card 412) as part of the second portion of the scan-out path, and
using the image data provided by the memory system to send/scans-out a surface (fig. 2, using virtual machine display 210/211) corresponding to the display surface to the display device.
Cheng discloses address space for virtual functions, but did not clearly state the address space is a virtual address space.
Badiger discloses virtual address space (fig. 9, virtual address space 906).
Cheng and Badiger are analogous art because they are from the same field of endeavor in virtual machines. Before the time of the filing, it would have been obvious to a person of ordinary skill in the art, having the teaching of Cheng and Badiger before him or her to modify the computing system of Cheng to include the virtual address space of Badiger, thereafter the virtual functions are implemented within virtual address space of a memory within the computing system. The suggestion and/or motivation for doing so would be obtaining the advantage of utilizing shared memory of a computing system for multiple virtual machines (1:47-65) as suggested by Badiger. Therefore, it would have been obvious to combine Cheng with Badiger to obtain the invention as specified in the instant application claims.
As to claim 3, Badiger discloses the method of claim 1, wherein
the allocation (fig. 6, allocates ring buffer 602) is performed responsive to the VM transmitting, over a virtual channel isolated (fig. 5, shared memory channel) from the host OS (fig. 1, host 102),
a request (fig. 6, command 601) for the allocation to privileged software (fig. 1, hypervisor 118), the request causing the privileged software to configure the physical display engine (fig. 1, hardware platform 106) to perform configuring the physical display to generate the surface as a composite of a first surface (fig. 1, client application 127 of VM 120). (See TSM analysis above).
As to claims 4-5 and 11-12, Cheng discloses the method of claim 1, wherein the physical display engine generates the surface by compositing (fig. 2, compositing virtual machine displays 210/211/212 on single display 200) the image data with second image data provided by the memory system from a second portion (fig. 5, virtual function 513-3, VF 519-3) of the system memory that is assigned to a second display surface (fig. 2, virtual machine display 210/211/212) in a second [virtual (see Badiger above)] address space corresponding to a second VM (fig. 3, virtual machines 310-1/…/310-N).
As to claims 6 and 14, Cheng discloses the method of claim 1, wherein
the virtual channel is provided by a virtual network adapter (fig. 5, hypervisor 514) assigned to the VM, and
the transmitting includes routing (fig. 5, via hypervisor 514) by the virtual network adapter and internally within the host system, the image data from the VM to the portion of the system memory (fig. 5, routing VM 511 to VF 519; fig. 3, routing VM 310 to system 312).
As to claim 7, Cheng discloses the method of claim 1, wherein the display surfaces are isolated, from generation through to scan-out, from the host OS and another VM hosted using the host OS (fig. 3, VM 310-1/…/310-N are isolated; fig. 1, host OS 116).
As to claim 8, Cheng discloses the method of claim 1, wherein the VM is hosted using the host OS (fig. 1, host OS 116).
As to claim 13, Cheng discloses the processor of claim 9, wherein the transmitting the image data is performed using a kernel mode driver (fig. 5, hypervisor 514) of the virtual machine.
As to claims 15 and 20, Cheng discloses the processor of claim 9, wherein the processor is a system implemented partially in a data center (para.0024, servers).
As to claim 17, Cheng discloses the system of claim 16, wherein
the VM executes a first guest OS (fig. 2, virtual machine display 210) of the host OS, and
the transmitting causes the physical display engine (fig. 2, host operating system display 200) to composite (fig. 5, desktop compositor 515 & GPU driver 516-1) the display surfaces from the first guest OS and second display surface (fig. 2, virtual machine display 210) from a second guest OS (fig. 5, virtual machine 511-3) of the host OS into the surface.
As to claims 18-19, Cheng discloses the system of claim 16, wherein
a display engine manager is implemented in a privileged virtual machine (fig. 5, hypervisor 514) running at a higher privilege than the VM (fig. 5, VMs 511),
the display engine manager:
receives, from the VM over additional virtual channel (fig. 5, from VM 511 via virtual function 513 to VF 519) that is isolated from the host OS, a second request (fig. 5, VM 511-3 to VF 519-2) for the allocation; and
responsive to the request, configures the physical display engine to issue the request to the memory system using the [virtual] address space (fig. 2, display virtual machine display 210/211/212 on display 200).
Allowable Subject Matter
Claims 2 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The claim limitation of physical display engine to generate raster timing and initiate requests … for the image data as required in claims 2 and 10.
Conclusion
Applicant’s amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, this action is made final. See MPEP §706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire in THREE MONTHS from the mailing date of this action. In the event a first reply is filled within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date of the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136 (a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Cheng-Yuan Tseng whose telephone number is (571)272-9772, and fax number is (571)273-9772. The examiner can normally be reached on Monday through Friday from 09:00 to 17:30 Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alicia Harrington can be reached on (571)272-2330. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866)217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800)786-9199 (IN USA OR CANADA) or (571)272-1000.
/CHENG YUAN TSENG/Primary Examiner, Art Unit 2615
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