DETAILED ACTION
Claims 1 and 4-26 are pending.
Claims 15-18 are withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not sufficiently descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Drawings
The large set of drawings has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the drawings
The replacement FIGs are objected to for failing to comply with 37 CFR 1.84(a)(1) and 37 CFR 1.84(l), which requires the drawings be in black, and that all drawings be made by a process which will give them satisfactory reproduction characteristics. Every line, number, and letter must be durable, clean, solid black (except for color drawings), sufficiently dense and dark, and uniformly thick and well-defined. The weight of all lines and letters must be heavy enough to permit adequate reproduction. This requirement applies to all lines however fine, to shading, and to lines representing cut surfaces in sectional views. The drawings are pixelated because applicant did not use black (RGB = 000), despite the drawings appearing black to the naked eye. This has been confirmed by the examiner via color inspection of applicant’s submitted pdf file. The dithering used to convert applicant's grayscale image to black and white adds white pixels to try to estimate applicant's "gray" color, and the final drawings may not print properly or may print with reduced quality. Therefore, applicant must be sure to use only black and white. Applicant may perform the following process to correct the color content:
1. Open the drawings PDF file with Adobe Acrobat Pro DC (a similar Adobe product may work, but the examiner has only tested this in Adobe Acrobat Pro DC);
2. Click “File” and then click “Print”;
3. Select “Adobe PDF” as the printer. If not available, “Microsoft Print to PDF” may also work, though this has not been tested. If neither option is available, this process may not be applicable, and applicant should try to find an alternate way to print in only black and white.
4. Uncheck “Print in grayscale (black and white)”;
5. Uncheck “Save ink/toner”;
6. Click “Advanced”;
7. Under “Color Management”, for the “Color Profile” field, select “Black & White” near the bottom of the list. The examiner also had “Treat grays as K-only grays” checked, and “Preserve Black” checked.
8. Click “OK” and then click “Print”. The resulting PDF should comprise only black and white drawings. Please review the final drawings for potential unintended consequences of this process.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The figure or figure number of an amended drawing should not be labeled as “amended.” Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections/Recommendations
Claim 1 is objected to because of the following informalities:
In lines 12 and 20, does applicant mean to use a semicolon instead of a comma to be consistent with the remaining punctuation?
In line 17, delete the space before the semicolon.
Claim 19 is objected to because of the following informalities:
On p.9, 4th to last line, does applicant mean to use a semicolon instead of a comma to be consistent with the remaining punctuation?
Claim 20 is objected to because of the following informalities:
In line 13, delete “and”.
In the 5th to last line, does applicant mean to use a semicolon instead of a comma to be consistent with the remaining punctuation?
In claim 21, the examiner recommends inserting --completion-- before “indication”.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
Such claim limitations are:
In claim 1, “the second memory unit is configured to store output values…”. From paragraph [0369], this unit is interpreted as DRAM or SRAM, and equivalents thereof.
In claim 1, “a retry unit configured to: store a failed atomic command…; receive a modified atomic command…; and feed the modified command to the processor for an additional execution”. From paragraph [0394], this unit is interpreted as FIFO storage (i.e., a queue), and equivalents thereof.
In claim 7, “atomic command execution unit is…configured to output the return value for storage in a memory circuit”. While FIG.27 and at least FIGs.28A-B shows an ACEU (2710), the structure to perform the claimed outputting has not been found in the disclosure. As such, BRI is taken and related 112(a)/(b) rejections appear below.
In claim 7, “the one of the plurality of requestors is configured to generate an interrupt after the return value is stored in the memory circuit”. From paragraphs 430-431 and 66-67, a requestor is interpreted as an image processor, GPU, or any of the EyeQ series of processor chips (and equivalents thereof). While a processing unit, CPU, microprocessor, application processor, etc. are also listed, these are deemed generic processors and the examiner cannot find specific algorithms in the lengthy specification to perform the claimed non-coextensive function (see MPEP 2181(II)(B)). Consequently, generic processors are not encompassed by the claimed requestor(s) (unless by equivalence). If applicant wishes to broaden up this term, applicant could claim “requestor circuit” so as to not invoke 112(f).
In claim 9, “a security unit configured to store…”. The examiner has been unable to find structure corresponding to this unit in the disclosure. It is merely shown as a generic component 2808 (e.g. in FIG.28C). As such, broadest reasonable interpretation (BRI) is taken and related 112(a)/(b) rejections appear below.
In claim 10, “a security unit configured to validate…”. The examiner has been unable to find structure corresponding to this unit in the disclosure. It is merely shown as a generic component 2808 (e.g. in FIG.28C). As such, broadest reasonable interpretation (BRI) is taken and related 112(a)/(b) rejections appear below.
In claims 19-20, “executing…commands by the atomic command execution unit”. From paragraphs [0366] and [0417], this unit is interpreted to comprise a processor and/or at least one ALU and equivalents thereof.
In claims 19-20, “storing, in a first memory unit”. From paragraph [0369], this unit is interpreted as DRAM or SRAM, and equivalents thereof.
In claims 19-20, “storing, in a second memory unit”. From paragraph [0369], these units are interpreted as DRAM or SRAM, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 7-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Referring to claims 7 and 9-10, as described above in the “Claim Interpretation” section, the disclosure does not provide adequate structure for various units to perform their respective claimed functions. The specification does not demonstrate that applicant has made an invention that achieves the claimed function(s) because the invention is not described with sufficient detail such that one of ordinary skill in the art can reasonably conclude that the inventor had possession of the claimed invention.
Claim 8 is rejected due to its dependence on a claim lacking adequate written description.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7-10, and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claims recite the following limitations for which there is a lack of antecedent basis:
In claim 19, last line, “the atomic commands” because this could refer to the commands in lines 1 or 4.
Referring to claims 7, and 9-10, various “unit” + function limitations invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, as described above in the “Claim Interpretation” section, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed functions and to clearly link the structure, material, or acts to the functions. Therefore, the claims are indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim 8 is rejected due to its dependence on an indefinite claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-5, and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor et al. (US 2014/0181421 (as cited by applicant)), in view of Egolf (US 2002/0083063).
Referring to claim 1, O’Connor has taught an atomic command execution unit (FIG.1, at least APE 150) comprising:
an interface configured to receive, from a plurality of requestors, a plurality of memory mapped atomic commands (see FIG.1 and paragraph [0020], where APE receives, via some interface, atomic commands from requestors 110 and 112. From at least the abstract, these commands set forth operations on memory locations; thus, they are memory mapped atomic commands);
a first memory unit comprising a plurality of entries (FIG.1, 130), wherein different entries of the plurality of entries are allocated to different requestors of the plurality of requestors (from paragraph [0022]-[0023], requestors are allocated respective entries in repository 130 so as to lock memory locations accessed with the commands);
a second memory unit (paragraph [0026], cache); and
a processor (at least APE 150) configured to execute the plurality of memory mapped atomic commands (abstract), wherein:
the second memory unit is configured to store output values of the plurality of memory mapped atomic commands executed by the processor (from paragraph [0021], an atomic operation may be compare-and-swap, test-and-set, increment, or modifying a linked list, all of which are known to update a memory location. From FIG.1, APE would use memory controller 120 to access a memory location in memory 140 and lock that memory location in lock repository 130. Memory 140 is SRAM or DRAM (paragraph [0018]), the same as applicant’s under 112(f) interpretation. Alternatively, see paragraph [0026]. Note that cache is typically implemented in SRAM (and one cache is SRAM based on paragraph [0018]). Even if the cache of paragraph [0026] is not SRAM, whatever memory is used to implement the cache is deemed an equivalent of SRAM or DRAM since cache is not excluded by applicant’s specification and the cache would store data is a substantially manner as SRAM/DRAM, i.e., the data would be retained in association with some address and be made accessible for any of these types of memory. See MPEP 2183), and
the interface is further configured to output at least one completion indication to at least one of the plurality of requestors, wherein the at least one completion indication represents a completion of at least one of the plurality of memory mapped atomic commands (paragraph [0025]).
O’Connor has not taught a retry unit (FIFO/queue, and equivalents, per 112(f) interpretation) configured to: store a failed atomic command from among the plurality of memory mapped atomic commands, receive a modified atomic command, the modified atomic command representing a modification to the at least one failed atomic command; and feed the modified atomic command to the processor for an additional execution. However, Egolf has taught that when a task fails to obtain a lock, the task is queued to be fed back to the processor at a later point, i.e., retried for an additional execution (see paragraphs 4-5 and FIG.2 (and associated description)). Within the queue, the command/task may be modified by modifying the command’s priority to a temporary high priority, for instance, to allow the task to dispatch earlier when the task holds another lock it hasn’t released. This allows the task to potentially release a lock sooner to free up other tasks (see FIG.6, paragraphs 22 and 43-44, and FIGs.2-3 (and their respective descriptions)). One of ordinary skill in the art would have recognized that queueing a task for a subsequent re-attempt allows for the eventual performance of all tasks so as to carry out all desired operations without performing power-consuming spin locks. In addition, the queue provides one central location from which to pull previously failed tasks and this would reduce having to signal each individual core to re-send the task, which could be inefficient due to the extra communication and re-transmission needed from the cores. The priority adjustment prioritizes tasks that are waiting for a lock but already have another lock, while also preventing starvation of tasks (abstract and paragraph 45). As a result, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor to include a retry unit (FIFO/queue, and equivalents, per 112(f) interpretation) configured to: store a failed atomic command from among the plurality of memory mapped atomic commands, receive a modified atomic command, the modified atomic command representing a modification to the at least one failed atomic command; and feed the modified atomic command to the processor for an additional execution.
Referring to claim 4, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, wherein the interface is configured to prevent sending the completion indication to a requestor that sent the least one of the plurality of memory mapped atomic commands until a completion of the at least one of the plurality of memory mapped atomic commands (from paragraph [0025], the notification is a completion notification. By definition, this notification would only be sent when the command has been completed. Sending it before could not be indicative of completion).
Referring to claim 5, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, wherein the interface is configured to output, to one of the plurality of requestors that transmitted one of the plurality of memory mapped atomic commands, a return value (again, see paragraph [0026], where a return value of the command is sent to the requestor’s cache. Alternatively, the return value may be the completion indication/notification (paragraph [0025])).
Referring to claim 11, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, wherein one of the plurality of requestors includes an application processor (see paragraph [0017], which states that the cores may be application-specific, which would make them application processors. Processors also generally run programs/applications).
Referring to claim 12, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, wherein one of the plurality of requestors includes an image processor (see FIG.1, GPU 112).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf and Bastiani et al. (US 6,675,243).
Referring to claim 6, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, but has not taught wherein the at least one completion indication includes an interrupt request. That is, O’Connor merely describes providing a completion indication, but not the type of indication. However, Bastiani has taught that an interrupt can be used by a component to notify another component of completion of failure or a task (see column 10, lines 26-32). In general, an interrupt is a known notification having priority such that it is handled immediately, thereby allowing the system to act on the completion to perform whatever task is necessary. As a result, in order to notify O’Connor’s cores for immediate action upon completion of an atomic command, for whatever purpose (to obtain the data in the cache before it is replaced, to proceed with scheduling dependent instructions, etc.), it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor such that the at least one completion indication includes an interrupt request.
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf and Mohamed et al. (US 5,978,838).
Referring to claim 7, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, but has not taught wherein: the at least one of the completion indication includes a return value; the atomic command execution unit is further configured to output the return value for storage in a memory circuit of a predefined address associated with one of the plurality of requestors associated with a corresponding one of the plurality of memory mapped atomic commands; and the one of the plurality of requestors is configured to generate an interrupt after the return value is stored in the memory circuit. However, Mohamed has taught that an external engine 120 completes a task, stores a result indicative of completion into a register associated with a main processor 110, and also sets a state flag (VPSTATE) in an extended register (also associated with main processor 110). The requestor generates an interrupt so as to clear VPSTATE (column 8, lines 44-47) and obtain a result from the engine. Also, see the abstract and FIG.3. This allows for a main processor to simply realize synchronization with the external engine (at least abstract), and allows the main processor to obtain the result of the engine from the result register (using the MVFP instruction in FIG.3, step 380). As a result, in order to be notified when the engine completes a command and then access any result of the engine (for instance, of an increment operation performed in O’Connor), it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor such that the at least one of the completion indication includes a return value; the atomic command execution unit is further configured to output the return value for storage in a memory circuit of a predefined address associated with one of the plurality of requestors associated with a corresponding one of the plurality of memory mapped atomic commands; and the one of the plurality of requestors is configured to generate an interrupt after the return value is stored in the memory circuit. Note that, in the combination, the requestor may be a GPU 112 (or image processor).
Referring to claim 8, O’Connor, as modified, has taught the atomic command execution unit according to claim 7, wherein the memory circuit is a register (the result generated by the APE and a flag in an extended register allowing a core to determine when the Apis finished are both in a register).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf and Widdup (US 2002/0019911).
Referring to claim 9, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, but has not taught a security unit configured to store a predefined address associated with one of the plurality of requestors. However, Widdup has taught that memory addresses are checked by a security unit (130 and/or 140) for being out of range and, if so, an error is generated (see paragraph [0039]). Such a unit protects memory addresses that are outside of an acceptable range, thereby improving security. As a result, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor to include a security unit configured to store a predefined address associated with one of the plurality of requestors.
Referring to claim 10, O’Connor, as modified, has taught the atomic command execution unit according to claim 1, but has not taught a security unit configured to validate that the plurality of the memory mapped atomic commands are received from the plurality of requestors. However, this is obvious for similar reasoning given in the rejection of claim 9. The commands are interpreted to be within-range commands, and the security unit of Widdup confirms whether the commands received from the requestors are within range.
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf, Yoda et al. (US 2019/0196887), and the examiner’s taking of Official Notice.
Referring to claim 13, O’Connor, as modified, has taught the atomic command execution unit according to claim 12, but has not taught wherein at least one of the plurality of memory mapped atomic commands received from the image processor is associated with an analysis of an image to identify one or more objects in the image. However, Yoda has taught a GPU with multiple cores to detect features of an image using a convolutional neural network, which has known advantages in object detection. Part of this implementation involves executing read-modify-write (RMW) commands to carry out convolution to detect features based on filters (see paragraphs [0003]-[0004]. Official Notice is taken that executing RMW atomically was well known in the art before applicant’s invention. As with all atomic commands, the benefit is that a location can only be accessed by one command at a time, thereby ensuring another command does not access the incorrect data (e.g. read the location before the update from another command has been written). As a result, to implement machine learning in O’Connor in a way that ensures data integrity and prevents incorrect execution, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor such that at least one of the plurality of memory mapped atomic commands received from the image processor is associated with an analysis of an image to identify one or more objects in the image.
Referring to claim 14, O’Connor, as modified, has taught the atomic command execution unit according to claim 13, wherein an output value of the at least one of the plurality of memory mapped atomic commands received from the image processor includes an indication of an identified object in the image (output of convolution would include data that identifies the objects corresponding to the filters, e.g. an edge).
Claims 13-14 are alternatively rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf and Matveev et al. (US 2019/0370071).
Referring to claim 13, O’Connor, as modified, has taught the atomic command execution unit according to claim 12, but has not taught wherein at least one of the plurality of memory mapped atomic commands received from the image processor is associated with an analysis of an image to identify one or more objects in the image. However, Matveev has taught a number of atomic commands executed in a CNN to identify objects in an image. See paragraphs [0003]-[0010] and [0092]-[0105]. Specifically, CAS and/or F&A commands may be used in a process to allow one thread to generate results for another thread and not allow the other thread to access the results before they are ready, thereby ensuring correct execution while avoiding re-computation involving overlapping areas of an image. A CNN has known advantages in object detection. As a result, to implement machine learning in O’Connor in a way that ensures data integrity and prevents incorrect execution, while also reducing re-work, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor such that at least one of the plurality of memory mapped atomic commands received from the image processor is associated with an analysis of an image to identify one or more objects in the image.
Referring to claim 14, O’Connor, as modified, has taught the atomic command execution unit according to claim 13, wherein an output value of the at least one of the plurality of memory mapped atomic commands received from the image processor includes an indication of an identified object in the image (see the pseudocode in paragraph [0094]. A convolution output is streamed to a buffer region atomically. An output of convolution would include data that identifies the objects corresponding to filters).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf and Kulkarni et al., U.S. Patent Application Publication No. 2017/0295236.
Claim 19 is mostly rejected for similar reasoning as claim 1. Furthermore, O’Connor has taught an atomic command execution unit (interpreted as a processor per 112(f)) to execute the plurality of commands and provide output values execution unit (see FIGs.1-2C, APE 150, 250x)).
O’Connor has taught that the first memory unit can hold a Bloom filter (paragraph [0023]. However, O’Connor has not taught that the first memory unit is an SRAM or DRAM (as applicant’s first memory unit is interpreted to be under 112(f)). However, Kulkarni has taught storing a Bloom filter in SRAM for fast access. SRAM is known fast storage in the art. As a result, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify O’Connor such that a first memory unit is an SRAM.
Claim 20 is mostly rejected for similar reasoning as claim 19. Furthermore, O’Connor has taught a non-transitory computer-readable medium storing instructions that, when executed by at least one processor, are configured to cause the at least one processor to perform the operations of claim 20 (e.g. see FIG.5. All computing systems have a medium storing code which causes operations to be performed therein).
Claim 24 is rejected for similar reasoning as claim 12.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf, Kulkarni, and Bastiani.
Claim 21 is rejected for similar reasoning as claim 6.
Claims 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf, Kulkarni, and Widdup.
Claims 22-23 are rejected for similar reasoning as claims 9-10, respectively.
Claims 25-26 are rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf, Kulkarni, Yoda, and the examiner’s taking of Official Notice.
Claims 25-26 are rejected for similar reasoning set forth in the first rejections of claims 13-14 above, respectively.
Claims 25-26 are alternatively rejected under 35 U.S.C. 103 as being unpatentable over O’Connor in view of Egolf, Kulkarni, and Matveev.
Claims 25-26 are rejected for similar reasoning set forth in the second rejections of claims 13-14 above, respectively.
Response to Arguments
On page 14 of applicant’s response (hereafter “the response”), applicant states that the title suggested by the examiner has been adopted.
The examiner notes that the examiner did not suggest a title, and that the title has not been changed. Thus, the objection is maintained.
On page 14 of the response, applicant discusses a replacement FIG.9. However, no objection was made to FIG.9, nor has a replacement FIG.9 been received.
On pages 15-16 of the response, applicant argues the 112(f) interpretation of the various claimed units, noting that courts have repeatedly found the term “unit” to recite sufficient structure.
MPEP 2181(I)(A) sets forth a list of non-structural generic placeholders, including “unit for”. The examiner could understand “unit” not invoking in certain situations, i.e., when “unit” is combined with other words that form a known structural component. For instance, “a central processing unit for…” would not invoke 112(f) in the examiner’s opinion, because a CPU is a known structural component in the art. However, applicant’s claimed terms (retry unit, security unit, atomic command execution unit, etc.) do not have known structural meaning. They each pass the 3-prong test and thus invoke 112(f). Thus, the 112(f) interpretations are maintained. The examiner notes that applicant can claim these components as circuits to not invoke 112(f), e.g. “a retry circuit”.
On page 16 applicant argues that an atomic execution unit is a processing device for executing commands within a shared memory, and the various subunits, such as the retry unit, are part of the overall processing device.
The issue is that applicant is using generic terminology that passes the 3-prong test in MPEP 2181. If a memory unit is a memory, then the examiner recommends claiming it as a memory, which is structural, and not as a memory unit, which is generic. If an atomic command execution unit is a processor, then the examiner recommends claiming it as an atomic command processor, not as a unit.
On page 20 of the response, applicant argues that Egolf discloses prioritizing tasks, not receiving a modified command that is fed for an additional execution.
The examiner asserts that applicant may be reading the claims too narrowly. The priority is considered part of the command. After a command fails, it would enter a queue with a priority that may be modified to give the command elevated priority so that it is processed sooner. This is reasonably mapped to the claimed modified command. The examiner notes that applicant does not claim the nature of the modification in a distinctive way. The examiner recommends claiming how the command is modified.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to David J. Huisman whose telephone number is 571-272-4168. The examiner can normally be reached on Monday-Friday, 9:00 am-5:30 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta, can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/David J. Huisman/Primary Examiner, Art Unit 2183