Prosecution Insights
Last updated: October 02, 2026

Examiner: HUISMAN, DAVID J

Tech Center 2100 • Art Units: 2100 2183

This examiner grants 58% of resolved cases

Analysis

David J. Huisman examines cases in Art Unit 2100 of Tech Center 2100. He has 687 resolved cases and an allowance rate of 57.8%. This indicates a moderate level of difficulty for applicants. The median days to allowance is 1712, which is a very long timeframe for successful applications. Practitioners must be prepared for the 1712-day timeline when their cases are assigned to this docket.

The interview lift of 34.0% is very high, suggesting that interviews are essential for overcoming hurdles in his docket. This lift can significantly enhance the 57.8% base allowance rate through direct communication. With 687 resolved cases, the 34.0% lift is a strong and consistent signal for practitioners in Art Unit 2100. The 1712-day median pendency is a critical factor for long-term planning. Leveraging the 34.0% lift is the most effective way to improve the probability of success. These metrics suggest that while the process is lengthy, oral advocacy provides a substantial advantage for achieving a grant.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

57.8%
Allow Rate
+2.8% vs TC avg
776
Total Applications
+34.0%
Interview Lift
1712
Avg Prosecution Days
Based on 687 resolved cases, 2023–2026

Rejection Statute Breakdown

6.7%
§101 Eligibility
19.7%
§102 Novelty
35.1%
§103 Obviousness
32.0%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
19173390 DISTRIBUTED PROCESSING APPARATUS AND OPERATING METHOD THEREOF Non-Final OA Samsung Electronics Co., Ltd.
19018977 Prefetcher based on PC-relative Operations Final Rejection Apple Inc.
18453010 Coprocessor Register Renaming Non-Final OA Apple Inc.
18665725 DIFFERENTIAL TREATMENT OF CONTEXT-SENSITIVE INDIRECT BRANCHES IN INDIRECT TARGET PREDICTORS Final Rejection HUAWEI TECHNOLOGIES CO., LTD.
18380409 METHOD AND APPARATUS FOR SOFTWARE-DIRECTED INHIBITING OF BRANCH PREDICTION IN COMPUTING DEVICES Final Rejection HUAWEI TECHNOLOGIES CO., LTD.
18220536 METHOD AND SYSTEM FOR TASK DUPLICATION AND MIGRATION INCLUDING FORWARDING OF MICROARCHITECTURAL CONTEXT INFORMATION Non-Final OA Google LLC
18399473 SYSTEMS AND METHODS FOR EXECUTING A FUSED MULTIPLY-ADD INSTRUCTION FOR COMPLEX NUMBERS Non-Final OA Intel Corporation
18374296 HYBRID PERFORMANCE MONITORING UNIT (PMU) ENUMERATION Final Rejection Intel Corporation
18217428 APPARATUS AND METHOD FOR PREFETCHING DATA WITH HINTS Non-Final OA Intel Corporation
17958382 INSTRUCTIONS TO CONVERT FROM FP8 Final Rejection Intel Corporation
17955364 FAR JUMP AND INTERRUPT RETURN Final Rejection INTEL CORPORATION
17955379 CPUID ENUMERATED DEPRECATION Final Rejection Intel Corporation
17841555 PROCESSOR CIRCUITRY TO DETERMINE A STATE OF ENABLEMENT OF A SYNCHRONIZATION CONTROL FOR THREADS OF EXECUTION Final Rejection Intel Corporation
17530156 RUNTIME CONFIGURABLE REGISTER FILES FOR ARTIFICIAL INTELLIGENCE WORKLOADS Non-Final OA Intel Corporation
17512119 HARDWARE PROCESSORS AND METHODS FOR EXTENDED MICROCODE PATCHING Non-Final OA Intel Corporation
18824034 BUS FOR TRANSPORTING OUTPUT VALUES OF NEURAL NETWORK LAYER Non-Final OA Amazon Technologies, Inc.
18411185 COMPUTATION PROCESSING APPARATUS AND METHOD FOR OBSERVING OPERATION STATE BASED ON MASK INFORMATION TO PARALLELIZE INSTRUCTIONS Final Rejection FUJITSU LIMITED
19184604 TERMINAL DEVICE, METHOD AND APPARATUS FOR PROCESSING DATA BASED ON MODEL, AND STORAGE MEDIUM Non-Final OA Beijing Zitiao Network Technology Co., Ltd.
18984970 OPTIMIZING FPGA RESOURCE UTILIZATION WITH DSP-BASED MASK OPERATORS Non-Final OA Microsoft Technology Licensing, LLC
18103796 PARALLELIZING MULTI-PHASE KERNELS WITH CROSS-PHASE DEPENDENCY ON HETEROGENOUS HARDWARE Non-Final OA Microsoft Technology Licensing, LLC
18089582 MEMORY CONTROLLER AND MEMORY SYSTEM FOR GENERATING INSTRUCTION SET BASED ON NON-INTERLEAVING BLOCK GROUP INFORMATION Non-Final OA SK hynix Inc.
18174715 INSTRUCTION PACKING SCHEME FOR VLIW CPU ARCHITECTURE Non-Final OA TEXAS INSTRUMENTS INCORPORATED
17904081 ACCESSING COMPRESSED FIRMWARE DATA USING HEADER INFORMATION Final Rejection Micron Technology, Inc.
17021819 PROGRAMMABLE ELECTRONIC DEVICES AND METHODS FOR SELECTING MEMORY ZONES FROM RESPECTIVE POSITIONS OF INSTRUCTIONS OF A PROGRAM Non-Final OA STMicroelectronics (Grenoble 2) SAS
17468574 System of Multiple Stacks in a Processor Devoid of an Effective Address Generator Final Rejection Microchip Technology Inc.
18148873 Permute Instructions for Register-Based Lookups Final Rejection Advanced Micro Devices, Inc.
17843640 Controlling Instruction Dispatch based on Counts of Dynamic VLIW Data Communications Final Rejection Advanced Micro Devices, Inc.
17557667 GENERAL PURPOSE REGISTER HIERARCHY SYSTEM AND METHOD Non-Final OA ADVANCED MICRO DEVICES, INC.
18961938 MULTI-TAKEN PREDICTION ENTRIES FOR PREDICTION RESUMPTION Final Rejection Arm Limited
17900975 WRITE-BACK RESCHEDULING Non-Final OA Arm Limited

Facing This Examiner?

IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.

Build Your Strategy

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month