Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Group II, reading on claims 11-20, in the reply filed on 06/23/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 1-10 remain withdrawn.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Uchida et al. (US 20200266221 A1; hereinafter “Uchida”) in view of Yang et al. (US 20230343883 A1; hereinafter “Yang”).
In re claim 11, Uchida discloses, in figs. 1-2, 4-6, 17, an image sensor, comprising:
a semiconductor substrate 70 including first and second potential barrier regions 83, 84 and a photoelectric conversion region 71 (fig. 17; ¶132); and
a pixel isolation structure 82 disposed in the semiconductor substrate 70 to define a plurality of pixel regions 50m (figs. 4, 17; ¶131-133, 212-215),
wherein the pixel isolation structure 82 comprises:
a filling pattern 86 vertically penetrating the semiconductor substrate 70 (¶fig. 17; ¶138); and
an insulating liner pattern 85 disposed between the filling pattern 86 and the semiconductor substrate 70 (fig. 17; ¶138),
the first potential barrier region 83 is of a first conductivity type (e.g., p-type; ¶132),
the second potential barrier region 84 and the photoelectric conversion region 71 are of a second conductivity type (e.g., n-type; ¶132, 133; “N-type solid-phase diffusion layer 84”, “the PD 71 in the embodiment includes an N-type region.”),
the first potential barrier region 83 is positioned closer to the pixel isolation structure 82 than the second potential barrier region 84, and
dopants of the first conductivity type (e.g., boron; ¶155) have a diffusion coefficient that is less than dopants of the second conductivity type (e.g., phosphorus; ¶153-154) (as explained in ¶152-158 and fig. 6, phosphorus dopants diffused deeper into the substrate 70 forming n-doped region 84 compared to boron diffusion into the substrate forming p-doped region 83).
Uchida discloses, in figs. 1-2, 4-6, 17, wherein: the dopants of the first conductivity type comprise boron (¶155); and the dopants of the second conductivity type comprise phosphorus (P) (¶153-154).
Uchida does not expressly disclose dopants of the first conductivity type have a diffusion coefficient that is less than dopants of the second conductivity type.
In the same field of endeavor, Yang discloses, in fig. 6C, an image sensor, wherein:
dopants of a first conductivity type in a first doped region 304 comprise gallium (¶23, 36).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form a p-doped region adjacent to the pixel isolation structure in the image sensor of Uchida comprising gallium dopants as gallium has a low likelihood to diffuse out and thereby decreasing diffusion of the dopant from the doped region during front-end of line processing steps and/or operation of the image sensor. This, in part, increases isolation between the first and second doped regions and increases the full well capacity of the photodetector, thereby improving performance of the image sensor (¶17 of Yang).
The combined teachings of Uchida and Yang disclose dopants of the first conductivity type have a diffusion coefficient that is less than dopants of the second conductivity type.
In re claim 12, Uchida, as modified by Yang, discloses the image sensor of claim 11 outlined above.
Uchida further discloses, in figs. 1-2, 4-6, 17, the image sensor of claim 11, wherein:
the first and second potential barrier regions 83, 84 are located between the pixel isolation structure 82 and the photoelectric conversion region 71; and
the second potential barrier region 84 is positioned closer to the photoelectric conversion region 71 than the first potential barrier region 83.
In re claim 13, Uchida, as modified by Yang, discloses the image sensor of claim 11, wherein: the dopants of the first conductivity type comprise gallium (Ga) (Yang: ¶23, 36); and the dopants of the second conductivity type comprise phosphorus (P) (Uchida: ¶153-154).
In re claim 14, Uchida, as modified by Yang, discloses the image sensor of claim 11 outlined above.
Uchida further discloses, in figs. 1-2, 4-6, 17, the image sensor of claim 11, wherein the dopants of the first conductivity type (i.e., p-type dopant) have a highest doping concentration in the first potential barrier region 83 (¶135, 277-276).
In re claim 15, Uchida, as modified by Yang, discloses the image sensor of claim 11 outlined above.
Uchida further discloses, in figs. 1-2, 4-6, 17, the image sensor of claim 11, wherein the dopants of the second conductivity type (i.e., n-type dopant) have a highest doping concentration in the second potential barrier region 84 (¶135, 525).
In re claim 16, Uchida, as modified by Yang, discloses the image sensor of claim 11 outlined above.
Uchida further discloses, in figs. 1-2, 4-6, 17, the image sensor of claim 11, further comprising a transfer gate electrode 80m including a first portion (e.g., a top flat portion) disposed directly on a first surface (e.g., an upper surface) of the semiconductor substrate 70, and a second portion (e.g., a second portion within the trench 81-1) that extends from the first portion towards a second surface (e.g., a lower surface) of the semiconductor substrate 70 and is located in the semiconductor substrate 70 (fig. 17; ¶212-215).
In re claim 17, Uchida, as modified by Yang, discloses the image sensor of claim 16 outlined above.
Uchida further discloses, in figs. 1-6, 17, the image sensor of claim 16, wherein the transfer gate electrode 80m includes a plurality of the second portions (e.g., plurality of second portions in the trenches 81-1, 81-2) (fig. 17; ¶212-215).
Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Uchida in view of Yang and further in view of Kim et al. (US 20220102405 A1; hereinafter “Kim”) and Chen et al. (US 20230131599 A1; hereinafter “Chen”).
In re claim 18, Uchida discloses, in figs. 1-2, 4-6, 17, the image sensor of claim 11 outlined above.
Uchida does not expressly disclose the pixel isolation structure further comprises an insulating gap-fill pattern on the filling pattern; and the insulating gap-fill pattern has a top surface that is coplanar with a top surface of the insulating liner pattern.
In the same field of endeavor, Kim discloses, in figs. 6-7, an image sensor, wherein:
an insulating gap-fill pattern 217 on a filling pattern 215 (fig. 7A; ¶106); and
the insulating gap-fill pattern 217 has a top surface that is coplanar with a top surface of an insulating liner pattern 211 (fig. 7A; ¶106).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form an insulating gap-fill pattern on the filling pattern in the image sensor of Uchida and the insulating gap-fill pattern has a top surface that is coplanar with a top surface of the insulating liner pattern based on the teachings of Kim. One would have been motivated to do so as Chen teaches the dielectric capping pattern 260 formed on a conductive filling pattern 250 reduces current leakage (figs. 1-28, ¶32).
In re claim 19, Uchida discloses, in figs. 1-2, 4-6, 18, an image sensor, comprising:
a semiconductor substrate 70 having a first surface (“An active region (Pwell) 77 is formed on the side (in the figure, upper side that is the front surface side)”; ¶128. Hereinafter “S1”) and a second surface 75 (hereinafter “S2”; ¶124) that are opposite to each other, and comprising a light-receiving region (plurality of the pixels 50n in the pixel array section 41) (¶219. Hereinafter “Light_RCV”), a light-blocking region (regions in between the pixels 50n in the pixel array section 41; ¶125. Hereinafter “Light_BLK”);
a pixel isolation structure 82n disposed in the semiconductor substrate 70 and in the light-receiving region (Light_RCV) and the light-blocking region (Light_BLK) to define a plurality of pixel regions 50n (¶219-225),
the pixel isolation structure 82n comprising
a filling pattern 86 vertically penetrating the semiconductor substrate 70 (¶fig. 67; ¶138), an insulating liner pattern 85 interposed between the filling pattern 86 and the semiconductor substrate 70 (fig. 67; ¶138),
a transfer gate electrode 80 including a first portion (e.g., a top portion) disposed directly on the first surface of the semiconductor substrate S1, and at least one second portion (e.g., a portion of the transfer gate electrode in the vertical trench 81) that extends from the first portion towards the second surface of the semiconductor substrate S2 and is located in the semiconductor substrate 70 (¶129);
photoelectric conversion regions 71 disposed in the light-receiving region (Light_RCV) and the light-blocking region (Light_BLK) and in the plurality of pixel regions of the semiconductor substrate 50n (¶124);
a back-side contact plug 74n-1 disposed in a portion of the light-blocking region (Light_BLK) and positioned adjacent to the second surface of the semiconductor substrate S2 and in direct contact with a portion of the filling pattern 86 (fig. 18; ¶219-225);
color filters disposed on the second surface of the semiconductor substrate S2 (¶124) to correspond to the plurality of pixel regions 50n (“Further, although not shown in FIG. 3, a color filter layer may be formed between the OCL 76 and the planarized film 73”; ¶127); and
micro lenses 76 on the color filters (¶126-127),
wherein the semiconductor substrate 70 comprises a first potential barrier region 83 of a first conductivity type (e.g., p-type; ¶132) and a second potential barrier region 84 of a second conductivity type (e.g., n-type; ¶132, 133; “N-type solid-phase diffusion layer 84”, “the PD 71 in the embodiment includes an N-type region.”), and
Uchida does not expressly disclose in the embodiment shown in fig. 18, the semiconductor substrate comprising a pad region; a conductive pad disposed in the pad region and on the second surface of the semiconductor substrate.
However, Uchida further discloses, in figs. 68-69, the semiconductor substrate 70 comprising
a pad region 501, 502 (fig. 68; ¶554-555),
a conductive pad 502 disposed in the pad region and on the second surface of the semiconductor substrate S2 (fig. 68; ¶554).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of the embodiment shown in figs. 68-69 into the embodiment shown in fig. 18 of Uchida in order to facilitate establishing connection terminals between the pixel and other semiconductor substrates (¶554 of Uchida).
Uchida further discloses, in figs. 1-2, 4-6, 17, wherein: the dopants of the first conductivity type comprise boron (¶155); and the dopants of the second conductivity type comprise phosphorus (P) (¶153-154).
Uchida does not expressly disclose dopants of the first conductivity type have a diffusion coefficient that is less than dopants of the second conductivity type.
In the same field of endeavor, Yang discloses, in fig. 6C, an image sensor, wherein:
dopants of a first conductivity type in a first doped region 304 comprise gallium (¶23, 36).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form a p-doped region adjacent to the pixel isolation structure in the image sensor of Uchida comprising gallium dopants as gallium has a low likelihood to diffuse out and thereby decreasing diffusion of the dopant from the doped region during front-end of line processing steps and/or operation of the image sensor. This, in part, increases isolation between the first and second doped regions and increases the full well capacity of the photodetector, thereby improving performance of the image sensor (¶17 of Yang).
The combined teachings of Uchida and Yang disclose dopants of the first conductivity type have a diffusion coefficient that is less than dopants of the second conductivity type.
Uchida as modified by Yang does not expressly disclose the pixel isolation structure further comprises an insulating gap-fill pattern on the filling pattern; and the insulating gap-fill pattern has a top surface that is coplanar with a top surface of the insulating liner pattern.
In the same field of endeavor, Kim discloses, in figs. 6-7, an image sensor, wherein:
an insulating gap-fill pattern 217 on a filling pattern 215 (fig. 7A; ¶106); and
the insulating gap-fill pattern 217 has a top surface that is coplanar with a top surface of an insulating liner pattern 211 (fig. 7A; ¶106).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form an insulating gap-fill pattern on the filling pattern in the image sensor of Uchida as modified by Yang and the insulating gap-fill pattern has a top surface that is coplanar with a top surface of the insulating liner pattern based on the teachings of Kim. One would have been motivated to do so as Chen teaches the dielectric capping pattern 260 formed on a conductive filling pattern 250 reduces current leakage (figs. 1-28, ¶32).
In re claim 20, Uchida, as modified by Yang, Kim and Chen, discloses the image sensor of claim 19 outlined above.
Uchida further discloses, in figs. 1-6, 17, the image sensor of claim 19, wherein: the first and second potential barrier regions 83, 84 are located between the pixel isolation structure 82 and the photoelectric conversion regions 71; and the first potential barrier region 83 is positioned closer to the pixel isolation structure 82 than the second potential barrier region 84.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chiang et al. (US 10304886 B2) discloses, in fig. 2, a PN junction formed by p-doped liner 114 and n-doped region 104b adjacent to a pixel isolation structure 112 (C. 3, L. 25-57).
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893
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