DETAILED ACTION
Claims 1-20 are presented for examination.
This Office Action is in response to submission of documents on October 28, 2024.
Objection to claims 18-20 for minor informalities.
Rejection of claims 5, 11, 13-16, and 18-20 under 35 U.S.C. 112(b) as being indefinite.
Rejection of claims 1-20 under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Rejection of claims 1-3, 6-8, 10, and 17 under 35 U.S.C. 103 as being obvious over Kim, et al. in view of Conner and Kalyanaraman.
Rejection of claims 4-5 under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman, and further in view of Li.
Rejection of claim 9 under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman, and further in view of Johnson.
An Examiner’s Note regarding claims 11-16 and 18-20 is provided in the Conclusion section of this Office Action.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 18-20 are objected to because of the following informalities: Claim 17 claims “stored instructions, which when executed by a processor, cause the processor to” perform a series of steps. However, claims 18-20 recite that the “processor is further configured to” perform additional steps. To address the inconsistency, Examiner suggests amending claims 18-20 to recite “wherein the instructions further cause the processor to….” Doing so makes the claim language more consistent and further avoids any potential interpretation under 35 U.S.C. 112(f). Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “a primary processing device configured to…” and “a secondary processing device from among the plurality of secondary processing devices being configured to…” in claim 1.
In both instances, a “processing device” is a generic placeholder for any number of devices and is not modified by sufficient structure for performing the recited function. Further, the generic “processing device” is modified by “configured to,” which is a transition phrase that links the generic placeholder with the recited functionality.
Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5, 11, 13-16, and 18-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites “anomalies.” There is insufficient antecedent basis for this limitation in claim 5 because claim 1, on which claim 5 depends, recites “one or more anomalies.” Examiner suggests amending claim 5 to recite “the one or more anomalies.”
Claim 11, 13-16, and 18-20 recite the limitation "one or more anomalies" in the final “determining” step. There is insufficient antecedent basis for this limitation in claim 11 because claim 10, on which claim 11 depends, recites “one or more anomalies.” Examiner suggests amending claim 11 to recite “the one or more anomalies.”
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to judicial exceptions without significantly more. The claims recite mental processes. This judicial exception is not integrated into a practical application because the additional elements that are recited in the claims are extra-solution activities that do not integrate the judicial exceptions into a practical application. The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception because courts have found that the steps of data gathering and recitation of generic computer components are not significantly more than a judicial exception.
Claim 1
Step 1: The claim is directed to a system, falling under one of the four statutory categories of invention.
Step 2A, Prong 1: The claim 1 limitations include (bolded for abstract idea identification):
Claim 1
Mapping Under Step 2A Prong 1
An anomaly detection system comprising: a primary processing device configured to
receive one or more input signals from a simulated system on chip (SoC) circuit electrically coupled to the primary processing device and to
classify the one or more input signals based on respective communication protocols of the one or more input signals; and
a plurality of secondary processing devices communicatively coupled to the primary processing device, a secondary processing device from among the plurality of secondary processing devices being configured to
receive signals from among the classified one or more input signals from the primary processing device, and to
determine one or more anomalies in the received signals, the received signals having a communication protocol corresponding to the secondary processing device.
Abstract Idea: Mental Process
Classifying a signal based on the associated communication protocol of the signal is a mental process that can be performed in the human mind. For example, a human can observe the origin of a signal and/or the form of the signal (such as by observing and evaluating the signal via an interface) and determine a classification for the signal. See e.g., MPEP 2106.04(a)(2).
Abstract Idea: Mental Process
Determining an anomaly in a signal is a mental process that can be performed by a human. See e.g., MPEP 2106.04(a)(2). The claim does not provide any details about how the processor operates or how the detection is made, and the plain meaning of “detecting” encompasses mental observations or evaluations, e.g., a computer programmer’s mental identification of an anomaly in a data set. See also, Example 47, Claim 2 of USPTO July 2024 Subject Matter Eligibility Examples.
Step 2A, Prong 2: The claim 1 limitations recite (bolded for additional element identification):
Claim 1
Mapping Under Step 2A Prong 2
An anomaly detection system comprising: a primary processing device configured to
receive one or more input signals from a simulated system on chip (SoC) circuit electrically coupled to the primary processing device and to
classify the one or more input signals based on respective communication protocols of the one or more input signals; and
a plurality of secondary processing devices communicatively coupled to the primary processing device, a secondary processing device from among the plurality of secondary processing devices being configured to
receive signals from among the classified one or more input signals from the primary processing device, and to
determine one or more anomalies in the received signals, the received signals having a communication protocol corresponding to the secondary processing device.
Reciting generic computer components is the additional element of instructions to apply the recited judicial exception, which courts have found does not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
The limitation is directed to the extra-solution activity of data gathering. The limitation does not impose meaningful limits on the claim and thus is minimally or tangentially related to the invention. See MPEP 2106.05(g).
Reciting generic computer components is the additional element of instructions to apply the recited judicial exception, which courts have found does not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
The limitation is directed to the extra-solution activity of data gathering. The limitation does not impose meaningful limits on the claim and thus is minimally or tangentially related to the invention. See MPEP 2106.05(g).
Step 2B: Regarding Step 2B, the inquiry is whether any of the additional elements (i.e., the elements that are not the judicial exception) amount to significantly more than the recited judicial exception. Reciting generic computer components and data gathering are both additional elements that courts have found do not amount to significantly more than the recited judicial exceptions. See MPEP 2106.05(f), Alice Corp. v. CLS Bank, 573 U.S. 208, 221, 110 USPQ2d 1976, 1982-83 (2014), Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 112 USPQ2d 1750 (Fed. Cir. 2014); Electric Power Group, LLC v. Alstom, S.A., 830 F.3d 1350, 119 USPQ2d 1739 (Fed. Cir. 2016). See also In re Grams, 888 F.2d 835, 839-40; 12 USPQ2d 1824, 1827-28 (Fed. Cir. 1989); In re Meyers, 688 F.2d 789, 794; 215 USPQ 193, 196-97 (CCPA 1982); OIP Technologies, 788 F.3d at 1363, 115 USPQ2d at 1092-93; CyberSource v. Retail Decisions, Inc., 654 F.3d 1366, 1375, 99 USPQ2d 1690, 1694 (Fed. Cir. 2011).
Accordingly, claim 1 is rejected for being directed to unpatentable subject matter.
Claim 2
Claim 2 recites wherein the communication protocols comprise an Advanced eXtensible Interface (AXI4) protocol, a Peripheral Component Interconnect Express (PCIe) protocol, a Display Serial Interface (DSI) Physical Layer (PHY) (DPHY) protocol, an Advanced Peripheral Bus (APB) protocol, a Universal Serial Bus (USB) protocol, an embedded Multi-Media Card (eMMC) protocol, and a Universal Asynchronous Receiver/Transmitter (UART) protocol. The claim does not include any additional elements but instead merely specifies types of communication protocols that are used to classify signals. Classifying signals has previously been identified as a mental process that can be performed by a human. Thus, the limitation as to what protocols can be utilized does not change the analysis. Accordingly, claim 2 is rejected for being directed to unpatentable subject matter.
Claim 3
Claim 3 recites wherein the primary processing device is configured to select the secondary processing device from among the plurality of secondary processing devices based on one or more characteristics of the secondary processing device. Selecting a device is a mental process that can be performed by a human user. For example, a processor can be selected based on any characteristic, such as its computing power, its capabilities, and/or other criteria that a human, through evaluation and opinion, can select for a particular signal type. See MPEP 2106.04(a)(2), Subsection III. Accordingly, claim 3 is rejected for being directed to unpatentable subject matter.
Claim 4
Claim 4 recites wherein the primary processing device comprises one or more artificial neural networks (ANNs) to perform the classification of the one or more input signals based on the respective communication protocols of the one or more input signals. Utilizing an ANN to perform classification is not an additional element that improves the operation of a computer nor integrates the judicial exception into a practical application. The classification is still a mental process that is performed using a generic computer and the ANN is not claimed with specificity as to how it operates in a manner that improves the operation of the computer. Accordingly, claim 4 is rejected for being directed to unpatentable subject matter.
Claim 5
Claim 5 recites wherein the one or more ANNs of the primary processing device comprise a multi-layer perceptron neural network configured to classify the one or more input signals based on the respective communication protocols and to assign the secondary processing device from among the plurality of secondary processing devices to detect anomalies. The claim, as in claim 4, merely recites a definition of an ANN that performs the classification. The ANN is not recited with details as to how it is comprised other than a generic definition of a neural network Accordingly, claim 5 is rejected for being directed to unpatentable subject matter.
Claim 6
Claim 6 recites wherein each of the plurality of secondary processing devices comprises one or more artificial neural networks (ANNs) configured to determine the one or more anomalies in the received signals having the communication protocol corresponding to the secondary processing device. Utilizing an ANN to detect anomalies is not an additional element that improves the operation of a computer nor integrates the judicial exception into a practical application. The detection is still a mental process that is performed using a generic computer and the ANN is not claimed with specificity as to how it operates in a manner that improves the operation of the computer. Accordingly, claim 6 is rejected for being directed to unpatentable subject matter.
Claim 7
Claim 7 recites wherein a structure of the one or more ANNs, in each of the plurality of secondary processing devices is based on the communication protocol of the received signals. As in claim 6, claim 7 does not include additional details regarding the ANN that would indicate that it improves the operation of a computer. Further, the step performed by the ANN is a mental process, as indicated in claim 1. Accordingly, claim 7 is rejected for being directed to unpatentable subject matter.
Claim 8
Claim 8 recites:
wherein the primary processing device is further configured to receive results of the determining the one or more anomalies from each of the plurality of secondary processing devices and to
The limitation is directed to the extra-solution activity of data gathering. The limitation does not impose meaningful limits on the claim and thus is minimally or tangentially related to the invention. See MPEP 2106.05(g).
Courts have found that the extra-solution activity of data gathering is insignificantly more than the recited judicial exception. See, e.g., In re Grams, 888 F.2d 835, 839-40; 12 USPQ2d 1824, 1827-28 (Fed. Cir. 1989); In re Meyers, 688 F.2d 789, 794; 215 USPQ 193, 196-97 (CCPA 1982); OIP Technologies, 788 F.3d at 1363, 115 USPQ2d at 1092-93; CyberSource v. Retail Decisions, Inc., 654 F.3d 1366, 1375, 99 USPQ2d 1690, 1694 (Fed. Cir. 2011).
generate a report comprising the results.
Providing data (i.e., generating a report) is an extra-solution activity that does not integrate the judicial exception into a practical application. The limitation does not recite, with specificity, how the report is generated and therefore does not improve the functioning of a computer. See MPEP 2106.05(d)(II).
Providing data is an extra-solution activity that courts have found does not amount to significantly more than the recited judicial exception. See Intellectual Ventures I v. Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network).
According, claim 8 is rejected for being directed to unpatentable subject matter.
Claim 9
Claim 9 recites wherein the secondary processing device is further configured to determine a time of occurrence of the one or more anomalies in the one or more input signals having the communication protocol corresponding to the secondary processing device and to provide suggestions to fix the one or more anomalies. Determining a time that an event occurs is a mental process that can be performed by a human. For example, through observation, a human can determine the current time when an anomaly was detected and/or when the anomaly occurred by using a timestamp or clock associated with the signal that includes the anomaly. See MPEP 2106.04(a)(2), Subsection III. Accordingly, claim 9 is directed to unpatentable subject matter.
Claim 10
Claim 10 recites a method that is substantially the same as the method performed by the system of claim 1. Accordingly, for at least the same reasons as claim 1, claim 10 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 11
Claim 11 recites:
wherein the determining the one or more anomalies further comprises: separating, by the secondary processing device, read channel signals and write channel signals from among the received signals having the communication protocol corresponding to the secondary processing device;
Classifying a signal based whether a signal is a read or write channel signal is a mental process that can be performed in the human mind. For example, a human can observe the origin of a signal and/or the form of the signal (such as by observing and evaluating the signal via an interface) and determine whether it is a read or write signal. See e.g., MPEP 2106.04(a)(2).
verifying, by the secondary processing device, one or more signals from among the read channel signals;
Verifying a signal is correctly identified is a mental process because it can be performed in the human mind. For example, a user can observe a signal and its designation and, through judgment, determine that the designation is correct. See MPEP 2106.04(a)(2), Subsection III.
normalizing, by the secondary processing device, the verified one or more signals from among the read channel signals; and
Normalization is a mathematical concept that includes scaling one or more values such that the values are comparable. This can include, for example, averaging or fitting the values to a probability curve and dividing values by a scaling factor. See MPEP 2106.04(a)(2), Subsection I.
determining, by the secondary processing device, one or more anomalies in the one or more signals from among the read channel signals.
Determining an anomaly in a signal is a mental process that can be performed by a human. See e.g., MPEP 2106.04(a)(2). The claim does not provide any details about how the processor operates or how the detection is made, and the plain meaning of “detecting” encompasses mental observations or evaluations, e.g., a computer programmer’s mental identification of an anomaly in a data set. See also, Example 47, Claim 2 of USPTO July 2024 Subject Matter Eligibility Examples.
Accordingly, claim 11 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 12
Claim 12 recites:
wherein the one or more anomalies in the one or more signals from among the read channel signals are determined by one or more artificial neural networks (ANNs) of the secondary processing device, wherein
Utilizing an ANN to perform classification is not an additional element that improves the operation of a computer nor integrates the judicial exception into a practical application. The classification is still a mental process that is performed using a generic computer and the ANN is not claimed with specificity as to how it operates in a manner that improves the operation of the computer.
the one or more signals from among the read channel signals comprise read address signals, and wherein the determining the one or more anomalies further comprises:
The limitation is a mental process because a human can review a signal (e.g., investigate the signal via a display, identify an origin or destination of a signal, configuration of the signal) and determine that it is a read address signal. This can be based on the observations, evaluations, judgment, and opinion of the human. See MPEP 2106.04(a)(2), Subsection III.
processing, by the one or more ANNs of the secondary processing device, the read address signals;
The limitation is a mental process because the details of what constitutes “processing” is not recited in the claim. Given its broadest reasonable interpretation, process can include any intake of read address signal to perform any number of processes, such as storage, data cleaning, verification, and/or other actions. See MPEP 2106.04(a)(2), Subsection III.
determining, by the one or more ANNs of the secondary processing device, an error threshold based on an output of the processing the read address signals; and
Determining what constitutes an error threshold is a mental process that may be performed by a user. For example, a user may determine an error threshold of 1% identified errors in a signal based on observation and judgment. This may be decided based on observing processed signal data. See MPEP 2106.04(a)(2), Subsection III.
determining, by the one or more ANNs of the secondary processing device, one or more anomalies in the read address signals based on the error threshold.
The limitation is a mathematical concept whereby an error rate for a signal can be measured and quantified and compared to the determined error threshold. These steps require simple mathematical formulas (e.g., inequality, averaging) to determine whether a read address signal is above an error threshold. See MPEP 2106.04(a)(2), Subsection I.
Accordingly, claim 12 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 13
Claim 13 recites:
generating, by the secondary processing device, a predicted value of read data signals from among the read channel signals;
The limitation does not recite how the predicted value is generated other than it is from the read data signal. Thus, the generation of the value could be based on mental processes because, at its broadest, any observation of the read data signal and assigning a value to a missing portion of the signal can be performed in the human mind. See MPEP 2106.04(a)(2), Subsection III.
comparing, by the secondary processing device, the predicted value of the read data signals with actual values of the read data signals from the received signals having the communication protocol corresponding to the secondary processing device; and
The limitation is a mathematical concept whereby the value of two numbers can be compared. These steps require simple mathematical formulas (e.g., inequalities) to determine which of two numbers is greater. See MPEP 2106.04(a)(2), Subsection I.
determining, by the secondary processing device, one or more anomalies in the read data signals based on a result of the comparing the predicted value of the read data signals with the actual values of the read data signals.
The limitation is a classification of a portion of the signal as an anomaly based on whether there is deviation of the signal from an expected value. This classification can be carried out by a human and therefore is a mental process because a human can identify locations in the signal where the comparison yields a deviation above an acceptable level and classify those locations as an anomaly. See MPEP 2106.04(a)(2), Subsection III.
Accordingly, claim 13 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 14
Claim 14 recites
analyzing, by the secondary processing device, B-response signals from among the write channel signals;
Analysis is not recited with any specificity as to what constitutes the analyzing. Accordingly, any observation of the signal could be performed in the human mind. Thus, the limitation is a mental process. See MPEP 2106.04(a)(2), Subsection III.
determining, by the secondary processing device, one or more anomalies in the write channel signals based on a result of analyzing the B-response signals; and
The limitation is a classification of a portion of the signal as an anomaly based on whether there is a particular observed value for the signal. This classification can be carried out by a human and therefore is a mental process because a human can identify locations in the signal where the analysis yields a particular result. See MPEP 2106.04(a)(2), Subsection III.
displaying, by a display screen coupled to the secondary processing device, a time of occurrence of the one or more anomalies and suggestions to fix the one or more anomalies.
The limitation recites generic computer components that perform the display of data. The data itself is not recited as being identified in any particular manner and therefore mere display of data is the extra-solution activity of transmitting data, an activity that courts have found does not amount to significantly more than the recited judicial exception. See Intellectual Ventures I v. Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network).
Accordingly, claim 14 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 15
Claim 15 recites:
wherein the one or more signals from among the write channel signals comprise write address signals,
The limitation recites a type of data that is utilized in the process, but does not recite any additional elements apart from those already recited in other claims upon which Claim 15 depends. Thus, the limitation does not change the previous analysis.
and wherein the determining the one or more anomalies in the write channel signals further comprises: processing, by one or more artificial neural networks (ANNs) of the secondary processing device, the write address signals;
The limitation is a mental process because the details of what constitutes “processing” is not recited in the claim. Given its broadest reasonable interpretation, process can include any intake of read address signal to perform any number of processes, such as storage, data cleaning, verification, and/or other actions. See MPEP 2106.04(a)(2), Subsection III.
determining, by the one or more ANNs of the secondary processing device, an error threshold based on an output of the processing the write address signals; and
Determining what constitutes an error threshold is a mental process that may be performed by a user. For example, a user may determine an error threshold of 1% identified errors in a signal based on observation and judgment. This may be decided based on observing processed signal data. See MPEP 2106.04(a)(2), Subsection III.
determining, by the one or more ANNs of the secondary processing device, one or more anomalies in the write address signals based on the error threshold.
The limitation is a mathematical concept whereby an error rate for a signal can be measured and quantified and compared to the determined error threshold. These steps require simple mathematical formulas (e.g., inequality, averaging) to determine whether a read address signal is above an error threshold. See MPEP 2106.04(a)(2), Subsection I.
Accordingly, claim 15 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 16
Claim 16 recites:
generating, by the secondary processing device, write data signals using the write address signals;
The limitation does not recite how the write data signal is generated other than it is from the write address signal. Thus, the generation of the value could be based on mental processes because, at its broadest, any observation of the write address signal and assigning a value to write data signal can be performed in the human mind. See MPEP 2106.04(a)(2), Subsection III.
comparing, by the secondary processing device, the generated write data signals with actual write data signals from the one or more input signals having the communication protocol corresponding to the secondary processing device; and
The limitation is a mathematical concept whereby the value of two numbers can be compared. These steps require simple mathematical formulas (e.g., inequalities) to determine which of two numbers is greater. See MPEP 2106.04(a)(2), Subsection I.
determining, by the secondary processing device, one or more anomalies in the write data signals based on a result of the comparing the generated write data signals with the actual write data signals.
The limitation is a classification of a portion of the signal as an anomaly based on whether there is deviation of the signal from an expected value. This classification can be carried out by a human and therefore is a mental process because a human can identify locations in the signal where the comparison yields a deviation above an acceptable level and classify those locations as an anomaly. See MPEP 2106.04(a)(2), Subsection III.
Accordingly, claim 16 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim 17
Claim 17 recites non-transitory computer readable medium comprising stored instructions, which when executed by a processor, cause the processor to a method that is substantially the same as the method recited in claim 10. Accordingly, for at least the same reasons as claim 1, claim 10 is rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claims 18-20
Claims 18-20 recite substantially the same imitations as claims 11-13. Accordingly, for at least the same reasons as claims 11-13, claims 18-20 are rejected under 35 U.S.C. 101 for being directed to unpatentable subject matter.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 6-8, 10, and 17 are rejected under 35 U.S.C. 103 as being obvious over Kim, et al. (U.S. Pat. Pub. No. 2020/0394526), in view of Conner, et al., (U.S. Pat. Pub. No. 2010/0312516) and Kalyanaraman, et al., (U.S. Pat. No. 8,479,129).
Claim 1
Kim discloses:
An anomaly detection system comprising:
Provided are methods and apparatuses for performing anomaly detection by using a neural network. Kim at [0004].
a secondary processing device from among the plurality of secondary processing devices being configured to
FIGS. 7A and 7B are diagrams of circuit configurations of processing circuitry of an anomaly detection apparatus for driving a neural network that processes anomaly detection of FIG. 5, according to some example embodiments. Kim at [0085].
receive signals
Referring to FIG. 1, the anomaly detection system 10 receives various types of input signals or pieces of input data, such as sensing signals measured using a sensor provided in the anomaly detection system 10 or an external device, network data received through a network, and image data obtained through image processing… Kim at [0025].
determine one or more anomalies in the received signals,
and performs anomaly detection based on the received input signals or input data. In this case, the anomaly detection system 10 determines whether the input data signal is a signal indicating a normal pattern or a signal indicating an abnormal pattern by using an unsupervised learning neural network 15. Kim at [0025].
Kim does not appear to disclose:
a primary processing device configured to receive one or more input signals from a simulated system on chip (SoC) circuit electrically coupled to the primary processing device and to
classify the one or more input signals based on respective communication protocols of the one or more input signals; and
a plurality of secondary processing devices communicatively coupled to the primary processing device,
receive signals from among the classified one or more input signals from the primary processing device, and to
the received signals having a communication protocol corresponding to the secondary processing device.
Conner, which is analogous art, discloses:
a primary processing device configured to receive one or more input signals from a
The output of the source memory 230 is sent to a transmission buffer circuit 235 that amplifies and conditions the test stimulus signals for transfer on the physical interconnections 237 and 239 to the pin electronics 210 a and 210 b. The pin electronics 210 a and 210 b provides the electrical interface 202 and 204 between the SOC device-under-test 215 and the automated test equipment system 200. Conner at [0039].
classify the one or more input signals based on respective communication protocols of the one or more input signals; and
Each of the protocol specific circuits 405 a…405 n has a protocol aware controller 415 which functions as the protocol aware engine 270 of FIG. 2, or the protocol decode circuit 370 of FIG. 3, in coordination with the remaining circuitry of the protocol specific circuit 205 of FIG. 2 or the protocol specific circuit 305 of FIG. 3. Conner at [0057].
The protocol aware controllers determining which DRAM to send a signal to is analogous to classifying the signal.
a plurality of secondary processing devices communicatively coupled to the primary processing device,
Each protocol aware controller 415 of the protocol specific circuits 405 a…405 n communicates with its designated DRAM 420 a …420 n to provide the necessary test commands and to log the test results of the exercising of the SOC device-under-test 440. Conner at [0057].
The DRAM are analogous to secondary devices, each of which logs a particular test result from the received signal.
receive signals from among the classified one or more input signals from the primary processing device, and to
Each protocol aware controller 415 of the protocol specific circuits 405 a…405 n communicates with its designated DRAM 420 a …420 n to provide the necessary test commands and to log the test results of the exercising of the SOC device-under-test 440. Conner at [0057].
the received signals having a communication protocol corresponding to the secondary processing device.
The automated test equipment system 700 has a number of channel boards 705 a and 705 b (2 in this example). Each of the channel boards 705 a and 705 b has a number (5 in this example) of protocol specific circuits 710 a,… , 710 e, and 710 f,…., 710 j. Each of the protocol specific circuits 710 a, … 710 e, and 710 f,…, 710 j is capable of decoding, controlling, and synchronizing a number of input and output signals, in this example eight (8). The channel layout for the automated test equipment system 700 is designed to accommodate the protocol of the DDR3 SDRAM from the DDR3 SDRAM controller IP block 600. Conner at [0067].
Each of the “protocol specific circuits” 710 are analogous to a device with a communication protocol-specific association.
Conner is analogous art to the claimed invention because both are directed to processing and analyzing digital signals that are provided by a system-on-a-chip. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to combine the processing of Conner to classify and route a signal based on an associated protocol with the anomaly detection of Kim because the resulting system allows for versatility in the communication protocol types that may be checked for anomalies. Motivation to combine includes improved development time by allowing the classification device to be coupled to different anomaly detection algorithms, thus reducing the time to develop a different classification engine for each different chip that is tested.
Kalyanaraman, which is analogous art to the claimed invention, discloses:
a primary processing device configured to receive one or more input signals from a simulated system on chip (SoC) circuit electrically coupled to the primary processing device and to
FIG. 2 illustrates a detailed example of System-on-Chip (SoC) design 200, which is capable of being simulated by simulation platform 102. Generally, SoC design 200 is simulated during pre-silicon stages of SoC development to verify the design and diagnose potential design issues. Kalyanaraman at col. 3, lines 55-59.
SoC design 200 can also include an integrated data bus 218 that couples the various components and IP blocks of the SoC for data communication between the components. Integrated data bus 218 may be a custom data bus or an industry standard bus, such as a bus defined by the advanced micro-controller bus architecture (AMBA) specification that includes the advanced system bus (ASB), Advanced eXtensible Interface (AXI), advanced peripheral bus (APB), and advanced high-performance bus (AHB) standards. . Kalyanaraman at col. 4, lines 33-42.
Kalyanaraman is analogous art to the claimed invention because both are directed to testing a system-on-a-chip. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to combine the process of Kalyanaraman with Kim and Conner to result in a system that tests for various signals based on a communication protocol. Motivation to combine includes providing a simulation environment to perform testing, thus reducing the time and expense related to physical testing and modifications to overcome anomalies.
Claim 2
Kim and Conner do not appear to disclose:
wherein the communication protocols comprise an Advanced eXtensible Interface (AXI4) protocol, a Peripheral Component Interconnect Express (PCIe) protocol, a Display Serial Interface (DSI) Physical Layer (PHY) (DPHY) protocol, an Advanced Peripheral Bus (APB) protocol, a Universal Serial Bus (USB) protocol, an embedded Multi-Media Card (eMMC) protocol, and a Universal Asynchronous Receiver/Transmitter (UART) protocol.
Kalyanaraman discloses:
wherein the communication protocols comprise an Advanced eXtensible Interface (AXI4) protocol, a Peripheral Component Interconnect Express (PCIe) protocol, a Display Serial Interface (DSI) Physical Layer (PHY) (DPHY) protocol, an Advanced Peripheral Bus (APB) protocol, a Universal Serial Bus (USB) protocol, an embedded Multi-Media Card (eMMC) protocol, and a Universal Asynchronous Receiver/Transmitter (UART) protocol.
Integrated data bus 218 may be a custom data bus or an industry standard bus, such as a bus defined by the advanced micro-controller bus architecture (AMBA) specification that includes the advanced system bus (ASB), Advanced eXtensible Interface (AXI), advanced peripheral bus (APB), and advanced high-performance bus (AHB) standards. . Kalyanaraman at col. 4, lines 33-42.
I/O ports 128 may include any combination of internal or external ports, such as audio inputs and outputs, USB ports, Serial ATA (SATA) ports, PCI-express based ports or card-slots, and/or other legacy ports. Various peripherals may be operatively coupled with I/O ports 128, such as human-input devices (HIDs), external computer-readable storage media, or other peripherals. Kalyanaraman at col. 3, lines 34-40.
It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to combine the process of Kalyanaraman with Kim and Conner to result in a system that tests for various signals based on a communication protocol. Motivation to combine includes providing a simulation environment to perform testing, thus reducing the time and expense related to physical testing and modifications to overcome anomalies.
Claim 3
Kim does not appear to disclose:
wherein the primary processing device is configured to select the secondary processing device from among the plurality of secondary processing devices based on one or more characteristics of the secondary processing device.
Conner discloses:
wherein the primary processing device is configured to select the secondary processing device from among the plurality of secondary processing devices based on one or more characteristics of the secondary processing device.
For instance one of the protocol aware controllers 415 may act as a master and receive the test stimulus signals directly from adjacent protocol specific circuits 405 a, . . . , 405 n for decoding. The master protocol aware controller 415 then dispatches the appropriate instructions for constructing the structure and timing of the test response signals specified by the protocol, while minimized the impact of the latency for the operation. The latency synchronization signal line (ISL) 435 is used by the master protocol aware controller 415 for dispatching the initiation of a particular protocol action across multiple protocol specific circuits 405 a, . . . , 405 n. Conner at [0058].
“Dispatching” across multiple protocol specific circuits is analogous to selecting a secondary device based on its characteristics.
It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to combine the processing of Conner to classify and route a signal based on an associated protocol with the anomaly detection of Kim because the resulting system allows for versatility in the selection of device by communication protocol types. Motivation to combine includes improved development time by allowing the classification device to be coupled to different anomaly detection algorithms, thus reducing the time to develop a different classification engine for each different chip that is tested.
Claim 6
Kim discloses:
wherein each of the plurality of secondary processing devices comprises one or more artificial neural networks (ANNs) configured to determine the one or more anomalies in the received signals having the communication protocol corresponding to the secondary processing device.
The anomaly detection system 10 includes a neural network to determine whether an input data signal is a normal pattern or an abnormal pattern. The neural network may be a neural network that is trained by unsupervised learning. Kim at [0028].
Claim 7
Kim discloses:
wherein a structure of the one or more ANNs, in each of the plurality of secondary processing devices is based on the communication protocol of the received signals.
In some example embodiments, the anomaly detection system 10 in FIG. 1 may be configured to repeatedly train the autoencoder (that is, the neural network 20) by using a signal pattern extracted from the input data signal, thereby repeatedly updating parameters of each layer to allow the autoencoder to classify a signal pattern that may be recognized as a normal signal pattern. Kim at [0037].
The input signal to the secondary device is one that is classified with a communication protocol (i.e., is routed to that secondary device based on the “communication protocol” associated with the signal) and the neural network is trained (analogous to generating a structure of the ANN) based on the signal.
Claim 8
Kim discloses:
wherein the primary processing device is further configured to receive results of the determining the one or more anomalies from each of the plurality of secondary processing devices and to generate a report comprising the results.
In operation 1150, the processing circuitry 120 outputs information indicating that the abnormal signal is detected based on determining that the input data signal indicates the abnormal signal. Kim at [0116].
Claim 10
Clain 10 recites a method that is substantially the same as the method performed by the system of claim 1. Accordingly, for at least the same reasons, claim 10 is rejected under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman.
Claim 17
Claim 17 discloses a non-transitory computer readable medium comprising stored instructions, which when executed by a processor, cause the processor to perform a method that is substantially the same as the method recited in claim 1 and 5-6. Accordingly, for at least the same reasons, claim 17 is rejected under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman.
Claims 4-5 are rejected under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman, and further in view of Li, et al., (“Communication Protocol Classification Based on LSTM and DBN”).
Claim 4
Li discloses:
wherein the primary processing device comprises one or more artificial neural networks (ANNs) to perform the classification of the one or more input signals based on the respective communication protocols of the one or more input signals.
[W]e propose a novel communication protocol classification algorithm based on long short-term memory (LSTM) and deep belief network (DBN). We first introduce the DBN, then simulates communication protocol classification method based on DBN. Li at Abstract.
A DBN is a type of ANN.
Li is analogous art to the claimed invention because both are directed to classifying a signal using a neural network. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to utilize the DBN of Li to classify a signal and subsequently route the signal to an anomaly detection device because neural networks can be readily designed to perform classification. Motivation to combine includes providing a system that requires less development time and provides an accurate classification system that can be trained readily to handle additional classification types, thus reducing development time.
Claim 5
Li discloses:
wherein the one or more ANNs of the primary processing device comprise a multi-layer perceptron neural network configured to classify the one or more input signals based on the respective communication protocols and to assign the secondary processing device from among the plurality of secondary processing devices to detect anomalies.
DBN is trained greedily by stacking multiple RBMs. A typical DBN structure is shown in Fig. 2 [29]. Similar to the RBM structure, nodes between the same layers are not allowed to connect, and nodes between layers are connected by “full connection”. DBN can learn the structure of input data, and extract the features of input data step by step through multi-layer RBM, and use the features to classify signal, image and so on [30]. Li at 91820, col. 1.
Claim 9 is rejected under 35 U.S.C. 103 as being obvious over Kim in view of Conner and Kalyanaraman, and further in view of Johnson, et al., (U.S. Pat. No. 5,195,098).
Claim 9
Johnson discloses:
wherein the secondary processing device is further configured to determine a time of occurrence of the one or more anomalies in the one or more input signals having the communication protocol corresponding to the secondary processing device and to
The binary 0 is detected at time 100 by the slicer 31. The binary 1 following this binary 0 should cause the signal to follow the waveform indicated by the dotted line 97, assuming no disturbance occurred and no snubbing occurred. However, since a portion of the waveform on line 95 was snubbed, the actual waveform on line 96 falls short of its expected amplitude by the amount 98. Johnson at col. 10, lines 27-33.
provide suggestions to fix the one or more anomalies.
A hint signal is transmitted on line 36 to the decoder 34 allowing the decoder to know where in the data stream the noise pulse occurred, and thus, where it is likely that an error may have occurred. Johnson at col. 6, lines 63-66.
The hint signal indicates that a bit should be changed, analogous to a suggestion.
Johnson is analogous art to the claimed invention because both are directed to providing a means to remedy anomalies in a signal. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the application, to provide a potential solution to a signal that does not appear to be correct at a time (i.e., location in the signal) because the signal, upon enacting the suggestion, can result in a signal that is free of anomalies. Motivation to combine includes reduced execution time of the simulation by reducing the number of messages that need to be re-sent due to errors in the sending process.
EXAMINER’S NOTE
Claims 11-16 and 18-20 are rejected under 35 U.S.C. 101 and 35 U.S.C. 112(b), but are otherwise allowable over the prior art. Accordingly, if any of those claims were rewritten to incorporate the recited limitations and the limitations of the claims upon which the respective claim depends, rejection of the respective claim under 35 U.S.C. 103 would be withdrawn.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
U.S. Pat. No. 7,634,396: discloses using a bus functional model to generate signals of different types to be used in a simulation of a system-on-a-chip.
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JOSEPH MORRIS
Examiner
Art Unit 2188
/JOSEPH P MORRIS/Examiner, Art Unit 2188
/RYAN F PITARO/Supervisory Patent Examiner, Art Unit 2188
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