DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Arguments
Applicant’s reply filed on 08/22/2025 has been entered and considered. Applicant’s amendments necessitated the shift in grounds of rejection detailed below. The shift in grounds of rejection renders Applicant’s arguments moot. Thus, this rejection is properly made FINAL.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation “wherein a width, in the second direction, of each of the width-expanded regions increases and then decreases with respect to a direction away from an upper surface of the lower pattern, and is maximum at a location between a corresponding pair of vertically adjacent sheet patterns or between the lower pattern and the sheet pattern vertically adjacent the lower pattern” of Claim 11 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Regarding Claim 11, The instant claims recite limitation “wherein a width, in the second direction, of each of the width-expanded regions increases and then decreases with respect to a direction away from an upper surface of the lower pattern, and is maximum at a location between a corresponding pair of vertically adjacent sheet patterns or between the lower pattern and the sheet pattern vertically adjacent the lower pattern” is not clear because each of the width means, region of active pattern or lower pattern or sheet pattern is not defined. In addition, claim recite a width then recites each of the width-expanded region increase and then decrease, which is not clear. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate corrections defining these limitations within metes and bounds of the claimed invention are required.
Claims 12-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, because of their dependency status from claim 11.
Regarding Claim 18, The instant claims recite limitation “wherein the second source/drain patterns do not include carbon-doped semiconductor liners extending along the sidewalls and the bottom surface of the second source/drain recesses” is not clear because “wherein the second source/drain patterns do not include carbon-doped semiconductor liners”, appears include carbon-doped semiconductor liners. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate corrections defining these limitations within metes and bounds of the claimed invention are required.
Claims 19-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, because of their dependency status from claim 18.
Claim Rejection- 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6-7 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over YI et al (US 2020/0395446 A1; hereafter YI) in view of KIM et al (US 2020/0219976 A1; hereafter KIM).
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Regarding claim 1. YI discloses a semiconductor device comprising:
an active pattern including a lower pattern (Fig 16, region 104, Para [ 0018]) and a plurality of sheet patterns (Fig 16, stacked channel 120, Para [ 0019]), which are spaced apart from the lower pattern (Fig 16, region 104) in a first direction;
a plurality of gate structures (Fig 16, gate structure [130, 110], Para [ 0040]) disposed on the lower pattern (Fig 16, region 104) and spaced apart from each other in a second direction (Fig 16, gate structure [130,110], Para [ 0040]), each of the gate structures including a gate electrode and gate insulating film (gate structure [130, 110], Para [ 0040]);
source/drain recesses (Fig. [11-12] shows recess source/drain, Para [ 0064]), each defined between a corresponding pair of the gate structures (Fig 2, gate structure [130, 110], Para [ 0040]) that are adjacent to each other (Fig. [12-13] shows recess source/drain, Para [ 0064]); and
source/drain patterns ( Fig 16, source/drain pattern [ 107]), each filling a corresponding one of the source/drain recesses (Fig. [11-12] shows recess source/drain, Para [ 0064]), wherein each of the source/drain patterns ( Fig 16, source/drain pattern [107]) include a first semiconductor liner ( layer 107a, para [ 0038]) that is continuous and extends along sidewalls and a bottom surface of the corresponding source/drain recess (Fig. [11-12] shows recess source/drain, Para [ 0064]), a second semiconductor liner ( layer 107b, Para [ 0038]) on the first semiconductor liner ( layer 107a, para [ 0038]), the second semiconductor liner ( layer 107b, Para [ 0038]) being continuous and extending adjacent to the sidewalls and the bottom surface of the of the corresponding source/drain recess (Fig. [11-12] shows recess source/drain, Para [ 0064]), and
a filling semiconductor film (three or more epitaxial regions, construed as filing semiconductor film, Para [ 0038]) on the second semiconductor liner (layer 107b, Para [ 0031-0034]) and that fills the corresponding source/drain recess (Fig. [16]),
wherein each of the first semiconductor liners ( layer 107a, para [ 0031-0032]) are in contact with the lower pattern (Fig 16, region104) and at least two of the sheet patterns Fig 16, stacked channel 120, Para [ 0021]) that are spaced apart from each other in the first direction Fig 16, stacked channel 120, Para [ 0021]), and wherein the first semiconductor liners include carbon-undoped regions (layer 107a, para [ 0038]), and wherein the first semiconductor liners (layer 107a, para [ 0038]) and the second semiconductor liners (layer 107b, para [ 0038]) are formed of a corresponding crystalline semiconductor material (layer 107a, Para [ 0031-0034]).
But YI does not disclose explicitly wherein the second semiconductor liners are doped with carbon.
In a similar field of endeavor, KIM discloses wherein the second semiconductor liners are doped with carbon (Fig 6, sub-source/drain pattern Sp1/Sp3 include carbon doped, para [0037, 0055]).
Since YI and Kim are both from the similar field of endeavor, and discloses source/drain pattern includes carbon doped material, therefore the purpose disclosed by Kim would have been recognized in the pertinent art of YI. Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine YI in light of Kim teaching “(Fig 6, sub-source/drain pattern Sp1/Sp3 include carbon doped, para [0037, 0055])” for further advantage such as high integration semiconductor device with high reliability by using well-known materials.
Regarding claim 2. YI and Kim disclose the semiconductor device of claim 1, YI further discloses wherein each of the carbon- undoped regions comprise all of a corresponding one of the first semiconductor liners (layer 107a, para [ 0038]).
Regarding claim 6. YI and Kim discloses the semiconductor device of claim 1, YI further discloses wherein each of the gate structures (Fig 16, gate structure [130,110], Para [ 0040]) includes inner gate structures (Fig 16, gate structure [130,110], Para [ 0040]), each being disposed between a corresponding pair of adjacent sheet patterns (Fig 16, stacked channel 120, Para [ 0019]) or between the lower pattern and the sheet patterns adjacent to the lower pattern, the inner gate structures (Fig 16, gate structure [130,110], Para [ 0040]) including a corresponding portion of the gate electrode of the gate structure and a corresponding one of the gate insulating films of the gate structure (Fig 16, gate structure [130,110], Para [ 0040]), and the first semiconductor liners (layer 107a, para [ 0038]) are in contact with the gate insulating films of corresponding ones of the inner gate structures (Fig 16, gate structure [130,110], Para [ 0040]).
Regarding claim 7. YI and Kim disclose the semiconductor device of claim 1, YI further discloses wherein each filling semiconductor film (three or more epitaxial regions, construed as filing semiconductor film, Para [ 0038]) is doped with phosphorus (Para [ 0069]) and is in contact with a corresponding one of the second semiconductor liners (liners 107b, Para [ 0038]).
Regarding claim 9. YI and Kim disclose the semiconductor device of claim 1, YI further discloses wherein the filling semiconductor films (three or more epitaxial regions, construed as filing semiconductor film, Para [ 0038]) and the first semiconductor liners (liners 107a, Para [ 0038]) are doped with boron (Para [ 0069]).
Regarding claim 10. YI and Kim disclose the semiconductor device of claim 1, YI further discloses wherein each of the first semiconductor liners and the second semiconductor liners includes one of a silicon film and or a silicon-germanium film (liners 107a/107b, Para [ 0038]).
Allowable Subject Matter
Claims 3-5 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is the Examiner's Reasons for Allowance:
The prior art fails to disclose and would not have rendered obvious:
Regarding claim 3. wherein the first semiconductor liners include carbon-diffused regions, which extend along the sidewalls and the bottom surface of each of the source/drain recesses, the carbon-diffused regions are disposed between corresponding ones of the carbon-undoped regions and the second semiconductor liners, and carbon concentrations of the carbon-diffused regions increase in a direction away from the corresponding carbon-undoped region.
Claims 4-5 are objected based on the dependency of claim 3.
Regarding claim 8. wherein each source/drain pattern further comprises a third semiconductor liner, which is disposed between the second semiconductor liner and the filling semiconductor film of the source/drain pattern, the filling semiconductor film being doped with a first n-type impurities, and the third semiconductor liners being doped with second n-type impurities that are different from the first n-type impurities.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOIN M RAHMAN whose telephone number is (571)272-5002. The examiner can normally be reached 8:30-5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOIN M RAHMAN/Primary Examiner, Art Unit 2898
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