DETAILED ACTION
This Office action is in response to the amendment filed 2 December 2025. By this amendment, claims 1, 3-4, 6-7, 9-10 and 12-13 are amended; claim 2 is cancelled. Claims 1 and 3-17 are currently pending; claims 14-17 stand withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 2 December 2025 have been fully considered but they are not persuasive; the rejections of the claims have been modified in response to Applicant's amendments to the claims. The amended limitations (and Applicant’s arguments regarding the amended limitations) are addressed by the modified rejections below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-13 are rejected under 35 U.S.C. 103 as being unpatentable over US 2023/0197772 A1 to Kubouchi (hereinafter “Kubouchi”).
Regarding independent claim 1, Kubouchi (Fig. 7) discloses a semiconductor device comprising:
a first semiconductor layer 20 of a first conductivity type (n-type; ¶ 0113), and the first semiconductor layer including first conductivity type impurities (¶ 0113);
a second semiconductor layer 18 of the first conductivity type (n-type; ¶ 0113) provided on the first semiconductor layer, and the second semiconductor layer including lower first conductivity type impurities than the first semiconductor layer (Fig. 7; ¶ 0113); and
a region (region containing 241; ¶ 0114) provided in the first semiconductor layer, and the region having a hydrogen concentration of 5×1017 atoms/cm3 or more (¶ 0069).
Kubouchi fails to expressly disclose: wherein the hydrogen concentration in the region is 500 times or more higher than a concentration of a first conductivity type carrier in the region. Kubouchi (Fig. 8 - particularly “Hydrogen Chemical Concentration” and “Carrier Density”; ¶ 0123) does disclose the hydrogen concentration in the region (“Hydrogen Chemical Concentration” - at depth position range 201) is higher than a concentration of a first conductivity type carrier in the region (“ Carrier Density” - at same depth positions), however, fails to expressly disclose the specific range of “500 times or more.” It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the above range relationship, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F .2d 272, 205 USPQ 215 (CCPA 1980). Here, the hydrogen concentration range in relation to the first conductivity type carrier concentration is considered a result effective variable because it affects carrier lifetime and device characteristics such as turn-off time (¶¶ 0045-46). Thus the ordinary artisan would have been motivated to modify the hydrogen concentration range in relation to the first conductivity type carrier concentration range for the purpose of adjusting the turn-off time of the device.
Regarding claim 3, Kubouchi discloses the semiconductor device according to claim 1, wherein the region includes a first composite defect, a second composite defect, a third composite defect, and a fourth composite defect (¶¶ 0045-46).
The limitations “a second composite defect having a lower measured temperature measured by deep level transient spectroscopy than a measured temperature of the first composite defect measured by deep level transient spectroscopy, a third composite defect having a lower measured temperature measured by deep level transient spectroscopy than the measured temperature of the second composite defect measured by deep level transient spectroscopy, and a fourth composite defect having a lower measured temperature by deep level transient spectroscopy than the measured temperature of the third composite defect measured by deep level transient spectroscopy, wherein an absolute value of a signal intensity of the first composite defect measured by deep level transient spectroscopy is four times or more higher than a sum of an absolute value of a signal intensity of the third composite defect measured by deep level transient spectroscopy and an absolute value of a signal intensity of the fourth composite defect measured by deep level transient spectroscopy” are considered claimed properties or functions. Kubouchi discloses the structure as recited in the claim as currently drafted, thus the structure of Kubouchi is presumed to possess the claimed properties or functions of the claimed structure. MPEP § 2112.01(I).
Regarding claim 4, Kubouchi discloses the semiconductor device according to claim 1, wherein the region includes a first composite defect, a second composite defect, a third composite defect, and a fourth composite defect (¶¶ 0045-46).
The limitations “a second composite defect having a lower measured temperature measured by deep level transient spectroscopy than a measured temperature of the first composite defect measured by deep level transient spectroscopy, a third composite defect having a lower measured temperature measured by deep level transient spectroscopy than the measured temperature of the second composite defect measured by deep level transient spectroscopy, and a fourth composite defect having a lower measured temperature by deep level transient spectroscopy than the measured temperature of the third composite defect measured by deep level transient spectroscopy, wherein an absolute value of a signal intensity of the second composite defect measured by deep level transient spectroscopy is three times or more higher than a sum of an absolute value of a signal intensity of the third composite defect measured by deep level transient spectroscopy and an absolute value of a signal intensity of the fourth composite defect measured by deep level transient spectroscopy” are considered claimed properties or functions. Kubouchi discloses the structure as recited in the claim as currently drafted, thus the structure of Kubouchi is presumed to possess the claimed properties or functions of the claimed structure. MPEP § 2112.01(I).
Regarding claim 5, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 1, further comprising: a first semiconductor region 14 (¶ 0108) of a second conductivity type (p-type) provided on the second semiconductor layer 18; a second semiconductor region 12 (¶ 0108) of the first conductivity type (n-type) provided on the first semiconductor region 14;
a first electrode 40 (¶ 0119) provided in a trench, the trench reaching the second semiconductor layer 18 from above the second semiconductor region 12, and the first electrode 40 facing the first semiconductor region 14 via a first insulating film 42 (¶ 0119); a second insulating film 38 (¶ 0120) provided on the first electrode; a second electrode 52 (¶ 0121) provided on the second semiconductor region 12 and the second insulating film 38; a fourth semiconductor layer 22 (¶ 0103) provided below the first semiconductor layer 20; and a third electrode 24 (¶ 0137) provided below the fourth semiconductor layer 22, and the third electrode 24 being electrically connected to the fourth semiconductor layer 22 (¶ 0106).
Regarding claim 6, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 5, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the fourth semiconductor layer 22 (“region” may be defined to also contain a portion of 22; Examiner notes that the claims as currently drafted do not require the “region” to have the recited hydrogen concentration of claim 1 throughout the entirety of the defined “region”).
Regarding claim 7, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 5, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the second semiconductor layer 18 and into the fourth semiconductor layer 22 (“region” may be defined to also contain portions of 18 and 22).
Regarding claim 8, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 1, further comprising: a first semiconductor region 14/12 (¶ 0108) of a second conductivity type (p-type) provided on the second semiconductor layer 18; a second semiconductor region 12 (¶ 0108) of the first conductivity type (n-type) provided in the first semiconductor region 14/12; a first electrode 52 (¶ 0121) provided above the first semiconductor region 14/12; a first insulating film 38 (¶ 0120) provided between the first semiconductor region 14/12 and the first electrode 52; a second insulating film 38 (different portion) provided on the first electrode 52; a second electrode 40 (¶ 0119) provided on the second semiconductor region 12 and the second insulating film 38; a fourth semiconductor layer 22 (¶ 0103) provided below the first semiconductor layer 20; and a third electrode 24 (¶ 0137) provided below the fourth semiconductor layer 22, and the third electrode 24 being electrically connected to the fourth semiconductor layer 22 (¶ 0106).
Regarding claim 9, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 8, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the fourth semiconductor layer 22 (“region” may be defined to contain portion of 22).
Regarding claim 10, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 8, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the second semiconductor layer 18 and into the fourth semiconductor layer 22 (“region” may be defined to also contain portions of 18 and 22).
Regarding claim 11, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 1, further comprising: a fifth semiconductor layer 14 (¶ 0108) of a second conductivity type (p-type) provided on the second semiconductor layer 18; a fourth electrode 52 (¶ 0121) provided on the fifth semiconductor layer 14, and the fourth electrode 52 being electrically connected to the fifth semiconductor layer 14 (Fig. 7); a sixth semiconductor layer 22 (¶ 0103) provided below the first semiconductor layer; and a fifth electrode 24 (¶ 0137) provided below the sixth semiconductor layer 22, and the fifth electrode 24 being electrically connected to the sixth semiconductor layer 22 (¶ 0106).
Regarding claim 12, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 11, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the sixth semiconductor layer 22 (“region” may be defined to also contain portion of 22).
Regarding claim 13, Kubouchi (Fig. 7) discloses the semiconductor device according to claim 11, wherein the region (area containing 241) extends from the first semiconductor layer 20 into the second semiconductor layer 18 and into the sixth semiconductor layer 22 (“region” may be defined to also contain portions of 18 and 22).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Candice Y. Chan whose telephone number is (571)272-9013. The examiner can normally be reached 8:30 am - 5 pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B. Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
CANDICE Y. CHAN
Examiner
Art Unit 2813
14 March 2026
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813