Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/09/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The Examiner’s title objection is withdrawn in light of Applicant’s amendment.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 20210296445 A1) in view of Otake US 20080308908 A1. Lee et al will be referenced to as Lee henceforth.
Regarding Claim 1,
Lee teaches:
“A method of manufacturing a semiconductor device, the method comprising:
forming a channel layer (a first channel layer 121, [0058], FIG. 5B) on a substrate (substrate 110, [0058], FIG. 5B);
forming an electrode (source electrode 180, drain electrode 190, [0095], FIG. 5B)
on the exposed surface (FIG. 5B);
wherein the channel layer comprises a two-dimensional material ([0076]: 180 and 190 may include Cr.),”
Lee doesn’t substantially teach:
“forming a mask on the channel layer;
wherein the mask overlaps with the channel layer in a vertical direction;
surface-treating an exposed surface of the channel layer exposed from the mask;
and removing the mask, and wherein the surface-treating comprises surface-treating the exposed surface with hydrogen chloride (HCl) .”
However, Otake teaches:
“forming a mask on the channel layer (Otake: photoresist, [0063-0064], FIG. 2B, FIG. 3: The photoresist, which is not shown, covers regions that do not include drain trenches 6. Therefore, the photoresist covers n type GaN layer 5 and p type GaN layer 4. These layers contain the channel region 22 and are therefore channel layers.);
wherein the mask overlaps with the channel layer in a vertical direction (Otake: FIG. 2B: The photoresist vertically overlaps layers 5 and 4.);
surface-treating an exposed surface of the channel layer exposed from the mask (Otake: [0063]: wall surfaces 8 of layers 5 and 4 are treated with HCl to remove damaged surfaces comprising Si based oxides and Ga oxides.);
and removing the mask (Otake: [0064]: the photoresist is removed.), and wherein the surface-treating comprises surface-treating the exposed surface with hydrogen chloride (HCl) (Otake [0063]).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Lee is modifiable in view of Otake.
This is because Otake teaches that wall surfaces of channel layers may be damaged in a dry etch process (Otake: [0063]: Lee also uses a dry etch process on channel layers. See Lee [0096]). By using a HCl wet-etch process after the dry-etch process, the damaged portions of the channel layers may be removed. By removing the damaged portions of the channel layer, undamaged portions remain which one of ordinary skill in the art would recognize as advantageous because pristine semiconductor materials operate more officially than damaged semiconductor material.
Regarding Claim 2,
Lee/Otake teaches:
“The method of claim 1, wherein the surface-treating further comprises removing an oxide group from the exposed surface (Lee: [0092]: One of ordinary skill in the art would recognize that WSe2 oxidizes. It is known in the art, for example, US 20200296825 A1, that hydrochloric acid dissolves oxide. Therefore, when Lee exposes the channel to HCL, a metal oxide is dissolved from the surface of the channel.).”
Regarding Claim 3,
Lee/Otake teaches:
“The method of claim 1, wherein the surface-treating further comprises removing impurities from the exposed surface (Lee: [0092]: One of ordinary skill in the art would recognize that WSe2 oxidizes. It is known in the art, for example, US 20200296825 A1, that hydrochloric acid dissolves oxide. Therefore, when Lee exposes the channel to HCL, metal oxide is dissolved on the surface of the channel. A metal oxide may be considered an impurity as metal oxides are not conductors and therefore would inhibit the connectivity of the channel to the source and drain electrodes.).”
Regarding Claim 5,
Lee/Otake teaches:
“The method of claim 1, wherein the electrode comprises at least one of Cr, Pd, Au, Ti, Pt, Bi, Ag, Co, Ni, Cu, Sb, Sn, Al, or graphene (Lee: [0076]: 180 and 190 may include Cr.).”
Regarding Claim 6,
Lee/Otake teaches:
“The method of claim 1, wherein the two-dimensional material comprises one of Si, Ge, MoS2, WS2, MoSe2, ReS2, WSe2, or graphene (Lee: [0071], [0072]: The TMD (TMD is a kind of two-dimensional material) may be WSe-2.).”
Regarding Claim 7,
Lee/Otake teaches:
“The method of claim 1, wherein the two-dimensional material comprises WSe2 (Lee: [0071], [0072]), wherein the electrode comprises Cr (Lee: [0076]: 180 and 190 may include Cr.), and wherein the channel layer is configured as an N-type channel (Lee: [0074]: the channel may be configured to be n-type by including an n-type dopant.).”
Regarding Claim 8,
Lee/Otake teaches:
“The method of claim 1, wherein the two-dimensional material comprises WSe2 (Lee: [0071], [0072]), wherein the electrode comprises Pd (Lee: [0076]: 180 and 190 may be Pd.), and wherein the channel layer is configured as a P-type channel (Lee: [0091]: 120 may be p-type by including a p-type dopant.).”
Regarding Claim 9,
Lee/Otake teaches:
“The method of claim 1, wherein the forming the mask comprises one of performing a photolithography process or performing an electron beam lithography process (Lee: [0094]: 170 may be patterned by a photolithography process.).”
Claims 4 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee/Otake as applied to claims 1-3 and 5-9 above, and further in view of Huang et al (US 20150001468 A1). Huang et al will be referenced to as Huang henceforth.
Regarding Claim 4,
Lee/Otake teaches:
“The method of claim 1, wherein the surface-treating further comprises surface- treating the exposed surface with HCl in a liquid state (Otake: [0063]: a HCl wet-etch uses liquid HCl),”
Lee/Otake doesn’t substantially teach:
“and wherein a concentration of HCl in the liquid state is 1% or more and 10% or less.”
However, Huang teaches:
“and wherein a concentration of HCl in the liquid state is 1% or more and 10% or less (Huang: [0064]: wet etching using HCL and ammonium hydroxide may be about 1% to about 10% of a solution. The ratio of HCL to ammonium hydroxide may be from 2:1 to 6:1. Therefore, the total possible range of HCL in the solution may be from 2/3 of 1% to 6/7 of 10%. In other words, the amount of HCL in the solution may be from 0.66% of the solution to about 8.5% of the solution. An HCL concentration of 5% lies within that range.).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Lee/Otake is modifiable in view of Huang.
This is because one of ordinary skill in the art would recognize from Ikeda et al (US 20110210375 A1) that there is an ideal range for the amount of HCL in a solution for wet etching. Namely, if there is too much HCL in a solution, etching becomes very slow and if there is too little HCL an isotropic (isotropic meaning the same in every direction, so flat.) plane is not formed. One of ordinary skill in the art would want to form an isotropic plane for the purpose of structural stability in a semiconductor device as the semiconductor device is built. Further the calculated range of HCl concentration, from 0.66% to 8.5% in the solution has significant overlap from between 1% and 10% of HCL concentration in a solution, and Applicant states in [0063] of their application that “a difference of the on-off ratio between the 1% condition (FIG. 6A) and the case without surface treatment (shown as Control) is relatively small due to the low concentration”. As such, the Examiner doesn’t believe that the range is critical as described in MPEP 2144.05.
Regarding Claim 20,
Lee/Otake/Huang teaches:
“A method of manufacturing a semiconductor device, the method comprising:
forming a channel layer (Lee: a first channel layer 121, [0058], FIG. 5B) on a substrate (Lee: substrate 110, [0058], FIG. 5B);
forming a mask on the channel layer (Otake: photoresist, [0063-0064], FIG. 2B, FIG. 3: The photoresist, which is not shown, covers regions that do not include drain trenches 6. Therefore, the photoresist covers n type GaN layer 5 and p type GaN layer 4. These layers contain the channel region 22 and are therefore channel layers.);
wherein the mask overlaps with the channel layer in a vertical direction (Otake: FIG. 2B: The photoresist vertically overlaps layers 5 and 4);
surface-treating an exposed surface of the channel layer exposed from the mask (Otake: [0063]: Wall surfaces 8 of layers 5 and 4 are treated with HCl to remove damaged surfaces comprising Si based oxides and Ga oxides.);
forming an electrode (Lee: source electrode 180, drain electrode 190, [0095], FIG. 5B) on the exposed surface (Lee: FIG. 5B);
and removing the mask (Otake: [0064]: the photoresist is removed.), wherein the channel layer includes a two-dimensional material (Lee: [0076]: 180 and 190 may include Cr.), and wherein the surface-treating comprises surface-treating the exposed surface with HCl at a concentration of 5% (Huang: [0064]: wet etching using HCL and ammonium hydroxide may be about 1% to about 10%. The ratio of HCL to ammonium hydroxide may be from 2:1 to 6:1. Therefore, the total possible range of HCL in the solution may be from 2/3 of 1% to 6/7 of 10%. In other words, the amount of HCL in the solution may be from 0.66% of the solution to about 8.5% of the solution. An HCL concentration of 5% lies within that range.).”
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lee/Otake as applied to claims 1-3, and 5-9 above, and further in view of Nakayama et al (US 20160163865 A1). Nakayama et al will be referenced to as Nakayama henceforth.
Regarding Claim 10,
Lee/Otake teaches:
“The method of claim 1,”
Lee/Otake doesn’t substantially teach:
“wherein the substrate comprises one of SiO2, A1203, HfO2, and h-BN.”
However, Nakayama teaches:
“wherein the substrate comprises one of SiO2, A1203, HfO2, and h-BN (Nakayama: substrate 1, [0108-0110], FIG. 1: The substrate may include both Si and SiO2.).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Lee/Otake is modifiable in view of Nakayama.
This is because Lee/Otake teaches a substrate made of Si. Lee/Otake doesn’t substantively teach a substrate comprising SiO2. Nakayama teaches a substrate comprising Si. Nakayama further teach a substrate comprising Si and SiO2. Because both Lee/Otake and Nakayama have a substrate comprising Si, one of ordinary skill in the art would have deemed it obvious to substitute the substrate comprising silicon of Lee/Otake for a substrate comprising Si and SiO2 of Nakayama for the predictable result of a semiconductor substrate of which a device may be built upon.
Claims 11-18 are rejected under 35 U.S.C. 103 as being unpatentable over Lee/Otake as applied to claims 1-3 and 5-9 above, and further in view of Ju et al (US 20210343713 A1). Ju et al will be referenced to as Ju henceforth.
Regarding Claim 11,
Lee/Otake teaches:
“A method of manufacturing a semiconductor device, the method comprising:
forming a channel layer (Lee: a first channel layer 121, [0058], FIG. 5B) on a substrate (Lee: substrate 110, [0058], FIG. 5B);
forming a mask on the channel layer (Otake: photoresist, [0063-0064], FIG. 2B, FIG. 3: The photoresist, which is not shown, covers regions that do not include drain trenches 6. Therefore, the photoresist covers n type GaN layer 5 and p type GaN layer 4. These layers contain the channel region 22 and are therefore channel layers.);
wherein the mask overlaps with the channel layer in a vertical direction (Otake: FIG. 2B: The photoresist vertically overlaps layers 5 and 4.);
surface-treating an exposed surface of the channel layer exposed from the mask (Otake: [0063]: Wall surfaces 8 of layers 5 and 4 are treated with HCl to remove damaged surfaces comprising Si based oxides and Ga oxides.);
forming an electrode on the exposed surface (Lee: source electrode 180, drain electrode 190, [0095], FIG. 5B); and
removing the mask (Otake: [0064]: the photoresist is removed.), wherein the channel layer includes a two-dimensional material (Lee: [0067]: 121 and 122 may be a two-dimensional semiconductor material.),”
Lee/Otake doesn’t substantially teach:
“and wherein the surface-treating comprises surface-treating the exposed surface with one of HBr, HF, HI, or HNO3.”
However, Ju teaches:
“and wherein the surface-treating comprises surface-treating the exposed surface with one of HBr, HF, HI, or HNO3 (Ju: [0051], [0052]: The wet etch may include HCL, HF, or HNO3). ”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Lee/Otake is modifiable in view of Ju.
This is because Lee/Otake teaches a method of etching sacrificial layers to build channel layers. Lee doesn’t substantively teach a wet-etch method of etching sacrificial layers using HF or HNO3. Ju teaches a method of etching sacrificial layers to build channel layers. Ju further teach a wet-etch method of etching sacrificial layers using HF or HNO3. Because both Lee/Otake and Ju have a method of etching sacrificial layers to build channel layers, one of ordinary skill in the art would have deemed it obvious to substitute the wet etching method of sacrificial layers of Lee/Otake using HCl for a wet-etch method of etching sacrificial layers using HF or HNO3 of Ju for the predictable result of building channel layers of a transistor using sacrificial layers.
Regarding Claim 12,
Lee/Otake /Ju teaches:
“The method of claim 11, wherein the surface-treating further comprises surface- treating the exposed surface with one of HBr, HF, HI, or HN03 in a liquid state (Ju: [0051], [0052]: The wet etch may include HCL, HF, or HNO3 and a wet-etch is done with a liquid solution.).”
Regarding Claim 13,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the surface-treating further comprises removing an oxide group from the exposed surface of the channel layer (Lee: [0092]: One of ordinary skill in the art would recognize that WSe2 oxidizes. It is known in the art, for example, US 20200296825 A1, that hydrochloric acid dissolves oxide. Therefore, when Lee/Otake treats the channel to HCL, a metal oxide is dissolved from the surface.).”
Regarding Claim 14,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the surface-treating further comprises removing impurities from the exposed surface (Lee: [0092]: One of ordinary skill in the art would recognize that WSe2 oxidizes. It is known in the art, for example, (US 20200296825 A1), that hydrochloric acid dissolves oxide. Therefore, when Lee exposes the channel to HCL, a metal oxide is dissolved. A metal oxide may be considered an impurity as metal oxides are not conductors and therefore would inhibit the connectivity of the channel to the source and drain electrodes).”
Regarding Claim 15,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the two-dimensional material comprises WSe2 (Lee: [0071], [0072]), wherein the electrode comprises Cr (Lee: [0076]: 180 and 190 may include Cr.), and wherein the channel layer is configured as an N-type channel (Lee: [0074]: the channel may be configured to be n-type by including an n-type dopant.).”
Regarding Claim 16,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the two-dimensional material comprises one of Si, Ge, MoS2, WS2, MoSe2, ReS2, WSe2, or graphene (Lee: [0071], [0072]: The TMD (TMD is a kind of two-dimensional material) may be WSe-2.).”
Regarding Claim 17,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the two-dimensional material comprises WSe2 (Lee: [0071], [0072]), wherein the electrode comprises Pd (Lee: [0076]: 180 and 190 may be Pd.), and wherein the channel layer is configured as a P-type channel (Lee: [0091]: 120 may be p-type by including a p-type dopant.).”
Regarding Claim 18,
Lee/Otake/Ju teaches:
“The method of claim 11, wherein the electrode comprises at least one of Cr, Pd, Au, Ti, Pt, Bi, Ag, Co, Ni, Cu, Sb, Sn, Al, or graphene (Lee: [0076]: 180 and 190 may include Cr.).”
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Lee/Otake/Ju as applied to claims 11-18 above, and further in view of Nakayama.
Regarding Claim 19,
Lee/Otake/Ju teaches:
“The method of claim 11”
Lee/Otake/Ju doesn’t substantially teach:
“wherein the substrate includes one of SiO2, A1203, HfO2, or h-BN.”
However, Nakayama teaches:
“wherein the substrate includes one of SiO2, A1203, HfO2, or h-BN (Nakayama: substrate, [0108-0110], FIG. 1: The substrate may include both Si and SiO2.).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Lee/Otake/Ju is modifiable in view of Nakayama.
This is because Lee/Otake/Ju teaches a substrate made of Si. Lee/Otake/Ju doesn’t substantively teach a substrate comprising SiO2. Nakayama teaches a substrate comprising Si. Nakayama further teach a substrate comprising Si and SiO2. Because both Lee/Otake/Ju and Nakayama have a substrate comprising Si, one of ordinary skill in the art would have deemed it obvious to substitute the substrate comprising silicon of Lee/Otake/Ju for a substrate comprising Si and SiO2 of Nakayama for the predictable result of a semiconductor substrate of which a device may be built upon.
Response to Arguments
Applicant’s amendments to the Claims have overcome the Examiner’s 103 rejections.
Applicant’s arguments, with respect to the rejection(s) of claim(s) have been fully considered, but are moot because the new ground of rejection does not rely on Gaul, the reference to which Applicant’s arguments pertain. Upon further consideration, a new ground of rejection is made in view of Otake in order to overcome Applicant’s amendments to the claims.
In the interest of compact prosecution, if the Applicant were to amend an independent claim with the following limitation:
“wherein the mask comprises a photoresist layer, wherein the photoresist layer is removed from a portion of the channel layer containing the channel”
It would overcome the current rejections of the independent claims. The Examiner is available for interview at Applicant’s convenience for discussion of claim amendments.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDRE XAVIER RAMIREZ whose telephone number is (571)272-2715. The examiner can normally be reached Monday - Friday 8:30 AM to 6:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALEXANDRE X RAMIREZ/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812