Prosecution Insights
Last updated: April 19, 2026
Application No. 18/119,026

ELECTRONIC DEVICE

Non-Final OA §103
Filed
Mar 08, 2023
Examiner
SHARMA, ADITYA
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STMicroelectronics
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
18 granted / 20 resolved
+22.0% vs TC avg
Strong +17% interview lift
Without
With
+16.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
18 currently pending
Career history
38
Total Applications
across all art units

Statute-Specific Performance

§103
60.8%
+20.8% vs TC avg
§102
30.1%
-9.9% vs TC avg
§112
9.1%
-30.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 20 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on March 8, 2023, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 6, 22-23, 27 are rejected under 35 U.S.C. 103 as being unpatentable over Gaucher et al. (US 20090009399 A1) in view of So et al. (US 20190057944 A1) Regarding Claim 1 – Gaucher teaches an electronic device (Fig 4A; 400), comprising: a substrate (Fig 4A; 401); an electronic integrated circuit chip mounted to a first region of the substrate (Fig 4A; 402/401; Gaucher [0039] states “an integrated circuit chip (402) backside mounted to the package frame (401)”); a block comprising [[:]] a radiation element for an antenna mounted to a dielectric material layer (Fig 2A; Gaucher [0022] states “a planar antenna array (200) that is patterned or otherwise formed on one side of a dielectric substrate (201)… comprises an array of radiating patch elements (210)”, additionally Fig 4A; Gaucher [0040] states “The antenna module (403) comprises an integrated antenna device (404)… he integrated antenna device (404) comprises a planar substrate (404a)… may have a printed antenna array and feed line structure (200)”); wherein the block is mounted to a second region of the substrate that is offset with respect to the first region of the substrate (Fig 4A; Gaucher [0039] shows chip (402) and antenna module (403) both mounted to package frame (401) at different locations; Gaucher [0041] states “a portion of the integrated antenna device (404) extends past a side edge of the socket structure (405) and is disposed above the active surface of the chip (402)”). Gaucher does not explicitly disclose a bonding element arranged between the block and the substrate, said bonding element attaching the dielectric material layer of the block to the substrate; where the radiation element of the block does not cover the electronic integrated circuit chip; and a coating layer made of a coating material covering both the electronic integrated circuit chip mounted to the first region of the substrate and the block mounted to the second region of the substrate. So teaches a bonding element arranged between the block and the substrate, said bonding element attaching the dielectric material layer of the block to the substrate (Fig 9; So [0086] states “a fan-out semiconductor package 100A… may include a core member 110” and “an encapsulant 130 encapsulating at least portions of the core member 110 and the semiconductor chip 120”; additionally, Figs 14C-14D; So [0116-0117] describe attaching the core member 110 and semiconductor chip 120 using adhesive film 190 and forming first insulating layer 141a on the surface of core member 110 and the active surface of semiconductor chip 120); where the radiation element of the block does not cover the electronic integrated circuit chip (Figs 20A-20D; So [0130] describes antennas 112aA1a, 112aA-1b and 112aA-2a, 112aA-2b are disposed to the left/right/ above/below the semiconductor chip 120, i.e., antenna patterns positioned around rather than over the chip); and a coating layer made of a coating material covering both the electronic integrated circuit chip mounted to the first region of the substrate and the block mounted to the second region of the substrate (Fig 9; So [0101] states “the encapsulant 130 may cover a lower surface of the core member 110, and cover side surface and the inactive surface of the semiconductor chip 120… the encapsulant 130 may fill at least portions of the through-hole 110H”; and Fig 14C; So [0116] describes the encapsulant 130 may is formed from a liquid-phase material applied by a coating method and then hardened, i.e., a coating material forming a coating layer over both the core member 110 (with antenna pattern 112aA) and the semiconductor chip 120). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher with a bonding element arranged between the block and the substrate, said bonding element attaching the dielectric material layer of the block to the substrate; where the radiation element of the block does not cover the electronic integrated circuit chip; and a coating layer made of a coating material covering both the electronic integrated circuit chip mounted to the first region of the substrate and the block mounted to the second region of the substrate as taught by So to get the benefit of a miniaturized, thinned package with improved RF performance and reduced cost (So [0079, 0088]). Regarding Claim 2 – Gaucher in view of So teaches the electronic device according to claim 1, wherein the electronic integrated circuit chip is configured to excite the radiation element with a communication signal (Gaucher Fig 4A; 400/402/403/404; So Fig 9; So [0099] states “the fan-out semiconductor package 100A… may be a package in which the RFIC and a millimeter wave/5G antenna are integrated with each other” and So [0100] states “connection pads 120PS…may be connected to the feeding line 112aF of the antenna pattern 112aA” so that the RFIC drives the antenna). Regarding Claim 6 – Gaucher in view of So teaches the electronic device according to claim 1, wherein the radiation element rests on the dielectric material layer and has a lateral extension which is smaller than a lateral extension of the dielectric material layer (Gaucher Fig 2A; Gaucher [0022] states “a planar antenna array (200) that is patterned or otherwise formed on one side of a dielectric substrate (201)… comprises an array of radiating patch elements (210)” and Fig 2A shows the radiating patch elements (210) formed on and within the outline of the dielectric substrate (201) such that the dielectric substrate laterally extends beyond the radiation elements; similarly, So Fig 9-10 show the antenna pattern 112aA formed on the insulating layer 111 with the insulating layer extending laterally beyond the antenna pattern (So [0092-0096])). Regarding Claim 22 – Gaucher teaches electronic device, comprising: an electronic chip having a first surface mounted to a first region of a substrate (Fig 4A; 401/402; Gaucher [0039] quoted above); and a radiation element of an antenna separated from the substrate by a second layer made of a dielectric material and being offset with respect to the first region of the substrate (Fig 2A, 4A; Gaucher [0022, 0040] quoted above; Gaucher [0039] shows chip (402) and antenna module (403) both mounted to package frame (401) at different locations, i.e., offset regions of the substrate). Gaucher does not explicitly disclose a first layer made of a coating material covering at least a second surface of the electronic chip opposite the first surface; that the radiation element does not cover the electronic chip; wherein a surface of the radiation element facing away from the substrate is covered with the first layer; and a bonding element arranged between the second layer and the substrate to bond at least the second layer to the substrate. So teaches a first layer made of a coating material covering at least a second surface of the electronic chip opposite the first surface (Fig 9, 14C; So [0101, 0116] quoted above describing a coating material forming a coating layer); that the radiation element does not cover the electronic chip (Figs 20A-20D; So [0130] describes antennas 112aA1a, 112aA-1b and 112aA-2a, 112aA-2b are disposed to the left/right/ above/below the semiconductor chip 120, i.e., antenna patterns positioned around rather than over the chip); wherein a surface of the radiation element facing away from the substrate is covered with the first layer (Fig 9; So [0101] teaches encapsulant 130 covering the core member 110 that carries the antenna pattern 112aA as well as semiconductor chip 120, forming a common coating layer over the antenna side facing away from the mainboard); and a bonding element arranged between the second layer and the substrate to bond at least the second layer to the substrate (Figs 14C-14D; So [0116-0117] describe core member 110 and semiconductor chip 120 attached to adhesive film 190, i.e., a bonding element between the core member/second layer and the underlying support, which bonds at least the core member 110 (carrying the antenna pattern) to the substrate). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher with a first layer made of a coating material covering at least a second surface of the electronic chip opposite the first surface; that the radiation element does not cover the electronic chip; wherein a surface of the radiation element facing away from the substrate is covered with the first layer; and a bonding element arranged between the second layer and the substrate to bond at least the second layer to the substrate as taught by So to get the benefit of a miniaturized, thinned package with improved RF performance and reduced cost (So [0079, 0088]). Regarding Claim 23 – Gaucher in view of So teaches the electronic device according to claim 22, wherein the electronic chip is configured to excite the radiation element with a communication signal (Gaucher Fig 4A; 400/402/403/404; So Fig 9; So [0099] states “the fan-out semiconductor package 100A… may be a package in which the RFIC and a millimeter wave/5G antenna are integrated with each other” and So [0100] states “connection pads 120PS…may be connected to the feeding line 112aF of the antenna pattern 112aA” so that the RFIC drives the antenna). Regarding Claim 27 – Gaucher in view of So teaches the electronic device according to claim 22, wherein the radiation element rests on the second layer and has a lateral extension which is smaller than a lateral extension of the second layer (Gaucher Fig 2A; Gaucher [0022] states “a planar antenna array (200) that is patterned or otherwise formed on one side of a dielectric substrate (201)… comprises an array of radiating patch elements (210)” and Fig 2A shows the radiating patch elements (210) formed on and within the outline of the dielectric substrate (201) such that the dielectric substrate laterally extends beyond the radiation elements; similarly, So Fig 9-10 show the antenna pattern 112aA formed on the insulating layer 111 with the insulating layer extending laterally beyond the antenna pattern (So [0092-0096])). Claims 3, 24 are rejected under 35 U.S.C. 103 as being unpatentable over Gaucher et al. (US 20090009399 A1) in view of So et al. (US 20190057944 A1) and in further view of Teshima et al. (US 20170062953 A1) Regarding Claim 3 – Gaucher in view So teaches the electronic device according to claim 1, wherein the substrate comprises: a ground layer supporting at least one conductive surface, coupled to ground (So Figs 10-11; ground pattern 112bG; So [0008] states “one of the plurality of wiring layers includes an antenna pattern, the other of the plurality of wiring layers includes a ground pattern, and the antenna pattern is connected to the connection pads through the redistribution layer in a signal manner”, and Fig 14B-14E So [0096] states “The second wiring layer 112b may include the ground pattern 112bG… The ground pattern 112bG may be formed in a plate shape, and may occupy most of a lower surface of the insulating layer 111. The ground pattern 112bG may serve as a ground of the antenna pattern 112aA”); and a signal layer provided with at least one signal line (So [0096] states “The antenna pattern 112aA may be connected to connection pads 120PS… through signal patterns 142S of the redistribution layer 142 in a signal manner” and “The first wiring layer 112a may include the antenna pattern 112aA and the feeding line 112aF”). Gaucher in view of So doesn’t explicitly disclose a ground layer… provided with an opening; and a signal layer… arranged in front of at least a portion of the opening of the ground layer (So Fig 14E; So [0118] states “The redistribution layer 142 may include the signal lines 142S”); wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer, the ground layer being arranged between the signal layer and the radiation element. Teshima teaches a ground layer… provided with an opening (Fig 7; ground plane 5; Teshima [0064] states “The ground plane 5 on the second surface 2B includes an opening, and the plurality of millimeter-wave antenna elements 7 are arranged on a region of the second surface 2B which is exposed through the opening”); and a signal layer… arranged in front of at least a portion of the opening of the ground layer (Fig 5-6; RF module 8 on exposed portion of 2A at opening; Teshima [0060] states “The ground plane 5 may comprise an opening through which a part of the top surface 2A of the substrate 2 is exposed. In this case, the millimeter-wave radio frequency (RF) module 8 may be arranged on the exposed portion of the top surface 2A of the substrate 2” paired with So’s signal lines disclosure [0118] quoted above); wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer (Fig 7; antenna elements 7; Teshima [0064] states “the plurality of millimeter-wave antenna elements 7 are arranged on a region… which is exposed through the opening”), the ground layer being arranged between the signal layer and the radiation element (Fig 5; ground plane 9 between 8 and 7; Teshima [0060] states “a ground plane 9 may be provided in a layer between the plurality of millimeter-wave antenna elements 7 and the millimeter-wave radio frequency (RF) module 8.”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with a ground layer… provided with an opening; and a signal layer… arranged in front of at least a portion of the opening of the ground layer; wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer, the ground layer being arranged between the signal layer and the radiation element as taught by Teshima to obtain improved radiation property (Teshima [0043]) and “Deterioration of the performance… can be thereby suppressed” (Teshima [0069]) by arranging the RF module at a position opposed via the ground plane (Teshima [0054]). Regarding Claim 24 – Gaucher in view So teaches the electronic device according to claim 22, wherein the substrate comprises: a ground layer supporting at least one conductive surface, coupled to ground (So Figs 10-11; ground pattern 112bG; So [0008] states “one of the plurality of wiring layers includes an antenna pattern, the other of the plurality of wiring layers includes a ground pattern, and the antenna pattern is connected to the connection pads through the redistribution layer in a signal manner”, and Fig 14B-14E So [0096] states “The second wiring layer 112b may include the ground pattern 112bG… The ground pattern 112bG may be formed in a plate shape, and may occupy most of a lower surface of the insulating layer 111. The ground pattern 112bG may serve as a ground of the antenna pattern 112aA”); and a signal layer comprising at least one signal line (So [0096] states “The antenna pattern 112aA may be connected to connection pads 120PS… through signal patterns 142S of the redistribution layer 142 in a signal manner” and “The first wiring layer 112a may include the antenna pattern 112aA and the feeding line 112aF”). Gaucher in view of So doesn’t explicitly disclose a ground layer… provided with an opening; and a signal layer… arranged in front of at least a portion of the opening of the ground layer; wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer (So Fig 14E; So [0118] states “The redistribution layer 142 may include the signal lines 142S”), and wherein the ground layer is arranged between the signal layer and the radiation element. Teshima teaches a ground layer… provided with an opening (Fig 7; ground plane 5; Teshima [0064] states “The ground plane 5 on the second surface 2B includes an opening, and the plurality of millimeter-wave antenna elements 7 are arranged on a region of the second surface 2B which is exposed through the opening”); and a signal layer… arranged in front of at least a portion of the opening of the ground layer (Fig 5-6; RF module 8 on exposed portion of 2A at opening; Teshima [0060] states “The ground plane 5 may comprise an opening through which a part of the top surface 2A of the substrate 2 is exposed. In this case, the millimeter-wave radio frequency (RF) module 8 may be arranged on the exposed portion of the top surface 2A of the substrate 2” paired with So’s signal lines disclosure [0118] quoted above); wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer (Fig 7; antenna elements 7; Teshima [0064] states “the plurality of millimeter-wave antenna elements 7 are arranged on a region… which is exposed through the opening”), and wherein the ground layer is arranged between the signal layer and the radiation element (Fig 5; ground plane 9 between 8 and 7; Teshima [0060] states “a ground plane 9 may be provided in a layer between the plurality of millimeter-wave antenna elements 7 and the millimeter-wave radio frequency (RF) module 8.”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with a ground layer… provided with an opening; and a signal layer… arranged in front of at least a portion of the opening of the ground layer; wherein the radiation element is arranged in front of at least a portion of the opening of the ground layer, and wherein the ground layer is arranged between the signal layer and the radiation element as taught by Teshima to obtain improved radiation property (Teshima [0043]) and “Deterioration of the performance… can be thereby suppressed” (Teshima [0069]) by arranging the RF module at a position opposed via the ground plane (Teshima [0054]). Claims 4, 25 are rejected under 35 U.S.C. 103 as being unpatentable over Gaucher et al. (US 20090009399 A1) in view of So et al. (US 20190057944 A1) and in further view of Hong et al. (US 20100289158 A1) Regarding Claim 4 – Gaucher in view So teaches the electronic device according to claim 1, but fails to disclose the bonding element has a thickness in a range from 5 to 15 micrometers. Hong teaches the bonding element has a thickness in a range from 5 to 15 micrometers (Fig 3; Hong [0025] states “an adhesive film comprising… an adhesive layer… at a thickness of 5 to 50 μm”; Hong [0066] further states “except that the film thickness was changed to 10 μm” i.e., a bonding film thickness falling within the claimed 5-15 micrometers range). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with the bonding element has a thickness in a range from 5 to 15 micrometers as taught by Hong in order to control burr incidence and maintain package reliability (Hong [0026] states “characteristic of burr incidence is changed depending on thickness of the adhesive layer” and Hong [0032] states “many burrs are generated, heat resistance is lowered, so that a problem is caused in reliability”). Regarding Claim 25 – Gaucher in view So teaches the electronic device according to claim 22, but fails to disclose wherein the bonding element has a thickness in the range from 5 to 15 micrometers. Hong teaches the bonding element has a thickness in the range from 5 to 15 micrometers (Fig 3; Hong [0025, 0066] quoted above). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with the bonding element has a thickness in the range from 5 to 15 micrometers as taught by Hong in order to control burr incidence and maintain package reliability (Hong [0026] states “characteristic of burr incidence is changed depending on thickness of the adhesive layer” and Hong [0032] states “many burrs are generated, heat resistance is lowered, so that a problem is caused in reliability”). Claims 5, 26 are rejected under 35 U.S.C. 103 as being unpatentable over Gaucher et al. (US 20090009399 A1) in view of So et al. (US 20190057944 A1) and in further view of Fujii et al. (US 20100308941 A1) Regarding Claim 5 – Gaucher in view So teaches the electronic device according to claim 1, wherein the dielectric material layer (Gaucher Fig 2A; Gaucher [0022] states “a planar antenna array (200) that is patterned or otherwise formed on one side of a dielectric substrate (201)… comprises an array of radiating patch elements (210)”), but fails to disclose the dielectric material layer has a thickness in a range from 260 to 290 micrometers. Fujii teaches the dielectric material layer has a thickness in a range from 260 to 290 micrometers (Figs 2-4; Fujii [0037] states “the insulating layer 23 may have a thickness of 260 micrometers, for example” and Fujii [0089] states “The insulating layer 23 which is completely cured may have a thickness of 260 micrometers, for example”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with the dielectric material layer has a thickness in a range from 260 to 290 micrometers as taught by Fujii because Fujii [0070] states “it is possible to reduce the propagation loss of the high frequency signal effectively” and Fujii [0122] states “the propagation loss of a high frequency signal… can be effectively reduced”. Regarding Claim 26 – Gaucher in view So teaches the electronic device according to claim 22, wherein the second layer (Gaucher Fig 2A; Gaucher [0022] states “a planar antenna array (200) that is patterned or otherwise formed on one side of a dielectric substrate (201)… comprises an array of radiating patch elements (210)”), but fails to disclose the second layer has a thickness in the range from 260 to 290 micrometers. Fujii teaches disclose the second layer has a thickness in the range from 260 to 290 micrometers (Figs 2-4; Fujii [0037] states “the insulating layer 23 may have a thickness of 260 micrometers, for example” and Fujii [0089] states “The insulating layer 23 which is completely cured may have a thickness of 260 micrometers, for example”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with the second layer has a thickness in the range from 260 to 290 micrometers as taught by Fujii because Fujii [0070] states “it is possible to reduce the propagation loss of the high frequency signal effectively” and Fujii [0122] states “the propagation loss of a high frequency signal… can be effectively reduced”. Claims 7-8, 28 are rejected under 35 U.S.C. 103 as being unpatentable over Gaucher et al. (US 20090009399 A1) in view of So et al. (US 20190057944 A1) and in further view of Shie (US 20080253074 A1) Regarding Claim 7 – Gaucher in view So teaches the electronic device according to claim 1, but fails to explicitly disclose further comprising one or more alignment elements arranged at a level of the substrate and configured to guide positioning of the block for mounting to the substrate. Shie teaches one or more alignment elements arranged at a level of the substrate (Figs 1-4; 200/205; Shie [0018] states “The rear substrate includes an extending portion 23… Ends of the conductive lines 24 extend to a predetermined area… thereby defining a bonding area 200” and Shie [0019] states “the bonding area 200 includes… two first alignment marks 205”) and configured to guide positioning of the block for mounting to the substrate (Figs 2-4; Shie [0022] states “the second alignment marks 229 are precisely aligned with the first alignment marks 205… Thereby, the first connecting finger assembly 225 and the second connecting finger assemblies 227 of the FPC 22 are respectively aligned with the first circuit pad assembly 203 and the second circuit pad assemblies 204 of the display panel 20”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with one or more alignment elements arranged at a level of the substrate and configured to guide positioning of the block for mounting to the substrate as taught by Shie to achieve “precisely aligned” placement and “the reliability of the connection… is high” (Shie [0022, 0023]). Regarding Claim 8 – Gaucher in view of So and in further view of Shie teaches the electronic device according to claim 7, wherein said one or more alignment elements are located between the first and second regions of the substrate (Fig 2; Shie [0019] states “each first alignment mark 205 being between the first circuit pad assembly 203 and the corresponding second circuit pad assembly 204” additionally, Shie [0022] states “the second alignment marks 229 are precisely aligned with the first alignment marks 205 respectively”). Regarding Claim 28 – Gaucher in view of So teaches the electronic device according to claim 22, but fails to explicitly disclose further comprising one or more alignment elements are arranged at a level of the substrate to guide positioning of at least the second layer. Shie teaches one or more alignment elements are arranged at a level of the substrate (Figs 1-2; 200/205; Shie [0018, 0019] quoted above) to guide positioning (Fig 4; 205/229; Shie [0022] quoted above) of at least the second layer (Shie [0021] states “The substrate 221 can be made from polyimide (PI) resin”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the electronic device of Gaucher in view of So with one or more alignment elements are arranged at a level of the substrate to guide positioning of at least the second layer as taught by Shie because Shie [0022] states “the second alignment marks 229 are precisely aligned with the first alignment marks 205” and Shie [0023] states “the reliability of the connection… is high”. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADITYA SHARMA/ Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/ Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Mar 08, 2023
Application Filed
Dec 09, 2025
Non-Final Rejection — §103 (current)

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Expected OA Rounds
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Grant Probability
99%
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2y 8m
Median Time to Grant
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