Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of claims 1-15 (for example, claims 1-6) in the reply filed on 05/29/2026 is acknowledged. The traversal is on the grounds that claims are not mutually exclusive. Respectfully, this is not found persuasive because the claims recite limitations only for random numbers.
The requirement is still deemed proper and is therefore made FINAL.
Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 05/29/2026.
This application contains claims directed to the following patentably distinct species figures 1-6 (for example, claims 1-6) and figures 7A-D (for example, claims 16-20). The species are independent or distinct because the claims to the different species recite the mutually exclusive characteristics of such species; see, for example, the subject matter disclosed regarding random numbers at least at paragraphs [0053]-[0065]. In addition, these species are not obvious variants of each other based on the current record.
Applicant is required under 35 U.S.C. 121 to elect a single disclosed species, or a single grouping of patentably indistinct species, for prosecution on the merits to which the claims shall be restricted if no generic claim is finally held to be allowable. Currently, no claims are generic.
There is a serious search and/or examination burden for the patentably distinct species as set forth above because at least the following reason(s) apply:
--the species or groupings of patentably indistinct species have acquired a separate status in the art due to their recognized divergent subject matter; and/or
--the species or groupings of patentably indistinct species require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search strategies or search queries).
Applicant is advised that the reply to this requirement to be complete must include (i) an election of a species to be examined even though the requirement may be traversed (37 CFR 1.143) and (ii) identification of the claims encompassing the elected species or grouping of patentably
indistinct species, including any claims subsequently added. An argument that a claim is allowable or that all claims are generic is considered nonresponsive unless accompanied by an election.
The election may be made with or without traverse. To preserve a right to petition, the election must be made with traverse. If the reply does not distinctly and specifically point out supposed errors in the election of species requirement, the election shall be treated as an election without traverse. Traversal must be presented at the time of election in order to be considered timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are added after the election, applicant must indicate which of these claims are readable on the elected species or grouping of patentably indistinct species.
Should applicant traverse on the ground that the species, or groupings of patentably indistinct species from which election is required, are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing them to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the species unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other species.
Upon the allowance of a generic claim, applicant will be entitled to consideration of claims to additional species which depend from or otherwise require all the limitations of an allowable generic claim as provided by 37 CFR 1.141.
Telephone restriction practice is not permitted because it appears applicant has legal representation but a valid power of attorney has not been filed in the present application. Providing representative information in an Application Data Sheet (ADS) does not constitute a power of attorney. See 37 CFR 1.76(b)(4) and MPEP § 408. For information on appointing a power of attorney, see MPEP § 402.02 et seq.
Applicant is reminded that upon the cancelation of claims to a non-elected invention, the inventorship must be corrected in compliance with 37 CFR 1.48(a) if one or more of the currently named inventors is no longer an inventor of at least one claim remaining in the application. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i).
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character not mentioned in the description: “200” in FIG. 2.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 7, 9-10, and 14 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by BHUNIA et al. [US 2023/0006674 A1].
As per claim 1, a computer system [0059 implemented as methods, apparatus, systems, computing devices, computing entities, and/or the like] for protecting an original circuit design for an integrated circuit Abstract protecting, 0006 to thwart attacks], the computer system comprising:
a logic circuit replacement tool [0054 software component] for generating a redacted circuit design for the integrated circuit by replacing logic circuits in the original circuit design with configurable circuits in the redacted circuit design [0008 replacing given ones of the nodes (representative of logic gates) with configurable LUTs, 0053 replacing Boolean logic functions in ASIC designs, Boolean functions or combinational logic of an ASIC design may be redacted by replacing with programmable components], wherein the configurable circuits that perform logic functions of the logic circuits when a bitstream stored in storage circuits configures the configurable circuits [0011 configurable LUTs are programmed using the configuration bitstream, configuration bitstreams are stored, configuration bitstream may be loaded, 0053 that can be configured using a bitstream, at minimal power, performance, and area overhead], and
wherein the logic circuit replacement tool causes the redacted circuit design to share a first bit in the bitstream between at least two of the configurable circuits by coupling a first one of the storage circuits that stores the first bit to a first input of each of the at least two of the configurable circuits [0011 bits (the plural connotes at least one to be interpreted as a first bit) of the configuration bitstream may be shared between the configurable LUTs, 0101 bits can be shared with multiple configurable LUTs to minimize overhead].
As per claim 2, the computer system of claim 1, wherein each of the at least two of the configurable circuits comprises a lookup table circuit [0008 configurable lookup tables (LUTs)], and wherein the first one of the storage circuits is coupled to a data input of a multiplexer circuit in the lookup table circuit in each of the at least two of the configurable circuits [0012 select inputs of MUXes].
As per claim 3, the computer system of claim 1, wherein the logic circuit replacement tool causes the redacted circuit design to share a second bit in the bitstream between the at least two of the configurable circuits by coupling a second one of the storage circuits that stores the second bit to a second input of each of the at least two of the configurable circuits [0011 bits (the plural connotes more than one to be interpreted as a second bit) of the configuration bitstream may be shared between the configurable LUTs, 0101 bits can be shared with multiple configurable LUTs to minimize overhead].
As per claim 7, the computer system of claim 1, wherein the logic circuit replacement tool is configured to replace at least one of the logic circuits in the original circuit design with a lookup table circuit comprising at least three select inputs [0101 3x1, 8x1, available in any standard cell library, 0107 MxN configurable LUT of a suitable size, where both M and N can be any integer (interpreted as at least three)].
As per claim 9, a method for redacting an original circuit design for an application specific integrated circuit to generate a redacted circuit design [Abstraction ASIC designs, redaction, the method comprising:
replacing logic circuits in the original circuit design with configurable circuits in the redacted circuit design that perform logic functions of the logic circuits [0008 replacing given ones of the nodes (representative of logic gates) with configurable LUTs, 0053 replacing Boolean logic functions in ASIC designs, Boolean functions or combinational logic of an ASIC design may be redacted by replacing with programmable components] when a bitstream stored in storage circuits configures the configurable circuits [0011 configurable LUTs are programmed using the configuration bitstream, configuration bitstreams are stored, configuration bitstream may be loaded, 0053 that can be configured using a bitstream, at minimal power, performance, and area overhead] using a logic circuit replacement tool [0059 implemented as methods, apparatus, systems, computing devices, computing entities, and/or the like]; and
sharing a first bit in the bitstream between at least two of the configurable circuits in the redacted circuit design to cause the first bit in the bitstream to configure the at least two of the configurable circuits [0011 bits (the plural connotes at least one to be interpreted as a first bit) of the configuration bitstream may be shared between the configurable LUTs, 0101 bits can be shared with multiple configurable LUTs to minimize overhead].
As per claim 10, the method of claim 9 further comprising: sharing a second bit in the bitstream between the at least two of the configurable circuits in the redacted circuit design to cause the second bit in the bitstream to configure the at least two of the configurable circuits [0011 bits (the plural connotes more than one to be interpreted as a second bit) of the configuration bitstream may be shared between the configurable LUTs, 0101 bits can be shared with multiple configurable LUTs to minimize overhead].
As per claim 14, the method of claim 9, wherein replacing the logic circuits in the original circuit design with the configurable circuits further comprises: replacing at least one of the logic circuits in the original circuit design with one of the configurable circuits that comprises at least three select inputs [0101 3x1, 8x1, available in any standard cell library, 0107 MxN configurable LUT of a suitable size, where both M and N can be any integer (interpreted as at least three)].
Allowable Subject Matter
Claims 4-6, 8, 11-13, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record does not anticipate or render obvious:
As per claim 4, the computer system of claim 1, wherein the logic circuit replacement tool refrains from replacing any of the logic circuits in the original circuit design with a lookup table circuit that only consists of a single select input.
As per claim 5, the computer system of claim 1, wherein the logic circuit replacement tool refrains from replacing any of the logic circuits in the original circuit design with an additional configurable circuit having at least two inputs that are coupled to one of the storage circuits that stores a single bit in the bitstream.
As per claim 6, the computer system of claim 1, wherein the logic circuit replacement tool refrains from replacing any of the logic circuits in the original circuit design with an additional configurable circuit that receives a reset signal at an input.
As per claim 8, the computer system of claim 1, wherein the logic circuit replacement tool refrains from replacing any of the logic circuits in the original circuit design with an additional configurable circuit that receives bits in the bitstream in a first order and another configurable circuit that receives the bits in the bitstream in a second order that is permutated with respect to the first order.
As per claim 11, the method of claim 9, wherein replacing the logic circuits in the original circuit design with the configurable circuits further comprises: refraining from replacing any of the logic circuits in the original circuit design with an additional configurable circuit that only consists of a single select input.
As per claim 12, the method of claim 9, wherein replacing the logic circuits in the original circuit design with the configurable circuits further comprises: refraining from replacing any of the logic circuits in the original circuit design with an additional configurable circuit having at least two inputs that receive a same configuration bit in the bitstream.
As per claim 13, the method of claim 9, wherein replacing the logic circuits in the original circuit design with the configurable circuits further comprises: refraining from replacing any of the logic circuits in the original circuit design with an additional configurable circuit that receives a reset signal at an input.
As per claim 15, the method of claim 9, wherein replacing the logic circuits in the original circuit design with the configurable circuits further comprises: refraining from replacing the logic circuits in the original circuit design with an additional configurable circuit that receives configuration bits in the bitstream in a first order and another configurable circuit that receives the configuration bits in the bitstream in a second order that is different than the first order.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEIGH M GARBOWSKI whose telephone number is (571)272-1893. The examiner can normally be reached M-F 9-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 571-272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LEIGH M GARBOWSKI/Primary Examiner, Art Unit 2851
Prosecution Insights