Tech Center 2800 • Art Units: 1737 2825 2851
This examiner grants 88% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18115388 | QUANTUM COMPUTER AND CONTROL METHOD THEREFOR | Non-Final OA | Hitachi, Ltd. |
| 18170335 | PHYSICAL LAYOUT SYNTHESIS FOR STANDARD CELLS USING SLICE LAYOUTS | Non-Final OA | Applied Materials, Inc. |
| 18315074 | Power-Efficient Clocking and Clock Shaping | Non-Final OA | Expedera, Inc. |
| 18022097 | QUANTUM CIRCUIT GENERATION DEVICE, QUANTUM CIRCUIT GENERATION METHOD, AND QUANTUM CIRCUIT GENERATION PROGRAM | Non-Final OA | The University of Tokyo |
| 18187700 | Integrated Circuit with FIB-Ready Structures | Non-Final OA | NUVOTON TECHNOLOGY CORPORATION |
| 17924543 | VERIFYING FREEFORM CURVILINEAR FEATURES OF A MASK DESIGN | Non-Final OA | ASML NETHERLANDS B.V. |
| 18335184 | BUFFER COMPATIBLE WITH SKEW CRITICAL PROTOCOLS IMPLEMENTED IN AN INTEGRATED CIRCUIT AND METHODS FOR ROUTING METAL LINES TO THE BUFFER IN THE INTEGRATED CIRCUIT | Non-Final OA | NXP USA, Inc. |
| 18814430 | MASK OPTIMIZATION PREFERENTIALLY ACCOUNTING FOR OVERLAP REGIONS | Non-Final OA | D2S, Inc. |
| 18134497 | ALIGNING MULTI-CHIP DEVICES | Non-Final OA | XILINX, INC. |
| 18128368 | TWO BY TWO LOGIC CHIPLET | Non-Final OA | XILINX, INC. |
| 18268017 | System and Method for Automatic Generation of Standard Cells Using Satisfiability Modulo Theory Solver | Non-Final OA | SILVACO, INC. |
| 18177065 | AUTOMATED VERIFICATION OF INTEGRATED CIRCUITS | Non-Final OA | Celera, Inc. |
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