Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/17/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “translating one or more inter predictors of a current block of the current frame
and/or translating one or more motion vectors of the current block of the current frame;” “And/or” is indefinite because it is not clear whether “and” or “or” is intended, and the scope changes from requiring both limitations linked by the conjunction for “and”, to only requiring one of the limitations linked by the conjunction for “or”.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,167,006. Although the claims at issue are not identical, they are not patentably distinct from each other because the limitation of translating one or more inter predictors of a current block and/or translating one or more motion vectors of the current block of the current frame maps to “resizing the motion information according to a resolution of a reference frame, the resizing including scaling at least one pixel coordinate…”. Additionally, “obtaining a reference picture from a reference frame buffer, though not explicitly recited in the ‘006 patent claim 1, is disclosed in Wu, US 2016/0119642 A1. See “search buffer” in figure 1, as disclosed in [0015], which stores references frames. Incorporating such a buffer into the invention of the ‘006 claim 1 would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date, in order to store reference frames for inter prediction during an encoding process. See Wu, [0015].
18/122,692 Claim 1
US 12,167,006 Claim 1
A method comprising:
obtaining, by a video decoder, a current frame of a bitstream;
obtaining a reference picture from a reference frame buffer, the reference picture having a resolution different from a resolution of the current frame;
A method comprising:
determining motion information of a block of a current frame, the motion information comprising a motion vector of the block and at least one pixel coordinate corresponding to the motion vector;
translating one or more inter predictors of a current block of the current frame and/or translating one or more motion vectors of the current block of the current frame;
resizing the motion information according to a resolution of a reference frame, the resizing the motion information according to the resolution of the reference frame including scaling at least one pixel coordinate corresponding to the motion vector by a ratio of a resolution of the reference frame to a resolution of a current frame, to derive at least one scaled coordinate corresponding to the motion vector;
locating a predictor block of the reference frame in accordance with the resized motion information, the locating the predictor block of the reference frame including:
performing motion prediction on the current block by reference to the located
predictor block of the reference picture.
determining that a video decoder supports a quarter-pixel accuracy; and
rounding the at least one scaled coordinate each to respective nearest
values on a quarter-pixel scale; and
performing motion prediction on [[the]].§. current block by reference to the located
predictor block.
Claim 2 is rejected on the grounds non-statutory double patenting as being unpatentable over claim 1 of the ‘066 patent, in view of Wu. See Wu
Claim 3 is rejected on the grounds non-statutory double patenting as being unpatentable over claim 1 of the ‘066 patent, in view of Wu. See claim 1 of the ‘066 patent, where it recites, “scaling at least one pixel coordinate corresponding to the motion vector by a ratio of a resolution of the reference frame to a resolution of a current frame”
System claims 9-11 are rejected on the grounds non-statutory double patenting. System claims 9-11 correspond to method claims 1-3, and are rejected for the same reasons of obviousness as given above, respectively, for method claims 1-3.
Claims 4-8 and 12-16 are rejected on the grounds non-statutory double patenting as being unpatentable over the ‘066 patent claim 1, in view of Wu, in view of Chuang II, US 2020/0077111 A1.
Regarding claim 4, the combination of claim 1 in the ‘066 patent in view of Wu does not disclose: the method of claim 1, further comprising deriving an affine merge candidate list or an AMVP candidate list for a block of the current frame, the affine merge candidate list or the AMVP candidate list comprising a plurality of CPMVP candidates or AMVP candidates, respectively.
However, Chuang II discloses this limitation in an analogous art. Chuang II discloses deriving an affine Merge candidate list for a current block, comprising control point motion vector predictors and AMVP candidates. It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate affine merge motion candidates into a candidate list for a current block for a current frame, as disclosed in Chuang II, in order to allow for prediction from reference blocks based on rotations and deformations, as disclosed in [0006]-[0007].
Regarding claim 5, the combination of the ‘006 patent claim 1, in view of Wu, in view of Chuang II discloses the limitations of claim 4, upon which depends claim 5. This combination, specifically Chuang II, further discloses: the method of claim 4, wherein deriving the affine merge candidate list or the AMVP candidate list comprises deriving up to two inherited affine merge candidates (See Chuang II [0024].).
Regarding claim 6, the combination of the ‘006 patent claim 1, in view of Wu, in view of Chuang II discloses the limitations of claim 4, upon which depends claim 6. This combination, specifically Chuang II, further discloses. This combination, specifically Chuang II, further discloses: the method of claim 4, wherein deriving the affine merge candidate list or the AMVP candidate list comprises deriving a constructed affine merge candidate (See [0029], which discloses an affine sub-block MV derivation for inter coding.).
Regarding claim 7, the combination of the ‘006 patent claim 1, in view of Wu, in view of Chuang II discloses the limitations of claim 4, upon which depends claim 7. This combination, specifically Chuang II, further discloses: the method of claim 4, further comprising:
selecting a CPMVP candidate or AMVP candidate from the derived affine merge candidate list or AMVP candidate list (See [0013].), respectively; and
deriving motion information of the CPMVP candidate or the AMVP candidate as motion information of the block of the current frame (See figure 5, step 530, which is disclosed in [0057] as a conversion process to generate motion vectors. See last five lines: “The current block or motion information of the current block is encoded using said one more converted MVs at the video encoder side or the current block or the motion information of the current block is decoded using said one or more converted MVs at the video decoder side in step 540.”).
Regarding claim 8, the combination of Wu, in view of Lee, in view of Chuang II discloses the limitations of claim 7, upon which depends claim 8. This combination, specifically Chuang II, further discloses: the method of claim 7, wherein the motion information comprises a reference to a reference picture (See [0006], disclosing that affine prediction is a form of inter prediction.), and deriving motion information of the CPMVP candidate or the AMVP candidate further comprises:
generating a plurality of control point motion vectors (CPMVs) based on the reference to motion information of a reference picture (See [0039]-[0040], disclosing deriving sets of three control point motion vectors when a 6-parameter affine motion model is used.).
System claims 12-16 correspond, respectively, to method claims 4-8, and are rejected on the grounds of non-statutory double patenting for the same reasons of obviousness given above for method claims 4-8, respectively.
Claims 17-20 are rejected on the grounds of non-statutory double patenting as being unpatentable over claim 1 of the ‘066 patent, in further view of Seregin, US 2021/0014478 A1.
Claim 17
US 12,167,006 Claim 1
A system comprising:
A method comprising:
one or more processors and memory communicatively coupled to the one or
more processors, the memory storing computer-executable modules executable by the
one or more processors that, when executed by the one or more processors, perform
associated operations, the computer-executable modules including:
frame obtaining module configured to obtain a current frame of a bitstream;
a reference picture obtaining module configured to obtain one or more reference
pictures of reference picture list 0 or reference picture list 1 from a reference frame
buffer and determine that reference pictures having a same resolution as a resolution of a current frame are not available; and
determining motion information of a block of a current frame, the motion information comprising a motion vector of the block and at least one pixel coordinate corresponding to the motion vector;
locating a predictor block of the reference frame in accordance with the resized
motion information, the locating the predictor block of the reference frame including:
determining that a video decoder supports a quarter-pixel accuracy; and
rounding the at least one scaled coordinate each to respective nearest
values on a quarter-pixel scale; and
performing motion prediction on [[the]].§. current block by reference to the located
predictor block.
a pixel pattern translating module configured to translate pixel patterns of the one
or more reference pictures of reference picture list 0 or reference picture list 1 in
accordance with a ratio of a resolution of the current frame to a resolution of the one or
more reference pictures
resizing the motion information according to a resolution of a reference frame, the
resizing the motion information according to the resolution of the reference frame
including scaling at least one pixel coordinate corresponding to the motion vector by a
ratio of a resolution of the reference frame to a resolution of a current frame, to derive at
least one scaled coordinate corresponding to the motion vector;
Although claim 1 of the ‘006 patent does not disclose, “a reference picture obtaining module configured to obtain one or more reference pictures of reference picture list 0 or reference picture list 1”, or a pixel pattern translating module configured to translate pixel patterns of the one or more reference pictures of reference picture list 0 or reference picture list 1, this feature is disclosed in an analogous art by Seregin,
It would have been obvious to one having ordinary skill in the art before the time of the applicant’s effective filing date to incorporate a reference picture list 0 and 1 as reference picture groupings for the reference frames, as part of performing bi-directional prediction, which can increase prediction accuracy.
Claims 18-20 are rejected on the grounds of non-statutory double patenting, as being unpatentable over claim 1 of the ‘006 patent, in view of Seregin.
Regarding claim 18, The system of claim 17, further comprising:
a bi-predicting module configured to performs bi-prediction upon the current frame based on a first reference frame and a second reference frame of the reference frame buffer. (see [0067] in Seregin, “With inter-prediction using bi-prediction, two sets of motion parameters (Δx.sub.0, y.sub.0, refIdx.sub.0 and Δx.sub.1, y.sub.1, refIdx.sub.1) are used to generate two motion compensated predictions (from the same reference picture or possibly from different reference pictures). For example, with bi-prediction, each prediction block uses two motion compensated prediction signal.
Regarding claim 19, the system of claim 18, further comprising:
a vector refinement module configured to perform vector refinement during the bi-prediction process based on a first reference frame and a second reference frame of the reference frame buffer (See Seregin [0098], “In AMVP mode, the predicted motion vectors can be further refined.”).
Regarding claim 20, The system of claim 19, further comprising:
a reconstructed frame generating module configured to generate a reconstructed frame from the current frame based on the first reference frame and the second reference frame (See Seregin [0194]); and
a buffer inputting module configured to input the reconstructed frame into at least one of the reference frame buffer and a display buffer (See Seregin [0107], disclosing a decoded picture buffer (DPB)).
Allowable Subject Matter
Claims 1-20 are allowable over the prior art.
The following is an examiner’s statement of reasons for allowance. The closest prior art Wu, in view of Lee, does not disclose or suggest:
translating one or more inter predictors of a current block of the current frame and/or translating one or more motion vectors of the current block of the current frame;
locating a predictor block of the reference picture in accordance with a translated locating a predictor block of the reference picture in accordance with a translated inter predictor or motion vector by rounding a translated coordinate to a lower-granularity level of accuracy than a highest granularity level of accuracy supported by the video decoder
While Lee discloses, in [0356],
The prediction encoder 2730 may interpolate the reference image according to a minimum MVR from among the at least one candidate MVR selectable with respect to the current block and may determine the MV of the current block by using the MVR. For example, when the candidate MVR selectable with respect to the current block includes an MVR of a ¼ pixel unit, an MVR of a ½-pixel unit, an MVR of a 1-pixel unit, and an MVR of a 2-pixel unit, and the MVR of the 1-pixel unit is selected as the MVR of the current block, the prediction encoder 2730 may interpolate the reference image by using the ¼-pixel unit which has the minimum MVR and may determine the MV by using the 1-pixel unit in the interpolated reference image.
Interpolating a reference image is different from the claimed invention, which, as disclosed in the Applicant’s specification at [0131],
In the cases that the translated coordinates are at integer pixel accuracy or are rounded to integer pixel accuracy, the video decoder does not need to apply an interpolation filter to pixels of the reference block, and step 816 may be skipped with pixels at a block at the translated coordinates at the reference frame being used directly in motion prediction. Avoidance of application of the interpolation filter may greatly reduce computational costs and computing time of decoding.
A further search did not yield prior art.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE M LOTFI whose telephone number is (571)272-8762. The examiner can normally be reached 9:00-5:00.
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/KYLE M LOTFI/Examiner, Art Unit 2425
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