DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to communications filed on 12/23/2025. Claims 1-16 are pending and have been examined.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a process weakness acquisition unit, configured to obtain”, “an experimental result acquisition unit, configured to obtain”, “defect analysis unit, configured to obtain”, “a severity analysis unit, configured to analyze”, “a labeling unit, configured to label”, and “a training unit, configured to perform” in claims 9-16.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof (note amended paragraph 18 of the specification: “circuits, chips or circuit boards”).
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-16 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea without significantly more. The claim(s) recite(s) a method and device comprising obtaining, performing, analyzing, labeling, and performing.
The limitations “obtaining… performing… obtaining… analyzing… labeling” as recited in claim 1 each are a process, under the broadest reasonable interpretation, covering performance of the limitations in the mind or by pen and paper (See Berkheimer v. HP, Inc., 881 F.3d 1360, 1366, 125 USPQ2d 1649 (Fed. Cir. 2018)) but for the recitation of generic computer components. That is, the limitation “obtaining a plurality of weak patterns” in the context of the claim encompasses the user making observations. The limitation “performing a plurality of experiments on each of the weak patterns with a plurality of parameter setting values…of at least one process parameter to obtain a plurality of experimental results” in the context of the claim encompasses the user making evaluations. The limitation “obtaining a plurality of defects according to the experimental results…” in the context of the claim encompasses the user making observations. The limitation “analyzing a severity level of each of the weak patterns according to the defects and the parameter setting values…” in the context of the claim encompasses the user making evaluations. The limitation “labeling the severity levels on the weak patterns” in the context of the claim encompasses the user making judgements. If a claimed limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “mental processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claim recites additional elements. The claim recites “performing machine learning to train a weak pattern severity model”. The elements are recited at a high-level of generality, such that it amounts to no more than mere instructions to apply the exception using a generic computer component (e.g. see MPEP 2106.05(f)) and/or amounts to generally linking the use of the judicial exception to a particular technological environment or field of use (e.g. see MPEP 2106.05(h)). Accordingly, the additional elements do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are no more than a generic computer component and/or field of use. Therefore, the claims are not patent eligible.
Claim 9 also recites similar claim language as claim 1, and thus has the same issues. It is noted, with respect to claim 9, that the claim recites multiple units to perform the method. As best, the elements are recited at a high-level of generality, such that it amounts to no more than mere instructions to apply the exception using a generic computer component (e.g. See MPEP 2106.05(f)). Accordingly, the additional elements do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea, and are not sufficient to amount to significantly more than the judicial exception.
Regarding claim 2, the claim does not include any additional elements that integrate the abstract idea into a practical application or are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the severity levels (encompassing a user performing evaluations), which is part of the mental steps and does not include additional elements. This similarly applies to claim 10.
Regarding claim 3, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the weak patterns are obtained through design rule checker (user can check design rules, encompassing a user performing evaluations), which is part of the mental steps and does not include additional elements. This similarly applies to claim 11.
Regarding claim 4, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the weak patterns are obtained by a predictive classification model, which amounts to no more than mere instructions to apply the exception using a generic computer component (e.g. see MPEP 2106.05(f)) and/or amounts to generally linking the use of the judicial exception to a particular technological environment or field of use (e.g. see MPEP 2106.05(h)). This similarly applies to claim 12.
Regarding claim 5, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes using a particular algorithm (encompassing a user performing calculations), which is a mental step and does not include additional elements. This similarly applies to claim 13.
Regarding claim 6, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the parameters (encompassing a user performing observations or determinations), which is part of the mental steps and does not include additional elements. This similarly applies to claim 14.
Regarding claim 7, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the parameters (encompassing a user performing observations or determinations), which is part of the mental steps and does not include additional elements. This similarly applies to claim 15.
Regarding claim 8, the claim does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. For example, the claim merely further describes the parameters (encompassing a user performing observations or determinations), which is part of the mental steps and does not include additional elements. This similarly applies to claim 16.
Response to Arguments
Previous rejections under 35 USC 112(b) have been withdrawn in view of amendments to the specification.
Applicant’s arguments with respect to the newly amended features have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. See rejections in view of Bankes et al. (US 6389380 B1) below.
With respect to 35 USC 101, applicant argues that the steps require actual execution of semiconductor fabrication experiments, physical variation of process parameters, and empirical observation of resulting defects on manufactured patterns. However, examiner respectfully disagrees. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., actual execution of semiconductor fabrication experiments, physical variation of process parameters, and empirical observation of resulting defects on manufactured patterns) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In this case, the claims only generally refer to a “plurality of experimental results”, “at least one process parameter” and “defects”. It does not require any of the argued features. There is no limitation that describes semiconductor fabrication, manufacturing, etc. There are no limitations that amount to more than generally linking the use of the judicial exception to a particular technological environment or field of use (e.g. see MPEP 2106.05(h)). As such, applicant’s arguments are not persuasive. See also above rejections for details.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 3-4, 9, and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20180300434 A1) in view of Bankes et al. (US 6389380 B1).
As per independent claim 1, Hu teaches a method for establishing a weak pattern severity model, comprising:
obtaining a plurality of weak patterns (e.g. in paragraph 23, “Pattern Centric Process Control extends beyond drift and variance monitoring to include hotspot or weak pattern identification and tracking as well… hotspots and weak patterns”);
performing a plurality of experiments on each of the weak patterns with a plurality of parameter setting values of at least one process parameter to obtain a plurality of experimental results (e.g. in paragraphs 105-106, 130, 134, and 178-179, “the intended pattern is labeled as good, weak, or bad based on the degree of deviation between the intended pattern and the printed instances of the intended pattern… ranking decomposed circuit layout patterns … scoring or ranking intended circuit layout patterns using information from electrical test and failure analysis… patterns in the design layout at the translated coordinates or regions are assigned a value indicating that a defect (electrical or functional defect, in this case) occurred on or near that pattern… a large-scale assessment may be performed of the behavior of these OPC weak patterns in each of the different focus and exposure settings to identify, for example, the best process window for each of these patterns”);
obtaining a plurality of defects according to the experimental results corresponding to the parameter setting values (e.g. in paragraphs 24, 134, and 178 “Pattern Centric Process Control (PCPC) technique described herein may be broad-based, taking into account…Defect Detection and Measurement… patterns in the design layout at the translated coordinates or regions are assigned a value indicating that a defect (electrical or functional defect, in this case) occurred on or near that pattern… a large-scale assessment may be performed of the behavior of these OPC weak patterns in each of the different focus and exposure settings to identify, for example, the best process window for each of these patterns”);
analyzing a severity level of each of the weak patterns according to the defects and the parameter setting values (e.g. in paragraphs 105-106, 134, 178-179, and 188, “a constituent pattern may be assigned a fabrication risk assessment on a low risk, medium risk, or high risk scale… based on the degree of deviation between the intended pattern and the printed instances of the intended pattern… instead of, and/or using low, medium, high risk fabrication risk assessments, the intended pattern is assigned a numeric score on a suitable numeric range… patterns in the design layout at the translated coordinates or regions are assigned a value indicating that a defect (electrical or functional defect, in this case) occurred on or near that pattern… a large-scale assessment may be performed of the behavior of these OPC weak patterns in each of the different focus and exposure settings… when using the 0-100 scale, the likelihood of failure may be determined by dividing the detected number of defects by the total number of instances of the pattern in the layout”);
labeling the severity levels on the weak patterns (e.g.in paragraphs 105-106 and 207, “the intended pattern is labeled as good, weak, or bad based on the degree of deviation between the intended pattern and the printed instances of the intended pattern… instead of, and/or using low, medium, high risk fabrication risk assessments, the intended pattern is assigned a numeric score on a suitable numeric range… intended circuit layout patterns are ranked based on their discrete fabrication risk assessments… when using the 0-100 scale, the likelihood of failure may be determined by dividing the detected number of defects by the total number of instances of the pattern in the layout”); and
performing machine learning to train a weak pattern severity model (e.g. in paragraphs 23, 37, 45, 113, and 200-201, “weak pattern… the Analytical and Output Engine 164 also sends pattern ranking information from the Pattern Decomposition and Ranking Database 163 back to the predictive sources 170 in order for the models, algorithms, and other parameters in those sources to be fine-tuned [i.e. train] by taking advantage of continuously up-to-date information in the Pattern Decomposition and Ranking Database… risk assessment predicted through the use of a model built from empirical data for other intended circuit layout patterns is then assigned to the intended circuit layout pattern… the predicting is performed using machine learning”),
but does not specifically teach the parameter setting values covering a minimum set value to a maximum set value.
However, Bankes teaches parameter setting values covering a minimum set value to a maximum set value (e.g. in column 1 lines 43-46, column 2 lines 31-34, column 17 line 60 – column 18 line 2, column 16 lines 16-18, and column 27 lines 23-27, “perform several iterations of an experiment… in order to find the inputs which give the most desirable output… causes a series of experiments to be run wherein a random number is generated for each input (each random number being within the range of possible values for the particular variable… constraints include high (maximum) and low (minimum) values for numerical dimensions”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Hu to include the teachings of Bankes because one of ordinary skill in the art would have recognized the benefit of determining inputs that give a most desirable output.
As per claim 3, the rejection of claim 1 is incorporated and the combination further teaches wherein the weak patterns are obtained through a design rule checker (e.g. Hu, in paragraph 49, “features of interest thus identified are then subjected to a die-to-database (D2DB) defect detection 193 that checks for the presence of any of a number of defect types such as, but not limited to, full or partial line breaks, full or partial line bridges, line end pullbacks, extra or extraneous pattern, and missing pattern”).
As per claim 4, the rejection of claim 1 is incorporated and the combination further teaches wherein the weak patterns are obtained by a predictive classification model (e.g. Hu, in paragraphs 23 and 71-72, “weak pattern identification… various sources of information include predictive sources—such as statistical, computational, simulation, and machine learning [i.e. predictive model] methods… each source of information used to rank or determine fabrication risk assessments [i.e. classification] for the intended circuit layout patterns is associated with a corresponding reliability and a corresponding coverage”).
Claims 9 and 11-12 are device claims corresponding to method claims 1 and 3-4, and are rejected under the same reasons set forth and the combination further teaches units for performing the method (e.g. Hu, in paragraph 50, “one or more processors, as hardware such as programmable logic devices and/or Application Specific Integrated Circuits designed to perform certain functions or a combination thereof”).
Claims 2 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20180300434 A1) in view of Bankes et al. (US 6389380 B1) and further in view of Firth et al. (US 20030115005 A1).
As per claim 2, the rejection of claim 1 is incorporated and the combination further teaches wherein the severity levels are related to deviation degrees of the parameter setting values (e.g. Hu, in paragraphs 105-106, “the intended pattern is labeled as good, weak, or bad based on the degree of deviation between the intended pattern and the printed instances of the intended pattern”), but does not specifically teach inversely proportional. However, Frith teaches inversely proportional relationships of parameter setting values (e.g. in paragraph 26, “critical dimension is shown to be inversely proportional to exposure”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of Firth because one of ordinary skill in the art would have recognized the benefit of accounting for relevant relationships.
Claim 10 is the device claim corresponding to method claim 2, and is rejected under the same reasons set forth.
Claims 5 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20180300434 A1) in view of Bankes et al. (US 6389380 B1) and further in view of Gleason et al. (US 20030228051 A1).
As per claim 5, the rejection of claim 1 is incorporated and the combination further teaches wherein the defects are corresponded to some of the weak patterns (e.g. Hu, in paragraphs 23 and 188, “weak pattern… number of times a defect was observed, by a given predictive or empirical source, for the pattern”), but does not specifically teach through a quadtree algorithm. However, Gleason teaches defects through a quadtree algorithm (e.g. in paragraph 34, “defect… a quadtree partitioning scheme is used”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of Gleason because one of ordinary skill in the art would have recognized the benefit of facilitating defect boundary mapping.
Claim 13 is the device claim corresponding to method claim 5, and is rejected under the same reasons set forth.
Claims 6-7 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20180300434 A1) in view of Bankes et al. (US 6389380 B1) and further in view of He et al. (US 20160291458 A1).
As per claim 6, the rejection of claim 1 is incorporated and the combination further teaches wherein the at least one process parameter is a lithography exposure (e.g. Hu, in paragraphs 177 and 179, “lithography… exposure”), but does not specifically teach energy. However, He teaches energy (e.g. in paragraphs 37-38, “In the photolithography process, Dose (exposure energy) and Focus error are the two main conditions affecting the lithography process”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of He because one of ordinary skill in the art would have recognized the benefit of incorporating relevant parameters.
As per claim 7, the rejection of claim 1 is incorporated and the combination further teaches wherein the at least one process parameter is a lithography exposure (e.g. Hu, in paragraphs 177 and 179, “lithography… exposure”), but does not specifically teach focal length. However, He teaches focal length (e.g. in paragraphs 37-38, “In the photolithography process, Dose (exposure energy) and Focus error are the two main conditions affecting the lithography process… focal length”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of He because one of ordinary skill in the art would have recognized the benefit of incorporating relevant parameters.
Claims 14-15 are the device claims corresponding to method claims 6-7 and are rejected under the same reasons set forth.
Claims 8 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Hu et al. (US 20180300434 A1) in view of Bankes et al. (US 6389380 B1) and further in view of He et al. (US 20160291458 A1) and Firth et al. (US 20030115005 A1).
As per claim 8, the rejection of claim 1 is incorporated and the combination further teaches wherein the at least one process parameter is a lithography exposure and an exposure focus (e.g. Hu, in paragraphs 177 and 179, “lithography… focus and exposure”),
but does not specifically teach energy and focal length, the parameter setting values of the lithography exposure energy and the parameter setting values of the exposure focal length form a parameter variation matrix.
However, He teaches energy and focal length (e.g. in paragraphs 37-38, “In the photolithography process, Dose (exposure energy) and Focus error are the two main conditions affecting the lithography process… focal length”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of He because one of ordinary skill in the art would have recognized the benefit of incorporating relevant parameters,
but does not specifically teach the parameter setting values of the lithography exposure energy and the parameter setting values of the exposure focal length form a parameter variation matrix.
However, Firth teaches parameter setting values of exposure and parameter setting values of focus form a parameter variation matrix (e.g. in paragraphs 26 and 38, “other matrices” and variation matrix in Equation 8 including exposure and focus). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the combination to include the teachings of Firth because one of ordinary skill in the art would have recognized the benefit of facilitating performing relevant calculations.
Claim 16 is the device claim corresponding to method claim 8, and is rejected under the same reasons set forth.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
For example,
Park et al. (US 20170148689 A1) teaches “a defect test is performed on weak patterns and weak points of the object pattern formed on the wafer” (e.g. in paragraph 61).
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM WONG whose telephone number is (571)270-1399. The examiner can normally be reached Monday-Friday 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TAMARA KYLE can be reached at (571)272-4241. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/W.W/Examiner, Art Unit 2144 04/29/2026
/TAMARA T KYLE/Supervisory Patent Examiner, Art Unit 2144
Prosecution Insights