Prosecution Insights
Last updated: October 02, 2026
Application No. 18/127,736

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME

Final Rejection §103
Filed
Mar 29, 2023
Priority
May 16, 2022 — CN 202210528457.4
Examiner
LOHAKARE, PRATIKSHA JAYANT
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Manufacturing International Corporation
OA Round
4 (Final)
82%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
79 granted / 96 resolved
+14.3% vs TC avg
Strong +15% interview lift
Without
With
+15.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
38 currently pending
Career history
122
Total Applications
across all art units

Statute-Specific Performance

§103
65.2%
+25.2% vs TC avg
§102
16.5%
-23.5% vs TC avg
§112
13.7%
-26.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 96 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Application Acknowledgment has been made to the amendment received on 07/29/2026. Claims 1-5 and 7-20 are pending in this application. Claim 6 is cancelled. Claims 8-20 are withdrawn. Claims 1-5 and 7 are being examined in this office action. Claim Objections Claim 4 is objected because limitations “a material of the center channel film is the same as a material of the sidewall channel film”. is duplicated & previously claimed in claim 1, lines 12-14. Claim 5 is objected because limitations “the materials of the center channel film and the sidewall channel film comprise at least one of silicon, silicon carbide, gallium nitride, gallium arsenide, or indium gallium”. is duplicated & previously claimed in claim 1, lines 11-14. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Chuang et al (US20220157786A1) in view of Song et al (US20200286992A1). Re claim 1 Chuang teaches, a semiconductor structure (fig 1-3) comprising: a substrate (50, fig 3) [0012], comprising a P-type region (50P, fig3) [0018] configured for a PMOS transistor [0018] to be formed and an N-type region configured for an NMOS transistor [0018] to be formed; a plurality of protrusions (right 66, fig 3) [0012] in the P-type region (50p, fig 3) [0018] and a plurality of protrusions (left 66, fig 3) [0012] in the N-type region (50N, fig 3), protruding from the substrate (50, fig3); a first channel structure layer (right 52, fig 3) [0022], suspended on the plurality of protrusions (right 66) in the P-type region (50P) and comprising one or more first channel layers (52A-52C, fig 3) suspended at intervals, wherein each of the first channel layers is configured to improve carrier mobility in a channel of the PMOS transistor [0018]; and a second channel structure layer (left 54, fig 3) [0022] suspended on the plurality of protrusions (left 66) in the N-type region (50N) and comprising one or more second channel layers (left 52) suspended at intervals and each of the second channel layers is configured to improve carrier mobility in a channel of the NMOS transistor [0018]. Chuang does not teach each of the second channel layers comprises a center channel film and a sidewall channel film arranged on a sidewall of the center channel film, a material of the center channel film central portion of the same as a material of the sidewall channel film configured as a support during formation of the center channel film, the materials of the center channel film and the sidewall channel film comprise at least one of the silicon carbide allium nitride, gallium arsenide, or indium gallium and the sidewall channel film configured as a support during formation of the center channel film. Song teaches each of the second channel layers 108-1,108-2, 108-3, fig 4A) [0022] comprises a center channel film (central portion of 108-1,108-2, 108-3, fig 4A) [0022] and a sidewall (left/right side of 108-3/2/1) channel film (401, fig 4A) [0034] arranged on a sidewall (fig 4A) of the center channel film (central portion of 108-1,108-2, 108-3, fig 4A), a material (SiC, fig 4A) [0023] of the center channel film (central portion of 108-1,108-2, 108-3, fig 4A) is the same as a material of the sidewall channel film [0034], the materials of the center channel film (central portion of 108-1,108-2, 108-3, fig 4A) and the sidewall channel film (left/right side of 108-3/2/1) comprise at least one of the silicon carbide [0034], gallium nitride, gallium arsenide, or indium gallium [0034] and the sidewall channel film (401, fig 4A) [0034] configured as a support during formation of the center channel film. It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by Chuang into the structure of Song to include each of the second channel layers comprises a center channel film and a sidewall channel film arranged on a sidewall of the center channel film, a material of the center channel film central portion of the same as a material of the sidewall channel film configured as a support during formation of the center channel film, the materials of the center channel film and the sidewall channel film comprise at least one of the silicon carbide allium nitride, gallium arsenide, or indium gallium and the sidewall channel film configured as a support during formation of the center channel film as claimed. The ordinary artisan would have been motivated to modify Chuang based on the teaching of Song in the above manner for the purpose of reducing the parasitic capacitance [0020]. Furthermore, the limitation "during formation of the center channel film" directed to a product-by-process claim". "[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by different process". In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Furthermore, "[b]ecause validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different process" Amgen nc.v.F.Hoffman-La Roche Ltd., 580 F.3d 1340, 1370 n 14, 92 USPQ2d 1289, 1312, n 14 (Fed. Cir. 2009). (MPEP 2113). Thus, if prior art discloses each of the second channel layers comprises a center channel film and a sidewall channel film arranged on a sidewall of the center channel film, it meets the claim; and The limitations "configured to improve carrier mobility in a channel" and "configured as a support during formation of the center channel film" have not been patentable weight because it is considered to be intended use and/or functional language. This type of description does not affect the structure of the final device. It is respectfully noted that intended uses and/or other types of functional language must result in a structure difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use must result in a manipulative difference as compared to the prior art./n re Casey, 152 USPQ 235 (CCPA 1967); I re Otto, 136 USPQ 458, 459 (CCPA 1963). Note that Applicant has burden of proof in such cases. As the above case law makes clear. Furthermore, it has been held that where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes , a prima facie case of either anticipation or obviousness has been established ./n re Best, 562 F.2d 1252, 1255, 195USPQ 430, 433 (CCPA 1977). Re claim 2 Chuang in view of Song teaches the semiconductor structure according to claim 1, further comprising: a first gate structure (right 102/100, shown in fig 1) [Chuang, 0013], spanning the first channel structure layer (right 52, fig 1/3) [Chuang, 0022] and filling a gap (gap between 52, fig 1) between adjacent first channel layers (right 52) and a gap between the plurality of protrusions (right 66) in the P-type region (50p) and the first channel layer (right 52), so that the first gate structure (right 102/100) surrounds the first channel layer (right 52); a first source/drain doped region (right 92, fig 1), arranged on two sides of the first gate structure (side of right 102/100, fig 1) and in contact with ends of the first channel layers (in contact with right 52, fig1); a second gate structure (left 102/100, fig 1) [Chuang, 0013], spanning the second channel structure layer (left52, fig 1/3) and filling a gap between second channel layers (gap between left 52) and a gap between the plurality of protrusions (left 66, fig 3) in the N- type region (50N) and the second channel layer (left52, fig 1/3) so that the second gate structure surrounds the second channel layer [Chuang left 52; and a second source/drain doped region (left 92, fig 1) [Chuang 0013], arranged on two sides of the second gate structure (left 102/100, fig 1) and in contact with ends of the second channel layers (left 52, fig 1/3) [Chuang, 0022]. Re claim 4 Chuang and Song teach the semiconductor structure according to claim 1, wherein a material of the center channel film (central portion of 108-1,108-2, 108-3, fig 4A) [Song , 0022-0023] is the same as a material (SiC, GaAs, GaN) [Song 0023] of the sidewall channel film (left right 401, fig 4A) [Song, 0034]. Re claim 5 Chuang in view of Song teach the semiconductor structure according to claim 1, wherein the materials of the center channel film (central portion of 108-1,108-2, 108-3, fig 4A) [0022) [Song , 0022-0023] and the sidewall channel film (left right 401, fig 4A) [Song, 0034] comprise at least one of silicon, silicon carbide, gallium nitride, gallium arsenide, or indium gallium.(Sic, GaAs, GaN) [Song 0023]. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Chuang as modified by Song as applied to claim 1 and above, further in view of Wang et al (US202100986005A1). Re claim 3 Chuang in view of Song teach the semiconductor structure according to claim 1, Chuang and Song do not teach a thickness of the sidewall channel film ranges from 1 nm to 10 nm in a direction parallel to the substrate. Wang teaches, a thickness of the sidewall channel film (240, fig 7A) [Wang 0030] ranges from 1 nm to 10 nm (about 1 nm and about 3 nm) in a direction parallel (bottom 240 is parallel to202, fig 7A) to the substrate (202, fig 7A) [Wang, 0039]. It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by Wang into the structure of Chuang and Song to include a thickness of the sidewall channel film ranges from 1 nm to 10 nm in a direction parallel to the substrate as claimed. Furthermore, it has been held in that where then general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chuang modified by Song as applied to claims 1 and 6 further in view of Dolny et al (US 20060118863A1). Re claim 7 Chuang in view of Song teach the semiconductor structure according to claim 6. Chuang and Song do not teach a mole percent of germanium in the first channel layer ranges from 5% to 25%. Dolny teaches a mole percent of germanium in the first channel layer (SiGe, 1934, fig 19B) ranges from 5% to 25% (10% to 80%) [0078]. It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by Dolny into the structure of Chuang and Song to include a mole percent of germanium in the first channel layer ranges from 5% to 25% as claimed. The ordinary artisan would have been motivated to modify Chuang and Song based on the teaching of Dolny in the above manner for the purpose of improve device characteristics [0009]. Furthermore, it has been held in that where then general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233, and it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. 1990). Response to Arguments Applicant’s arguments with respect to claim(s) 1-5 and 7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chang et al (US8796742B1) teaches an alternating stack of two different semiconductor materials is pattered to include two pad regions and nanowire regions. Basker et al (US20190189769A1) teaches a nanosheet transistor device having reduced access resistance is fabricated by recessing channel material with epitaxially grown doped extension regions. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRATIKSHA J LOHAKARE whose telephone number is (571)270-1920. The examiner can normally be reached Monday - Friday 7.30 am-4.30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at 571-270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PRATIKSHA JAYANT LOHAKARE/ Examiner, Art Unit 2818 /DUY T NGUYEN/Primary Examiner, Art Unit 2818 8/11/26
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Prosecution Timeline

Show 1 earlier event
Sep 23, 2025
Non-Final Rejection mailed — §103
Dec 09, 2025
Response Filed
Dec 22, 2025
Final Rejection mailed — §103
Mar 20, 2026
Request for Continued Examination
Mar 25, 2026
Response after Non-Final Action
Apr 03, 2026
Non-Final Rejection mailed — §103
Jul 29, 2026
Response Filed
Aug 11, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
82%
Grant Probability
98%
With Interview (+15.3%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 96 resolved cases by this examiner. Grant probability derived from career allowance rate.

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