DETAILED ACTION
This application, 18/128490, attorney docket T102692US01, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned to Texas Instruments, and claims foreign priority to Indian application 202241071854, filed 12/13/2022. Applicant's election with traverse of Group I, claims 1-12 in the reply filed on 7/30/2025 is acknowledged.
Applicant argues that the restriction is improper because the method claim 13 requires the device to be built on one substrate, and the device requires all the layers to be on a single substrate. That argument is not persuasive. MPEP § 806.05(f)2 defines method and device invention to be distinct inventions if the device can be made by a materially different method that that claimed. Here, examiner identified a different method of forming the device of claim 1 using a transfer substrate to form a device in two parts and combine the parts onto a single substrate. Therefore, the restriction is proper and made final. Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Claim 1 recites, “a first capacitor electrode in the first metal level and including a plurality of first lines; a second capacitor electrode in the first metal level and including a plurality of second lines” it is not clear whether the lines are part of the electrode or the metal level.
Claim 1 recites, “each of the third lines located over a first one of the first lines and a first one of the second lines” which can be interpreted to mean that all of the third lines are over a single, common first and second line; or each third line is over a separate set of first and second lines.
Claim 2 recites “about twice a second thickness” The term “about” is a relative term which renders the claim indefinite. The term is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claims 7 and recites, ”the first metal level is a MET2 level, and the second metal level is a MET3 level” BUT does not define the meets and bounds of MET2 or MET1.
Dependent claims include the defect of the parent.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, 6, 7 and 9 are rejected under 35 U.S.C. 102a1/a2 as being anticipated by Sira et al. (U.S. 2020/0043874).
As for claim 1,
Sira teaches in figure 4, an integrated circuit, comprising:
First (400) and second metal levels (300) over a semiconductor substrate (10 shown in figure 214);
a first capacitor electrode (111) in the first metal level and including a plurality of first lines (112);
a second capacitor electrode (121) in the first metal level and including a plurality of second lines (122) alternating with the plurality of first metal lines;
a third capacitor electrode (111) in the second metal level and including a plurality of third lines (112), each of the third lines located over a first one of the first lines and a first one of the second lines;
and a fourth capacitor electrode (121) in the second metal level and including a plurality of fourth parallel lines (122) alternating with the plurality of third metal lines, each of the fourth lines located over a second one of the first lines and a second one of the second lines. (all the second level lines are over all of the first level lines).
As for claim 3,
Sira teaches the integrated circuit of Claim 1, and teaches that the first lines, second lines, third lines and fourth lines are substantially aluminum. ([0087]).
As for claim 6,
Sira teaches the integrated circuit of Claim 1, and teaches that the first electrode and the third electrode are connected to a first capacitor terminal and the second electrode and the fourth electrode are connected to second capacitor terminal. (Shown in figure 1 connected through vias 74 and 70)
As for claim 7,
Sira teaches the integrated circuit of Claim 1, and teaches that the first, second, third and fourth capacitor electrodes are components of a capacitor connected in a radio- frequency circuit. ([0039]).
As for claim 9,
Sira teaches the integrated circuit of Claim 1, and teaches that the first metal level is a MET2 level, and the second metal level is a MET3 level. (naming conventions do not limit the device).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 4, 5, 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Sira.
As for claim 2,
Sira teaches the integrated circuit of Claim 1, and makes obvious that the third lines and the fourth lines have a first thickness about twice a second thickness of the first lines and the second lines. Sira [0061]
It would have been obvious to one skilled in the art at the effective filing date of this application to adjust the thickness of the fingers between levels to adjust the capacitance of the device. Here electrode thickness is a result dependent variable, which controls capacitance and parasitic capacitance. Sira [0061]. Because the general conditions are disclosed in the prior art is it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955). One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 4,
Sira teaches the integrated circuit of Claim 1, makes obvious that the first metal lines have a first width and the second metal lines have a second width, the first and second metal lines are spaced apart by a first space, and the third metal lines have a width about equal to the sum of the first and second widths and the first space. Sira [0061].
It would have been obvious to one skilled in the art at the effective filing date of this application to adjust the line widths and spacing of the fingers between levels to adjust the capacitance of the device. Here electrode linewidth is a result dependent variable, which controls capacitance and parasitic capacitance. Sira [0061]. Because the general conditions are disclosed in the prior art is it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955). One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 5,
Sira teaches the integrated circuit of Claim 4, and makes obvious that the fourth metal lines have a width about equal to the sum of the first and second widths and the first space. Sira [0061].
It would have been obvious to one skilled in the art at the effective filing date of this application to adjust the line widths of the fingers between levels to adjust the capacitance of the device. Here electrode linewidth is a result dependent variable, which controls capacitance and parasitic capacitance. Sira [0061]. Because the general conditions are disclosed in the prior art is it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955). One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 11,
Suri teaches the integrated circuit of Claim 1, and makes obvious the first and second electrodes are spaced apart by about 250 nm and the third and fourth electrodes are spaced apart by about 250 nm. Sira [0061].
It would have been obvious to one skilled in the art at the effective filing date of this application to adjust the line widths and spacing of the fingers between levels to adjust the capacitance of the device. Here electrode linewidth is a result dependent variable, which controls capacitance and parasitic capacitance. Sira [0061]. Because the general conditions are disclosed in the prior art is it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955). One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 12,
Siri teaches the integrated circuit of Claim 1, and makes obvious the first, second, third and fourth capacitor electrodes are components of a capacitor having a unit capacitance of about 0.45 fF/pm2 and a parasitic capacitance of about 0.029 fF/pm2. [0061].
Capacitance is a result dependent variable that is dependent on the dimension, materials and spacing of the capacitor electrodes, and one skilled would adjust the dimensions to achieve a desired capacitance.
It would have been obvious to one skilled in the art at the effective filing date of this application adjust the dimensions by ordinary experimentation to achieve the resultant capacitance for the device requirements. One skilled in the art would have combined these elements with a reasonable expectation of success.
Claims 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Sira in view of Tu et al. (U.S. 2023/0187479).
As for claim 8,
Sira teaches the integrated circuit of Claim 1, but does not teach a transistor extending into the semiconductor substrate, a terminal of the transistor connected to one of the first, second, third or fourth capacitor electrodes.
However, Tu teaches in figure 5 connecting a multilevel capacitor to a transistor 102.
It would have been obvious to one skilled in the art at the effective filing date of this application to form a transistor on and into the substrate can connect it to a capacitor to increase production efficiency of the integrated device. Tu [0002]. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 10,
Sira teaches the integrated circuit of Claim 1, and makes obvious the first and second electrodes have a thickness of about 0.5 pm and the third and fourth electrodes have a thickness of about 1.0 pm, Sira [0061]
It would have been obvious to one skilled in the art at the effective filing date of this application to adjust the thickness of the fingers between levels to adjust the capacitance of the device. Here electrode thickness is a result dependent variable, which controls capacitance and parasitic capacitance. Sira [0061]. Because the general conditions are disclosed in the prior art is it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955). One skilled in the art would have combined these elements with a reasonable expectation of success.
Sira does not teach transistor extending into the semiconductor substrate, a terminal of the transistor connected to one of the first, second, third or fourth capacitor electrodes.
However, Tu teaches in figure 5 connecting a multilevel capacitor to a transistor 102.
It would have been obvious to one skilled in the art at the effective filing date of this application to form a transistor on and into the substrate can connect it to a capacitor to increase production efficiency of the integrated device. Tu,[0002]. One skilled in the art would have combined these elements with a reasonable expectation of success.
Conclusion
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/JOHN A BODNAR/ Primary Examiner, Art Unit 2893