Prosecution Insights
Last updated: April 19, 2026
Application No. 18/128,496

AUTOMATION METHOD FOR DEFECT CHARACTERIZATION FOR HYBRID BONDING APPLICATION

Non-Final OA §103
Filed
Mar 30, 2023
Examiner
SCHNEE, HAL W
Art Unit
2129
Tech Center
2100 — Computer Architecture & Software
Assignee
Applied Materials, Inc.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 11m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
503 granted / 595 resolved
+29.5% vs TC avg
Strong +22% interview lift
Without
With
+22.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
16 currently pending
Career history
611
Total Applications
across all art units

Statute-Specific Performance

§101
9.7%
-30.3% vs TC avg
§103
40.8%
+0.8% vs TC avg
§102
17.3%
-22.7% vs TC avg
§112
26.3%
-13.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 595 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Rundo et al. (U.S. 2024/0202908, hereinafter “Rundo”) in view of Shin, Wooksoo, Hyungu Kahng, and Seoung Bum Kim (“Mixup-based classification of mixed-type defect patterns in wafer bin maps,” Computers & Industrial Engineering 167 (2022): 107996; hereinafter “Shin,” cited by the applicant in an Information Disclosure Statement). Regarding Claim 1, Rundo teaches a method for training a machine learning model for the automatic detection and classification of defects on wafers (¶ [0003]), comprising: receiving labeled images of wafer defects having multiple defect classifications (¶ [0068] and [0073] – [0074]—the supervised classification circuitry is trained using labeled train data); creating a first training set comprising the received labeled images of wafer defects having the multiple defect classifications (¶ [0074]—the labeled train data is the first training set comprising the received labeled images. The multiple classes of defects are described in fig. 2 and ¶ [0064]); training the machine learning model to automatically detect and classify wafer defects in a first stage using the first training set (fig. 12; ¶ [0124]); and training the machine learning model to automatically detect and classify wafer defects in a second stage using a second training set (¶ [0144]—the machine learning model is re-trained in a second stage using additional wafer defect pattern classes {a second training set}). Rundo does not specifically teach: blending at least one set of at least two labeled images having different classifications to generate additional labeled image data; creating a second training set comprising the generated blended, additional labeled image data. However, Shin teaches: blending at least one set of at least two labeled images having different classifications to generate additional labeled image data (section 3—the mixup methods blend labeled wafer images to generate additional labeled image data); creating a second training set comprising the generated blended, additional labeled image data (section 3—the blended images are used to create a second training set for model training). All of the claimed elements were known in Rundo and Shin and could have been combined by known methods with no change in their respective functions. It therefore would have been obvious to a person of ordinary skill in the art at the time of filing of the applicant’s invention to combine the blending to create a second data set of Shin with the re-training using additional images of Rundo to yield the predictable result of blending at least one set of at least two labeled images having different classifications to generate additional labeled image data; creating a second training set comprising the generated blended, additional labeled image data; and training the machine learning model to automatically detect and classify wafer defects in a second stage using the second training set. One would be motivated to make this combination for the purpose of improving the detection of mixed-type defects when only single-defect data is available (Shin, section 1, last paragraph). Regarding Claim 6, Rundo teaches a method for the automatic detection and classification of defects on wafers using a trained machine learning model (¶ [0003]), comprising: receiving at least one unlabeled image of a surface of a wafer (fig. 17; ¶ [0148]—the wafer defect maps are unlabeled images); applying the trained machine learning (ML) model to the at least one unlabeled wafer image (fig. 17; ¶ [0149]), the machine learning model having been trained to detect and classify defects on wafers using a first set of labeled images of wafer defects (fig. 12; ¶ [0124]—the machine learning model is trained to classify defects using the set of train data images); and determining at least one defect classification for the at least one unlabeled wafer image using the trained machine learning model (¶ [0073] and [0149]). Rundo teaches re-training the machine learning model using a second set of additional wafer defect images (¶ [0144]—the machine learning model is re-trained in a second stage using additional wafer defect pattern classes {a second training set}), but does not specifically teach a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended. However, Shin teaches training a machine learning model using a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended (section 3—the mixup methods blend labeled wafer images to generate additional labeled image data, and training the machine learning model using the blended images). All of the claimed elements were known in Rundo and Shin and could have been combined by known methods with no change in their respective functions. It therefore would have been obvious to a person of ordinary skill in the art at the time of filing of the applicant’s invention to combine the blending to create a second data set of Shin with the re-training using additional images of Rundo to yield the predictable result of applying the trained machine learning (ML) model to the at least one unlabeled wafer image, the machine learning model having been trained to detect and classify defects on wafers using a first set of labeled images of wafer defects and a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended. One would be motivated to make this combination for the purpose of improving the detection of mixed-type defects when only single-defect data is available (Shin, section 1, last paragraph). Regarding Claim 11, Rundo teaches an apparatus for training a machine learning model for the automatic detection and classification of defects on wafers (fig. 3; ¶ [0003]), comprising: a processor (¶ [0003] and [0120]); and a memory having stored therein at least one program, the at least one program including instructions which, when executed by the processor, cause the apparatus to perform a method (¶ [0119] – [0120]). Rundo and Shin teach the method comprising the steps of the present claim in the same manner as for claim 1. Regarding Claim 16, Rundo teaches an apparatus for the automatic detection and classification of defects on wafers using a trained machine learning model (fig. 3; ¶ [0003]), comprising: a processor (¶ [0003] and [0120]); and a memory having stored therein at least one program, the at least one program including instructions which, when executed by the processor, cause the apparatus to perform a method (¶ [0119] – [0120]). Rundo and Shin teach the method comprising the steps of the present claim in the same manner as for claim 6. Regarding Claims 2, 7, 12, and 17, Rundo/Shin teaches wherein the multiple defect classifications comprise at least two of a particle defect, a fiber defect, a stain defect, or no defect (Rundo, fig. 2; ¶ [0064]. Also Shin, fig. 2 and section 3—defects include no defect, particle defects such as Center and Loc, and many others). Regarding Claims 3, 9, 13, and 19, Rundo/Shin teaches wherein the ML model comprises at least one of a vision transformer model, a convolutional neural network model, or a recurrent neural network model (Rundo, ¶ [0066]). Regarding Claims 4, 10, 14, and 20, Rundo/Shin teaches blending the at least one set of the at least two labeled images having different classifications using at least one weighted component (Shin, section 3—images and labels are blended using weights λ). Regarding Claims 5 and 15, Rundo/Shin teaches wherein the at least one set of the at least two labeled images having different classifications are blended using a mix-up augmentation process (Shin, section 3—the Summation Mixup process is an augmented version of the Original Mixup process, i.e. a mix-up augmentation process). Regarding Claims 8 and 18, Rundo/Shin teaches determining if the wafer contains a critical defect from the at least one determined defect classification (Shin, section 1—wafers with defects are considered dies that fail, indicating that the defects are critical). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Bidault (U.S. 2021/0150688) teaches training a neural network to detect wafer defects using an artificial image dataset, and training the neural network further using a modified dataset. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAL W SCHNEE whose telephone number is (571) 270-1918. The examiner can normally be reached M-F 7:30 a.m. - 6:00 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Huntley can be reached at 303-297-4307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAL SCHNEE/Primary Examiner, Art Unit 2129
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Prosecution Timeline

Mar 30, 2023
Application Filed
Jan 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+22.1%)
2y 11m
Median Time to Grant
Low
PTA Risk
Based on 595 resolved cases by this examiner. Grant probability derived from career allow rate.

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