Prosecution Insights
Last updated: July 05, 2026
Application No. 18/128,496

AUTOMATION METHOD FOR DEFECT CHARACTERIZATION FOR HYBRID BONDING APPLICATION

Final Rejection §103
Filed
Mar 30, 2023
Examiner
SCHNEE, HAL W
Art Unit
2129
Tech Center
2100 — Computer Architecture & Software
Assignee
Applied Materials Inc.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
511 granted / 604 resolved
+29.6% vs TC avg
Strong +22% interview lift
Without
With
+22.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
17 currently pending
Career history
616
Total Applications
across all art units

Statute-Specific Performance

§101
5.8%
-34.2% vs TC avg
§103
59.1%
+19.1% vs TC avg
§102
4.1%
-35.9% vs TC avg
§112
27.8%
-12.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 604 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending in this application. Claims 1, 6, 11, and 16 are amended by applicant’s amendment filed 27 April 2026. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Rundo et al. (U.S. 2024/0202908, hereinafter “Rundo”) in view of Shin, Wooksoo, Hyungu Kahng, and Seoung Bum Kim (“Mixup-based classification of mixed-type defect patterns in wafer bin maps,” Computers & Industrial Engineering 167 (2022): 107996; hereinafter “Shin,” cited by the applicant in an Information Disclosure Statement). Regarding Claim 1, Rundo teaches a method for training a machine learning model for the automatic detection and classification of defects on wafers (¶ [0003]), comprising: receiving a plurality of labeled images of individual wafer defects having multiple, respective defect classifications (¶ [0068] and [0073] – [0074]—the supervised classification circuitry is trained using labeled train data, which includes wafer defect map images along with corresponding {i.e. respective} labels. ¶ [0064] describes defect classes of the map images, as shown in fig. 2. The defects include big cluster 202, scratch 209, and many other individual, respective wafer defects); creating a first training set comprising the received, plurality of the labeled images of the individual wafer defects having the multiple defect classifications (¶ [0074]—the labeled train data is the first training set comprising the received labeled images, which include wafer defect map images along with corresponding {i.e. respective} labels. The multiple classes of defects are described in fig. 2 and ¶ [0064]—each image, such as big cluster 202, scratch 209, are labeled images of individual wafer defects); training the machine learning model to automatically detect and classify wafer defects in a first stage using the first training set (fig. 12; ¶ [0124]—the training phase may comprise the supervised classification system training using the labeled wafer defect map images cited above); and training the machine learning model to automatically detect and classify wafer defects in a second stage using a second training set (¶ [0144]—the machine learning model is re-trained in a second stage using additional wafer defect pattern classes {i.e. a second training set}). Rundo does not specifically teach: blending at least one set of at least two labeled images having different classifications to generate additional labeled image data; creating a second training set comprising the generated blended, additional labeled image data. However, Shin teaches: blending at least one set of at least two labeled images having different classifications to generate additional labeled image data (section 3—the mixup methods blend labeled wafer images to generate additional labeled image data. Section 4.3, under the “Classification accuracy of mixed-type defect patterns” heading, describes generating target labels for the additional image data using the Summation Mixup method); creating a second training set comprising the generated blended, additional labeled image data (section 3—the blended images are used to create a second training set for model training). All of the claimed elements were known in Rundo and Shin and could have been combined by known methods with no change in their respective functions. It therefore would have been obvious to a person of ordinary skill in the art at the time of filing of the applicant’s invention to combine the blending to create a second data set of Shin with the re-training using additional images of Rundo to yield the predictable result of blending at least one set of at least two labeled images having different classifications to generate additional labeled image data; creating a second training set comprising the generated blended, additional labeled image data; and training the machine learning model to automatically detect and classify wafer defects in a second stage using the second training set. One would be motivated to make this combination for the purpose of improving the detection of mixed-type defects when only single-defect data is available (Shin, section 1, last paragraph). Regarding Claim 6, Rundo teaches a method for the automatic detection and classification of defects on wafers using a trained machine learning model (¶ [0003]), comprising: receiving at least one unlabeled image of a surface of a wafer (fig. 17; ¶ [0148]—the wafer defect maps are unlabeled images); applying the trained machine learning (ML) model to the at least one unlabeled wafer image (fig. 17; ¶ [0149]), the machine learning model having been trained to detect and classify individual defects on wafers using a first set of labeled images of individual wafer defects (fig. 12; ¶ [0124]—the machine learning model is trained to classify defects using the set of train data images. ¶ [0064] describes defect classes of the map images, as shown in fig. 2. The defects include big cluster 202, scratch 209, and many other individual wafer defects); and determining a respective defect classification for the at least one unlabeled wafer image using the trained machine learning model (¶ [0073] and [0149]—during a use phase, one defect classification from among the possible classifications is determined for the at least one unlabeled wafer image). Rundo teaches re-training the machine learning model using a second set of additional wafer defect images (¶ [0144]—the machine learning model is re-trained in a second stage using additional wafer defect pattern classes {a second training set}), but does not specifically teach a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended. However, Shin teaches training a machine learning model using a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended (section 3—the mixup methods blend labeled wafer images to generate additional labeled image data, and training the machine learning model using the blended images. Section 4.3, under the “Classification accuracy of mixed-type defect patterns” heading, describes generating target labels for the additional image data using the Summation Mixup method). All of the claimed elements were known in Rundo and Shin and could have been combined by known methods with no change in their respective functions. It therefore would have been obvious to a person of ordinary skill in the art at the time of filing of the applicant’s invention to combine the blending to create a second data set of Shin with the re-training using additional images of Rundo to yield the predictable result of applying the trained machine learning (ML) model to the at least one unlabeled wafer image, the machine learning model having been trained to detect and classify individual defects on wafers using a first set of labeled images of individual wafer defects and a second set of additional wafer defect images generated from at least two labeled images having different classifications being blended. One would be motivated to make this combination for the purpose of improving the detection of mixed-type defects when only single-defect data is available (Shin, section 1, last paragraph). Regarding Claim 11, Rundo teaches an apparatus for training a machine learning model for the automatic detection and classification of defects on wafers (fig. 3; ¶ [0003]), comprising: a processor (¶ [0003] and [0120]); and a memory having stored therein at least one program, the at least one program including instructions which, when executed by the processor, cause the apparatus to perform a method (¶ [0119] – [0120]). Rundo and Shin teach the method comprising the steps of the present claim in the same manner as for claim 1. Regarding Claim 16, Rundo teaches an apparatus for the automatic detection and classification of defects on wafers using a trained machine learning model (fig. 3; ¶ [0003]), comprising: a processor (¶ [0003] and [0120]); and a memory having stored therein at least one program, the at least one program including instructions which, when executed by the processor, cause the apparatus to perform a method (¶ [0119] – [0120]). Rundo and Shin teach the method comprising the steps of the present claim in the same manner as for claim 6. Regarding Claims 2, 7, 12, and 17, Rundo/Shin teaches wherein the multiple defect classifications comprise at least two of a particle defect, a fiber defect, a stain defect, or no defect (Rundo, fig. 2; ¶ [0064]. Also Shin, fig. 2 and section 3—defects include no defect, particle defects such as Center and Loc, and many others). Regarding Claims 3, 9, 13, and 19, Rundo/Shin teaches wherein the ML model comprises at least one of a vision transformer model, a convolutional neural network model, or a recurrent neural network model (Rundo, ¶ [0066]). Regarding Claims 4, 10, 14, and 20, Rundo/Shin teaches blending the at least one set of the at least two labeled images having different classifications using at least one weighted component (Shin, section 3—images and labels are blended using weights λ). Regarding Claims 5 and 15, Rundo/Shin teaches wherein the at least one set of the at least two labeled images having different classifications are blended using a mix-up augmentation process (Shin, section 3—the Summation Mixup process is an augmented version of the Original Mixup process, i.e. a mix-up augmentation process). Regarding Claims 8 and 18, Rundo/Shin teaches determining if the wafer contains a critical defect from the at least one determined defect classification (Shin, section 1—wafers with defects are considered dies that fail, indicating that the defects are critical). Response to Arguments Applicant’s arguments filed 27 April 2026 have been fully considered but they are not persuasive. The applicant asserts that Rundo in view of Shin does not teach all of the amended limitations of claims 1, 6, 11, and 16, because neither Rundo nor Shin teaches “receiving a plurality of labeled images of individual wafer defects having multiple, respective defect classifications.” The examiner has expanded the rejections above in view of the amendments to more clearly describe how Rundo teaches the “individual” and “respective” portions of the claim limitations. Some of the disagreement over the teachings of Rundo appears to be based on differences in terminology. Rundo uses the term “wafer defect map images” to describe the images employed by its machine learning systems and methods. The applicant argues that these do not teach the “labeled images” of the present claims. However, Rundo describes the wafer defect map images as images of actual wafers that come off a manufacturing line. ¶ [0130] – [0131] states that wafer defect maps are generated by a wafer manufacturing quality control system or process. These maps are processed into images that may have a spatial resolution of 20,000 x 20,000 pixels. ¶ [0058] also states that the systems and methods of Rundo can be used to classify any type of input images. The wafer defect map images of Rundo are therefore functionally equivalent to the clamed images. As the examiner has described above, these images are labeled with the respective individual defects contained on each wafer image, thus teaching the limitations of the claims. The examiner also notes that Shin clearly describes receiving labeled images of individual wafer defects. The last paragraph of section 2 describes the original “Mixup” technique, which operates on original input images of wafer defects to generate additional labeled training data. The techniques were applied to popular image datasets including CIFAR-10, CIFAR-100, and ImageNet, suggesting that techniques for classifying wafer defect maps and generating additional labeled training data from wafer maps can be generalized to images other than wafer maps. The examiner also notes additional art, cited but not relied upon as a grounds of rejection, that teaches similar subject matter: Cheon, Sejune, et al. (“Convolutional neural network for wafer surface defect classification and the detection of unknown defect class,” IEEE Transactions on Semiconductor Manufacturing 32.2 (2019): 163-170) teaches a machine learning system and method that classifies wafer defects from scanning electron microscope images. Chien, Jong-Chih, Ming-Tao Wu, and Jiann-Der Lee (“Inspection and classification of semiconductor wafer surface defects using CNN deep learning networks,” Applied Sciences 10.15 (2020): 5340) teaches using a neural network to classify wafer defects from images of wafers, training the neural network with labeled wafer images. Phua, Charissa, and Lau Bee Theng (“Semiconductor wafer surface: Automatic defect classification with deep CNN,” 2020 IEEE region 10 conference (TENCON). IEEE, 2020) teaches using a neural network to classify wafer defects from scanning electron microscope images. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAL W SCHNEE whose telephone number is (571) 270-1918. The examiner can normally be reached M-F 7:30 a.m. - 6:00 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Huntley can be reached at 303-297-4307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAL SCHNEE/Primary Examiner, Art Unit 2129
Read full office action

Prosecution Timeline

Mar 30, 2023
Application Filed
Jan 27, 2026
Non-Final Rejection mailed — §103
Apr 27, 2026
Response Filed
May 12, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+22.1%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 604 resolved cases by this examiner. Grant probability derived from career allowance rate.

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