Prosecution Insights
Last updated: April 19, 2026
Application No. 18/128,506

SEMICONDUCTOR DEVICE COMPRISING CONTACT PAD STRUCTURE

Non-Final OA §102§103
Filed
Mar 30, 2023
Examiner
NGUYEN, THANH T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
97%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
1162 granted / 1397 resolved
+15.2% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
39 currently pending
Career history
1436
Total Applications
across all art units

Statute-Specific Performance

§101
3.2%
-36.8% vs TC avg
§103
51.7%
+11.7% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
5.8%
-34.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1397 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restrictions Applicant's election with traverse of Group I, claims 1-16 drawn to a device claim is acknowledged. The traversal is on the ground(s) that the subject matter of all claims 1-20 is sufficiently related that a thorough search for the subject matter of any one group of the claims would encompass a search for the subject matter of the remaining claims. This is not found persuasive because claims 17-20 would require further search and for the reason of the last Office Action. The requirement is still deemed proper and is therefore made FINAL. Information Disclosure Statement The information disclosure statements filed 1/31/24; 3/30/23 have been considered. Oath/Declaration Oath/Declaration filed on 4/6/23 has been considered. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 4-7, 13-15 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by YU et al. (U.S. Patent Publication No. 2013/0087908). Referring to figures 1-14, YU et al. teaches a semiconductor device, comprising: a contact pad structure (104) over a first surface of a semiconductor body (100); and a dielectric structure lining (30/32): a sidewall of the contact pad structure (see figure 2); and a boundary area on a top surface of the contact pad structure (portion on top of 104), wherein the dielectric structure comprises a dielectric spacer (32) at the sidewall of the contact pad structure (see figure 2). Regarding to claim 2, an interconnect (110/112) on the top surface of the contact pad structure (104, see figure 2). Regarding to claim 4, the contact pad structure (104/28) comprises at least one of a source contact pad structure, an emitter contact pad structure, or a gate contact pad structure (see figures 1-14, paragraphs# 14, 28). Regarding to claim 5, the dielectric spacer (32) is arranged between a first liner dielectric (30I) of the dielectric structure and a second liner dielectric (30II) of the dielectric structure (see figures 2, 11-12). Regarding to claim 6, the first liner dielectric (30I) directly adjoins the sidewall of the contact pad structure (104), and the second liner dielectric (30II) directly adjoins the dielectric spacer (32, see figures 2, 11-12). Regarding to claim 7, the first liner dielectric comprises a SiN liner (30I), and the second liner dielectric comprises a SiN liner and a silicate glass (30II), wherein the silicate glass is arranged between the first liner dielectric and the SiN liner of the second liner dielectric (see paragraph# 18). Regarding to claim 13, wherein the contact pad structure (104) comprises at least one of Cu, Au, AICu, Ag, or one or more alloys of at least two of Cu, Au, AICu, or Ag (see paragraph# 14). Regarding to claim 14, wherein a vertical distance between the first surface and a top surface of the contact pad structure is in a range from 2 µm to 50 µm (see paragraph# 17, figure 2). Regarding to claim 15, wherein a width of the dielectric spacer (32) at a bottom side of the dielectric spacer is larger than a thickness of the first liner dielectric (30) on the top surface of the contact pad structure (see figure 2). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over YU et al. (U.S. Patent Publication No. 2013/0087908) applied in claim(s) 1-2, 4-7, 13-15 above in view of Lim et al. (U.S. Patent Publication No. 2006/0166402). Referring to figures 1-14, YU et al. teaches a semiconductor device, comprising: a contact pad structure (104) over a first surface of a semiconductor body (100); and a dielectric structure lining (30/32): a sidewall of the contact pad structure (see figure 2); and a boundary area on a top surface of the contact pad structure (portion on top of 104), wherein the dielectric structure comprises a dielectric spacer (32) at the sidewall of the contact pad structure (see figure 2). However, the reference does not clearly teach a part of the sidewall of the contact pad structure has a convex shape in claim 3. Lim et al. teaches a semiconductor device having a part of the sidewall of the contact pad structure has a convex shape (see figures 12-14). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a part of the sidewall of the contact pad structure has a convex shape in Yu et al. as taught by Lim et al. because it is known in the semiconductor art to reduce the electrical shorting. Claims 8, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over YU et al. (U.S. Patent Publication No. 2013/0087908) applied in claim(s) 1-2, 4-7, 13-15 above in view of HUANG (U.S. Patent Publication No. 2022/0068848). Referring to figures 1-14, YU et al. teaches a semiconductor device, comprising: a contact pad structure (104) over a first surface of a semiconductor body (100); and a dielectric structure lining (30/32): a sidewall of the contact pad structure (see figure 2); and a boundary area on a top surface of the contact pad structure (portion on top of 104), wherein the dielectric structure comprises a dielectric spacer (32) at the sidewall of the contact pad structure (see figure 2). However, the reference does not clearly a polyimide resin on the second liner dielectric in claim 8. HUANG teaches a semiconductor device having a polyimide resin (109) on the contact pad and spacer (203/413, see paragraph# 63, figure 2, meeting claim 8). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a polyimide resin on the second liner dielectric in Yu et al. as taught by HUANG because it is known in the semiconductor art to protect and shield the device. However, the reference does not clearly teach a width of the dielectric spacer at a bottom side of the dielectric spacer is smaller than a thickness of the second liner dielectric on the top surface of the contact pad structure, as in claim 16. The selection of the width of the dielectric spacer and the thickness of the dielectric spacer is obvious because it is a matter of determining optimum process condition by routine experimentation with a limited number of species. ln re Jones, 162 USPQ 224 (CCPA 1955) (the selection of optimum ranges within prior art general conditions is obvious) and In re Boesch, 205 USPQ 215 (CCPA 1980) (discovery of optimum value of result effective variable in a known process is obvious). In such a situation, applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to prior art range. See M.P.E.P 2144.05 III. In particular, Yu et al. suggests that the width of the dielectric spacer and the thickness of the dielectric spacer (see figures 1-14). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a width of the dielectric spacer at a bottom side of the dielectric spacer is smaller than a thickness of the second liner dielectric on the top surface of the contact pad structure in Yu et al. because it is known in the semiconductor art determining an optimum range for a dielectric spacer and the second liner dielectric to form a desired layers to protect the device. Allowable Subject Matter Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thanh Nguyen whose telephone number is (571) 272-1695, or by Email via address Thanh.Nguyen@uspto.gov. The examiner can normally be reached on Monday-Thursday from 6:00AM to 3:30PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yara Green, can be reached on (571) 270-3035. The fax phone number for this Group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pairdirect.uspto.gov. Should you have questions on access to thy Private PAIR system, contact the Electronic Business center (EBC) at 866-217-9197 (toll-free). /THANH T NGUYEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Mar 30, 2023
Application Filed
Mar 05, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
97%
With Interview (+13.9%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 1397 resolved cases by this examiner. Grant probability derived from career allow rate.

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