CTNF 18/129,400 CTNF 74935 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement 06-52 The information disclosure statement (IDS) submitted on 5/24/2024, and 1/9/2026 were filed after the mailing date of the Non-final rejection on 4/26/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The formal drawings filed on 3/31/2023 have been approved by the examiner. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 3 and 10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claims 3 and 10, the phrase “ does not include a seam ” is vague and indefinite since it is not clear from the claim what is meant by “seam”. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-15-03-aia AIA Claim s 1-6, 8-12, 15, 16, and 18-20 are rejected under 35 U.S.C. 102(a)(2) as being clearly anticipated by Khaderbad et al. (US 2023/0015572) . The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. With respect to Claims 1, 19, and 20, Khaderbad teaches a transistor structure 102A and an epitaxial structure 110 that extends through the transistor structure to an interconnect layer 140 that includes a contact at a backside of the transistor structure. A first end of a contact 140 directly physically coupled with a portion of the epitaxial structure 110. The contact has a second end opposite the first end and a side between the first end and the second end. An oxide layer 138C directly physically coupled with the side of the contact 140 (see paragraphs 41-44: Figs. 1A and 1B). With respect to Claim 2, Khaderbad teaches the oxide layer 138C is directly physically coupled with and completely surrounds the second end of the contact (see Figs. 1A and 1B). With respect to Claim 4, Khaderbad teaches a first side of the oxide layer 138C is directly physically coupled with the side of the contact (see Figs. 1A and 1B). With respect to Claims 5 and 18, Khaderbad teaches the contact 140 includes a selected one or more of: silicon (Si), oxygen (O), nitrogen (N), titanium (Ti), molybdenum (Mo), tungsten (W), aluminum (Al), lanthanum (La), magnesium (Mg), nickel (Ni), platinum (Pt), tantalum (Ta), ruthenium (Ru), and/or copper (Cu) (see paragraph 40). With respect to Claim 6, Khaderbad teaches the contact is within the interconnect layer at the backside of the transistor structure Figs. 1A and 1B). With respect to Claim 8, Khaderbad teaches the oxide layer 138C is at least partially surrounded by a the contact 140 that is selected one or more of: tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), lanthanum (La), magnesium (Mg), nickel (Ni), platinum (Pt), tantalum (Ta), ruthenium (Ru), and/or copper (Cu) (see paragraph 40; Figs. 1A and 1B). With respect to Claims 9 and 15, Khaderbad teaches a first transistor structure 102A and a second transistor structure 102B are both finFET. A first epitaxial structure110 that extends through the first transistor structure to an interconnect layer 140 that includes a contact at a backside of the first transistor structure. A second epitaxial structure 110 that extends through the second transistor structure 102B to the interconnect layer at a backside of the second transistor structure. A first contact 140 directly electrically coupled with a portion of the first epitaxial structure and directly electrically coupled with the interconnect layer. A second contact 140 directly electrically coupled with the second epitaxial structure 110 and directly electrically coupled with the interconnect layer. A first oxide layer 138C on a side of the first contact, wherein the first oxide layer 138C is directly physically coupled with the side of the first contact. A second oxide layer 138C on a side of the second contact, wherein the second oxide layer is directly physically coupled with the side of the second contact (see paragraphs 41-44: Figs. 1A and 1B). With respect to Claim 10, Khaderbad teaches the first oxide layer or the second oxide layer does not include a seam (i.e. groove or ridge) (see Figs. 1A and 1B). With respect to Claim 11, Khaderbad teaches wherein the first contact and the second contact are electrically coupled with each other (see Figs. 1A and 1B). With respect to Claim 12, Khaderbad teaches the first epitaxial structure 110 is electrically coupled with a first source or a first drain, and wherein the second epitaxial structure is electrically coupled with a second source or a second drain (see Figs. 1A and 1B). With respect to Claim 16, Khaderbad teaches providing a transistor structure 102A on a sub-fin. Etching through a portion of the transistor structure and into a portion of the sub-fin. Forming an oxide 138C in the sub-fin proximate to the etched portion of the sub-fin. Forming a contact 140 into the etched portion of the sub-fin, wherein the formed oxide completely surrounds the formed contact within the sub-fin (see paragraphs 41-44: Figs. 1A and 1B). Allowable Subject Matter 07-43 9. Claims 3, 7, 13, 14, and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 The following is a statement of reasons for the indication of allowance subject matter: none of the prior art of record teaches or suggest the combination of a liner surrounding the oxide layer. The oxide layer does not include a seam in claim 3. A liner on the oxide layer, wherein the liner includes a selected one or more of: silicon, nitrogen, oxygen, aluminum, hafnium, silicon nitride (SiN), silicon oxide (SiOx), aluminum oxide (AlOx), and/or hafnium oxide (HfOx) in claims 7 and 13. Forming the oxide in the sub-fin proximate to the etched portion of the sub-fin further includes placing a catalytic oxidant material in the etched portion of the sub-fin. Applying an annealing process in claim 17. The prior art made of record and not relied upon is cited primarily to show the product of the instant invention. Conclusion 10. Any inquiry concerning the communication or earlier communications from the examiner should be directed to Alonzo Chambliss whose telephone number is (571) 272-1927. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system Status information for published applications may be obtained from either Private PMR or Public PMR. Status information for unpublished applications is available through Private PMR only. For more information about the PMR system see hittp://pair-dkect.uspto. gov. Should you have questions on access to the Private PMR system contact the Electronic Center (EBC) at 866-217-9197 (toll-free). AC /April 26, 2026 /Alonzo Chambliss/ Primary Examiner, Art Unit 2897 Application/Control Number: 18/129,400 Page 2 Art Unit: 2897 Application/Control Number: 18/129,400 Page 3 Art Unit: 2897 Application/Control Number: 18/129,400 Page 4 Art Unit: 2897 Application/Control Number: 18/129,400 Page 5 Art Unit: 2897 Application/Control Number: 18/129,400 Page 6 Art Unit: 2897 Application/Control Number: 18/129,400 Page 7 Art Unit: 2897 Application/Control Number: 18/129,400 Page 8 Art Unit: 2897
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