DETAILED ACTION
This Office Action is in response to the Applicant Election filed on 10/07/2025.
Currently, claims 1-20 are pending in the application. Currently, claims 9 and 11 are withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of species I and sub-species A in the reply filed on 10/07/2025 is acknowledged. Claims 9 and 11 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-selected invention, there being no allowable generic or linking claim. Claims 1-8, 10, and 12-20 are examined in this Office action.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 04/15/2024 and 08/05/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the Examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 4-7, 18, 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)).
Regarding independent claim 1, Zhou teaches a method of forming a tandem OLED device (Figs. 3 & 10), the method comprising:
patterning a first side of a substrate (Figs. 3 & 10, ¶ [n0044] teaches that an opening is made in the substrate in which the CGL is deposited) to form a first OLED opening (Fig. 10, space corresponding to the layers above and including the CGL, ¶ [n0044]);
forming a first material layer stack (Figs. 3 & 10, ETL + EML + HTL + AND above CGL, ¶ [n0044]) in the first OLED opening, the first material layer stack comprising a first charge generation layer (CGL) (Figs. 3 & 10, P-CGL, ¶ [n0044]) and a second CGL (Figs. 3 & 10, N-CGL, ¶ [n0044]) disposed on the first CGL;
after forming the first CGL and the second CGL, patterning a second side of the substrate, opposite the first side, to form a second OLED opening (¶ [n0044] teaches that after depositing the CGL, two light emitting structures are deposited on both sides of the CGL. Therefore, Zhao’s the opening corresponding to the layers below the CGL are formed after CGL deposition due to the CGL positioning and the shape of Zhao’s opening) in registration with the first OLED opening (Fig. 10); and
forming a second material layer stack (Figs. 3 & 10, HTL + EML + ETL + CTD below CGL, ¶ [n0044]) in the second OLED opening.
Regarding claim 2, Zhao teaches the method of claim 1, and Zhao teaches that forming the first material layer stack (Figs. 3 & 10, ETL + EML + HTL +AND above CGL, ¶ [n0044]) comprises forming a first emissive/transport layer stack (ETL + EML + HTL above CGL, ¶ [n0044]) on the second CGL (Figs. 3 & 10, N-CGL, ¶ [n0044]).
Regarding claim 4, Zhao teaches the method of claim 2, and Zhao teaches that the second material layer stack (Figs. 3 & 10, HTL + EML + ETL + CTD below CGL, ¶ [n0044]) comprises a second emissive/transport layer stack (HTL + EML + ETL below CGL, ¶ [n0044]).
Regarding claim 5, Zhao teaches the method of claim 4, and Zhao teaches that the second emissive/transport layer stack (Figs. 3 & 10, HTL + EML + ETL below CGL, ¶ [n0044]) is disposed in direct contact (Fig. 10) with the first CGL (Figs. 3 & 10, P-CGL, ¶ [n0044]).
Regarding claim 6, Zhao teaches the method of claim 5, and Zhao teaches that each of the first (Fig. 10, space corresponding to the layers above and including the CGL, ¶ [n0044]) and second OLED openings first (Fig. 10, space corresponding to the layers below the CGL, ¶ [n0044]) are wider at the respective surfaces of the first and second sides of the substrate than at the interface of the first and second material layer stacks (Fig. 10, Zhao’s device has an hourglass shape that is widest at the top and bottom sides of Zhao’s substrate).
Regarding claim 7, Zhao teaches the method of claim 5, and Zhao teaches that the first material layer stack (Figs. 3 & 10, ETL + EML + HTL + AND above CGL, ¶ [n0044]) further comprises a first conductive layer (Figs. 3 & 10, AND, ¶ [n0044]) disposed on the first emissive/transport layer stack (ETL + EML + HTL above CGL, ¶ [n0044]), and the second material layer stack (Figs. 3 & 10, HTL + EML + ETL + CTD below CGL, ¶ [n0044]) comprises a second conductive layer (Figs. 3 & 10, CTD, ¶ [n0044]) disposed on the second emissive/transport layer stack (HTL + EML + ETL below CGL, ¶ [n0044]).
Regarding claim 18, Zhao teaches the method of claim 1, and Zhao teaches forming a conductive via (Fig. 10, connections between AND, CTD, and the transistors to the left of Zhao’s OLED) between the first side and the second side of the substrate (Fig. 10).
Regarding claim 19, Zhao teaches the method of claim 18, and Zhao teaches that forming the conductive via (Fig. 10, connections between AND, CTD, and the transistors to the left of Zhao’s OLED) comprises patterning the first side of the substrate to form a first via opening (Fig. 10, space occupied by connection between AND and transistor) and patterning the second side of the substrate to form a second via opening (Fig. 10, space occupied by connection between CTD and transistor) in registration (the connections between AND, CTD, and the transistors are correspondingly aligned) with the first via opening.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 is rejected under 35 U.S.C. 103 as being obvious over ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)).
Regarding claim 3, Zhao teaches the method of claim 2.
However, Zhao does not explicitly teach that the second side is patterned after forming the first emissive/transport layer stack (the Examiner notes that Zhao is silent in regards to the order of formation of the layers on both sides of Zhao’s CGL).
However, it would have been obvious to one of ordinary skill in the art to form the bottom opening in Zhao’s substrate after formation of Zhao’s upper light emitting layers in order to simplify manufacturing (forming Zhao’s upper light emitting layers first would require less overall position/orientation adjustments during manufacturing).
Claims 12 and 13 are rejected under 35 U.S.C. 103 as being obvious over ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)) and further in view of ZHANG et al. (US Pub. No. 2025/0275356).
Regarding claim 12, Zhao teaches the method of claim 1.
However, Zhao does not explicitly teach that at least one of the first CGL and the second CGL comprise an inorganic material (the Examiner notes that Zhao is silent in regards to the materials of their CGL).
However, Zhang is a pertinent art that teaches that at least one of the first CGL and the second CGL (Fig. 1, 4, ¶ [0084] teaches that CGL 4 can include an N-CGL and P-CGL that can both be inorganic metals) comprise an inorganic material.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s charge generation layers to both be inorganic metals according to the teaching of Zhang (Fig. 1) in order to reduce manufacturing costs. Further, it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Regarding claim 13, Zhao teaches the method of claim 1.
However, Zhao does not explicitly teach that at least one of the first CGL and the second CGL comprise an inorganic metal or inorganic metal oxide material (the Examiner notes that Zhao is silent in regards to the materials of their CGL).
However, Zhang is a pertinent art that teaches that least one of the first CGL and the second CGL (Fig. 1, 4, ¶ [0084] teaches that CGL 4 can include an N-CGL and P-CGL that can both be inorganic metals) comprise an inorganic metal or inorganic metal oxide material.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s charge generation layers to both be inorganic metals according to the teaching of Zhang (Fig. 1) in order to reduce manufacturing costs. Further, it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claims 14-16 are rejected under 35 U.S.C. 103 as being obvious over ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)) and further in view of HUR et al. (US Pub. No. 2021/0408380).
Regarding claim 14, Zhao teaches the method of claim 1.
However, Zhao does not explicitly teach that forming one or both of the first CGL and the second CGL comprises heating the substrate to a temperature greater than about 200°C.
However, Hur is a pertinent art that teaches that forming one or both of the first CGL and the second CGL (Fig. 1, 155, ¶ [0050]) comprises heating the substrate (¶ [0437] teaches that deposition of the charge generation layers can be performed at 100°C to 500°C. It would be obvious that at least a portion of Zhao’s substrate would be heated Zhao modified by Hur’s deposition temperatures) to a temperature greater than about 200°C.
Therefore, it would have been obvious to one of ordinary skill in the art to modify the formation of Zhao’s charge generation layers to occur within the claimed temperature range because deposition temperatures of charge generation layers within 100°C to 500°C are known in the art (see Hur ¶ [0437]).
Regarding claim 15, Zhao teaches the method of claim 1.
However, Zhao does not explicitly teach that forming one or both of the first CGL and the second CGL comprises heating the substrate to a temperature greater than about 400°C.
However, Hur is a pertinent art that teaches that forming one or both of the first CGL and the second CGL (Fig. 1, 155, ¶ [0050]) comprises heating the substrate (¶ [0437] teaches that deposition of the charge generation layers can be performed at 100°C to 500°C. It would be obvious that at least a portion of Zhao’s substrate would be heated Zhao modified by Hur’s deposition temperatures) to a temperature greater than about 400°C.
Therefore, it would have been obvious to one of ordinary skill in the art to modify the formation of Zhao’s charge generation layers to occur within the claimed temperature range because deposition temperatures of charge generation layers within 100°C to 500°C are known in the art (see Hur ¶ [0437]).
Regarding claim 16, Zhao teaches the method of claim 1.
However, Zhao does not explicitly teach that forming one or both of the first CGL and the second CGL comprises heating the substrate to a temperature greater than about 800°C.
However, Hur recognizes that the deposition temperature of charge generation layer material depends on the material properties and the preferred structure of the layer (¶ [0437]). It would be obvious to one of ordinary skill in the art that the material and structure of a charge generation layer impacts the desired performance. Therefore, the deposition temperature of charge generation layer material art recognized variable (the Examiner notes that it would be obvious that at least a portion of Zhao’s substrate would be heated Zhao modified by Hur’s deposition temperatures). One of ordinary skill in the art would have had a reasonable expectation of success to arrive within the range of the claim 16 limitations, in order to achieve the desired balance between the material and structure of the charge generation layer and their impact on charge generation performance as taught by Hur. MPEP 2144.05.
Furthermore, the Applicant has not presented persuasive evidence of the criticality of the claimed range (i.e., the claimed range achieves unexpected results relative to the prior art range).
Claim 17 is rejected under 35 U.S.C. 103 as being obvious over ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)) in view of PAEK et al. (US Pub. No. 2023/0209885))
Regarding claim 17, Zhao teaches the method of claim 1.
However, as it is not pertinent to the particulars of their invention, Zhao does not explicitly teach that before forming the second OLED opening, forming an etch-stop layer in the first OLED opening; and removing the etch-stop layer when forming the second OLED opening.
However, the use of etch stop layers when etching a substrate is well known in the art (see Paek Fig. 9B, 145, ¶ [0086]). It would be obvious to use an etch stop layer in the formation of Zhao’s openings in order to prevent over etching. Further, it would be obvious to remove etch stop layers in a display device in order to not affect device performance.
Claim 20 is rejected under 35 U.S.C. 103 as being obvious over ZHOU et al. (Foreign Pub. No. CN 114582946 A (English Translation attached)) in view of LIU (US Pub. No. 2023/0380232))
Regarding claim 20, Zhao teaches the method of claim 18.
However, as it is not pertinent to the particulars of their invention, Zhao does not explicitly teach that the conductive via comprises a copper material.
However, using copper for conductive vias is known in the art (see Liu Fig. 1, 160, ¶ [0026]). It would be obvious to use copper for Zhao’s interconnections in order to reduce manufacturing costs. Further, it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Allowable subject matter
Claims 8 and 10 are objected to as being dependent upon a rejected base claim (claim 7 and 1 respectively), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
With respect to dependent claim 8, the cited prior art does not anticipate or make obvious, inter alia, the step of: “the first conductive layer is an anode, the second conductive layer is a cathode, and the method further comprises: bonding the second conductive layer to a TFT-backplane to form a top-emitting display device.”.
With respect to dependent claim 10, the cited prior art does not anticipate or make obvious, inter alia, the step of: “attaching the substrate to a TFT- backplane using hybrid bonds”.
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
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/R.P.S./
Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813