DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Office acknowledges receipt on 6 November 2025 of Applicants’ amendments in which claims 1, 3, 5, 6, 11-14, and 16 are amended and claims 2 and 4 are cancelled. The Office withdraws the drawing objection and indefiniteness rejections identified in the Office Communication dated 13 August 2025 in view of the amendments.
Response to Arguments
Applicants’ arguments filed 6 November 2025 have been fully considered but they are not persuasive.
Applicants argue in the second paragraph of page 11 through the second paragraph of page 12 and with respect to claim 1 that “Cao is silent on differences on light-shielding components in the different display areas, as required by amended claim 1, such as ‘a first light-shielding component, disposed on a side of the first active layer ...the second light-shielding component is disposed on a side of the first active layer . . . a third light-shielding component, separately from the first light- shielding component and the second light-shielding component, disposed on a side of the second active layer.’” Claim 1 is rejected as being unpatentable over Cao and recites, in relevant part, “a first light-shielding component, disposed on a side of the first active layer away from the substrate; … the second light-shielding component is disposed on a side of the first active layer, [and] … a third light-shielding component, separately from the first light-shielding component and the second light-shielding component, disposed on a side of the second active layer away from the substrate.” Obviousness can be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so. MPEP §2143.01. As this principle applies to the present circumstance, Cao teaches in paragraph [0093] that: (1) some embodiments of the display panel (100) illustrated in Fig. 24 may further include the features illustrated in the optional embodiments of Figs. 27-29, (2) a first display area (DA1) may include a driving circuit (C1), and (3) a second display (DA2) may include driving circuits (C2) and (C3). Cao’s Fig. 24 illustrates an embodiment of a driving circuit that may be employed as each of the driving circuits (C1), (C2), and (C3) within display areas (DA1) and (DA2). Thus, even assuming, arguendo, Cao does not explicitly disclose a single embodiment in which the light-shielding components illustrated by Cao’s Fig. 24 necessarily exist in each of the driving circuits (C1), (C2) and (C3), Cao provides a motivation to employ the light-shielding components illustrated by Fig. 24 within each of the driving circuits (C1), (C2) and (C3); specifically, this motivation is to form an enclosed protection for the oxide transistor …, further enhancing the protection of the oxide transistor. Cao ¶0086. Accordingly, Cao teaches a first light-shielding component (uppermost 30 in driving circuit C2/C3), disposed on a side (e.g. top side) of the first active layer (11 in driving circuit C2/C3) away from the substrate (01) {Figs. 24, 28; ¶0086}; a second light-shielding component (80 or portion thereof lateral to 11 in driving circuit C2/C3) is disposed on a side (e.g., right side) of the first active layer (11 in driving circuit C2/C3) {Figs. 24, 28; ¶0086}, and a third light-shielding component (uppermost 30 in driving circuit C1), separately from the first light-shielding component (uppermost 30 in driving circuit C2/C3) and the second light-shielding component (80 or portion thereof lateral to 11 in driving circuit C2/C3), disposed on a side (e.g. top side) of the second active layer (11 in driving circuit C1) away from the substrate (01) {Fig. 24; ¶0086}.
Applicants argue in the penultimate paragraph of page 9 through the first paragraph of page 11 and with respect to amended claim 1 that Cao does not teach the recited subject matter of “a third light-shielding component, separately from the first light-shielding component and the second light-shielding component, disposed on a side of the second active layer away from the substrate” because the Office relies on the same feature taught by Cao for teaching each of the first and third light-shielding components. See, e.g., first paragraph of page 11. Cao teaches a third light-shielding component (uppermost 30 in driving circuit C1), separately from the first light-shielding component (uppermost 30 in driving circuit C2/C3) and the second light-shielding component (80 or portion thereof lateral to 11 in driving circuit C2/C3), disposed on a side (e.g. top side) of the second active layer (11 in driving circuit C1) away from the substrate (01) {Figs. 24, 27, 28; ¶0086}. Accordingly, the Office does not cite the same feature taught by Cao for teaching each of the first and third light-shielding components, as proposed by Applicants; instead, the Office cites the uppermost portion of feature 30 from each of two distinct driving circuits (C2/C3) and (C1) as corresponding respectively to the first light-shielding component and the third light-shielding component.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 11 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 11, lines 3 and 4, recites “the side of the substrate facing towards the first light-shielding component,” which is indefinite because “the side” lacks a proper antecedent basis. For the purpose of compact prosecution and to better comport with base claim 1, the claim will be interpreted to recite “a side of the substrate facing towards the first light-shielding component.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 5-10, 12, and 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao et al. (US20220140043A1).
Regarding claim 1, Cao teaches in Figs. 24, 27, and 28 a display panel, comprising:
a substrate (01) {Fig. 24; ¶0046};
a first switch transistor (10 in C2/C3), disposed on a side (e.g. top side) of the substrate (01), wherein the first switch transistor (10 in C2/C3) includes a first active layer (11 in C2/C3) {Figs. 24, 28; ¶0084};
a first light-shielding component (uppermost 30 in C2/C3), disposed on a side (e.g. top side) of the first active layer (11 in C2/C3) away from the substrate (01), wherein along a direction (e.g., vertical) perpendicular to a plane where the substrate (01) is located, the first light-shielding component (uppermost 30 in C2/C3) at least partially overlaps with the first active layer (11 in C2/C3) {Figs. 24, 28; ¶0086}; and
a second light-shielding component (80 or portion thereof lateral to 11 in C2/C3), wherein along a direction (e.g., horizontal) parallel to the plane where the substrate (01) is located, the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3) is disposed on a side (e.g., right side) of the first active layer (11 in C2/C3) {Figs. 24, 28; ¶0086},
wherein the display panel further includes:
a plurality of pixel circuits (C1, C2, C3) {Fig. 28; ¶0093}; and
a first display region (DA1) and a second display region (DA2) {Figs. 27, 28; ¶0093}, wherein:
a density of the pixel circuits (C1) in the first display region (DA1) is greater than a density of the pixel circuits (C2 and/or C3) in the second display region (DA2) {Fig. 28}, and
the first switch transistor (10 in C2/C3) is disposed in the pixel circuits (C2 and/or C3) in the second display region (DA2) {Fig. 29; ¶0047}.
Cao does not explicitly teach in a single embodiment:
a second switch transistor, disposed on the side of the substrate and in the pixel circuits in the first display region, wherein the second switch transistor includes a second active layer; and
a third light-shielding component, separately from the first light-shielding component and the second light-shielding component, disposed on a side of the second active layer away from the substrate, wherein along the direction perpendicular to the plane where the substrate is located, the third light-shielding component at least partially overlaps with the second active layer.
However, Cao teaches in paragraph [0093] that: (1) some embodiments of the display panel (100) illustrated in Fig. 24 may further include the features illustrated in the optional embodiments of Figs. 27-29, (2) a first display area (DA1) may include a driving circuit (C1), and (3) a second display (DA2) may include driving circuits (C2) and (C3). Cao’s Fig. 24 illustrates an embodiment of a driving circuit that may be employed as each of the driving circuits (C1), (C2), and (C3) within display areas (DA1) and (DA2). Accordingly, Cao teaches:
a second switch transistor (10 in C1), disposed on the side of the substrate (01) and in the pixel circuits (C1) in the first display region (DA1), wherein the second switch transistor (10 in C1) includes a second active layer (11 in C1) {Fig. 24; ¶0086}; and
a third light-shielding component (uppermost 30 in C1), separately from the first light-shielding component (uppermost 30 in C2/C3) and the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3), disposed on a side (e.g. top side) of the second active layer (11 in C1) away from the substrate (01), wherein along the direction (e.g., vertical) perpendicular to the plane where the substrate (01) is located, the third light-shielding component (uppermost 30 in C1) at least partially overlaps with the second active layer (11 in C1) {Fig. 24; ¶0086}.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Cao’s display panel based on the further teachings of Cao, as identified in the preceding paragraph, to form an enclosed protection for the oxide transistor …, further enhancing the protection of the oxide transistor. Cao ¶0086. Moreover, all the claimed elements (e.g., as identified above) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Cao) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Examiner’s Note: Cao teaches in paragraph [0093] that some embodiments of the display panel (100) illustrated in Fig. 24 may further include the features illustrated in the optional embodiments of Figs. 27-29.
Regarding claim 3, Cao teaches the display panel according to claim 1, and Cao further teaches wherein:
the second display region (DA2) includes an optical device region (DA3) {Fig. 27; ¶0093}, and
the first display region (DA1) at least partially surrounds the optical device region (DA3) {Fig. 27; ¶0093}.
Regarding claim 5, Cao teaches the display panel according to claim 1, and Cao further teaches wherein:
the third light-shielding component (uppermost 30 in C1) is disposed on a same layer as the first light-shielding component (uppermost 30 in C2) {Fig. 24; the pixel circuit illustrated by Cao’s Fig. 24 is used for both pixel circuits C1 and C2}.
Regarding claim 6, Cao teaches the display panel according to claim 1, and Cao further teaches wherein:
the first active layer (11 in C2) is disposed on a same layer as the second active layer (11 in C1) {Fig. 24; the pixel circuit illustrated by Cao’s Fig. 24 is used for both pixel circuits C1 and C2}, and
each of the first active layer (11 in C2) and the second active layer (11 in C1) includes a metal oxide semiconductor layer {¶0048}.
Regarding claim 7, Cao teaches the display panel according to claim 1, and Cao further teaches wherein:
the first active layer (11 in C2/C3) includes a source (13) and a drain (14) of the first switch transistor (10 in C2/C3), and a conductive channel (111) between the source (13) and the drain (14) {Figs. 24, 25; ¶0084, 0089},
wherein along the direction perpendicular to the plane where the substrate (01) is located, the first light-shielding component (uppermost 30 in C2/C3) overlaps with the conductive channel (111) of the first switch transistor (10 in C2/C3) {Figs. 24, 25; ¶0086}.
Regarding claim 8, Cao teaches the display panel according to claim 1, and Cao further teaches wherein:
the first light-shielding component (uppermost 30 in C2/C3) and the second light-shielding component (component/portion of 80 lateral to 11 in C2/C3) are connected with each other through one or more first vias (vertical component(s) {e.g., via(s)} of 80 through layers 56 and 57) {Fig. 24; ¶0086}.
Regarding claim 9, Cao teaches the display panel according to claim 8, and Cao further teaches wherein:
the first active layer (11 in C2/C3) includes a source (13) and a drain (14) of the first switch transistor (10 in C2/C3), and a conductive channel (111) between the source (13) and the drain (14) {Figs. 24, 25; ¶0084, 0089}, and
the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3) includes a first sub-light-shielding component (leftmost component/portion of 80 or portion thereof lateral to 11 in Fig. 24) disposed on a side of the source (13) away from the drain (14), and a second sub-light-shielding component (rightmost component/portion of 80 or portion thereof lateral to 11 in Fig. 24) disposed on a side of the drain (14) away from the source (13) {Fig. 24; ¶0086}.
Regarding claim 10, Cao teaches the display panel according to claim 9, and Cao further teaches wherein:
the first sub-light-shielding component (leftmost component/portion of 80 or portion thereof lateral to 11 in Fig. 24) is connected to the first light-shielding component (uppermost 30 in C2/C3) through a first via (leftmost vertical component {e.g., via} of 80 through layers 56 and 57) of the one or more first vias (vertical component(s) {e.g., via(s)} of 80 through layers 56 and 57), and the second sub-light-shielding component (rightmost component/portion of 80 or portion thereof lateral to 11 in Fig. 24) is connected to the first light-shielding component (uppermost 30 in C2/C3) through another first via (rightmost vertical component {e.g., via} of 80 through layers 56 and 57) of the one or more first vias (vertical component(s) {e.g., via(s)} of 80 through layers 56 and 57) {Fig. 24; ¶0086}.
Regarding claim 12, Cao teaches the display panel according to claim 1, and Cao further teaches further including:
a plurality of driving transistors (20) disposed on the side of the substrate (01), and a capacitive metal layer (61/62) disposed on a side of a driving transistor (20) of the plurality of driving transistors (20) away from the substrate (01) {Figs. 24, 28; ¶0047, 0091}, wherein:
the driving transistor (20) includes a third active layer (21) and a first gate (22) disposed on a side of the third active layer (21) away from the substrate (01) {Fig. 24; ¶0055}, and
the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3) is disposed on a same layer as one of the first gate (22) and the capacitive metal layer (61/62) {Fig. 24, a portion of 80 is disposed on same layer as each of 22, 61, and/or 62, though the claim only requires it to be on same layer as any one of 22, 61, 62}.
Regarding claim 14, Cao teaches the display panel according to claim 1, and Cao further teaches further including:
a plurality of driving transistors (20) disposed on the side of the substrate (01), wherein a driving transistor (20) of the plurality of driving transistors (20) includes a source (23) and a drain (24) {Figs. 24, 28; ¶0047, 0091}; and
a conductive layer (711) disposed on a side of the driving transistor (20) away from the substrate (01), wherein the conductive layer (711) is electrically connected to one of the source (23) and the drain (24) of the driving transistor (20) {Fig. 29; ¶0082}, and the first light-shielding component (uppermost 30 of, e.g., driving circuit C2) is disposed on a same layer (57) as the conductive layer (711) {Figs. 24, 29; Fig. 24 illustrates that uppermost 30 is disposed on 57, and Fig. 29 illustrates that 711 is disposed on 57}.
Regarding claim 15, Cao teaches the display panel according to claim 1, but Cao does not expressly teach wherein: a light absorptivity of the second light-shielding component is greater than a light absorptivity of the first light-shielding component.
However, as discussed with respect to base claim 1, Cao teaches a need a need in the art to solve a problem pertaining to the active region of a transistor being exposed to environmental light and the use of two light-shielding components to solve this problem by absorbing such light {see, e.g., Cao ¶0003, 0008}. Cao further teaches in paragraph [0053] the first light-shielding component (30) may be made of titanium (Ti), aluminum (Al), or molybdenum (Mo) and teaches in paragraph [0091] the second light-shielding component (80) may be made of titanium (Ti), aluminum (Al), or molybdenum (Mo). Molybdenum has a higher absorptivity than each of titanium and aluminum. Thus, Cao teaches a reasonable expectation of success for each of 32 = 9 alternative combinations of the three materials for the two light-shielding components. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Cao’s display panel based on the further teachings of Cao – such that the second light-shielding component is made of molybdenum and the first light-shielding component is made of either titanium or aluminum – because a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E).
Regarding claim 16, Cao teaches in Figs. 24, 27, and 28 a display device, comprising:
a display panel (100) {¶0046}, the display panel (100) including:
a substrate (01) {¶0046};
a first switch transistor (10 in C2/C3), disposed on a side (e.g. top side) of the substrate (01), wherein the first switch transistor (10 in C2/C3) includes a first active layer (11 in C2/C3) {Figs. 24, 28; ¶0084};
a first light-shielding component (uppermost 30 in C2/C3), disposed on a side (e.g. top side) of the first active layer (11 in C2/C3) away from the substrate (01), wherein along a direction (e.g., vertical) perpendicular to a plane where the substrate (01) is located, the first light-shielding component (uppermost 30 in C2/C3) at least partially overlaps with the first active layer (11 in C2/C3) {Figs. 24, 28; ¶0086}; and
a second light-shielding component (80 or portion thereof lateral to 11 in C2/C3), wherein along a direction (e.g., horizontal) parallel to the plane where the substrate (01) is located, the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3) is disposed on a side (e.g., right side) of the first active layer (11 in C2/C3) {Figs. 24, 28; ¶0086};
wherein the display panel further includes:
a plurality of pixel circuits (C1, C2, C3) {Fig. 28; ¶0093}; and
a first display region (DA1) and a second display region (DA2) {Figs. 27, 28; ¶0093}, wherein:
a density of the pixel circuits (C1) in the first display region (DA1) is greater than a density of the pixel circuits (C2 and/or C3) in the second display region (DA2) {Fig. 28}, and
the first switch transistor (10 in C2/C3) is disposed in the pixel circuits (C2 and/or C3) in the second display region (DA2) {Fig. 29; ¶0047}.
Cao does not explicitly teach in a single embodiment:
a second switch transistor, disposed on the side of the substrate and in the pixel circuits in the first display region, wherein the second switch transistor includes a second active layer; and
a third light-shielding component, separately from the first light-shielding component and the second light-shielding component, disposed on a side of the second active layer away from the substrate, wherein along the direction perpendicular to the plane where the substrate is located, the third light-shielding component at least partially overlaps with the second active layer.
However, Cao teaches in paragraph [0093] that: (1) some embodiments of the display panel (100) illustrated in Fig. 24 may further include the features illustrated in the optional embodiments of Figs. 27-29, (2) a first display area (DA1) may include a driving circuit (C1), and (3) a second display (DA2) may include driving circuits (C2) and (C3). Cao’s Fig. 24 illustrates an embodiment of a driving circuit that may be employed as each of the driving circuits (C1), (C2), and (C3) within display areas (DA1) and (DA2). Accordingly, Cao teaches:
a second switch transistor (10 in C1), disposed on the side of the substrate (01) and in the pixel circuits (C1) in the first display region (DA1), wherein the second switch transistor (10 in C1) includes a second active layer (11 in C1) {Fig. 24; ¶0086}; and
a third light-shielding component (uppermost 30 in C1), separately from the first light-shielding component (uppermost 30 in C2/C3) and the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3), disposed on a side (e.g. top side) of the second active layer (11 in C1) away from the substrate (01), wherein along the direction (e.g., vertical) perpendicular to the plane where the substrate (01) is located, the third light-shielding component (uppermost 30 in C1) at least partially overlaps with the second active layer (11 in C1) {Fig. 24; ¶0086}.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Cao’s display panel based on the further teachings of Cao, as identified in the preceding paragraph, to form an enclosed protection for the oxide transistor …, further enhancing the protection of the oxide transistor. Cao ¶0086. Moreover, all the claimed elements (e.g., as identified above) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Cao) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Examiner’s Note: Cao teaches in paragraph [0093] that some embodiments of the display panel (100) illustrated in Fig. 24 may further include the features illustrated in the optional embodiments of Figs. 27-29.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao as applied to claim 1 above, and further in view of Ke (US20240032349A1).
Regarding claim 11, as interpreted in view of the indefiniteness rejection, Cao teaches the display panel according to claim 1, and Cao further teaches further including:
a first gate insulating layer (55), a second gate insulating layer (56), and a first insulating layer (57) sequentially disposed over a side of the substrate (01) facing towards the first light-shielding component (uppermost 30 in C2/C3), wherein:
the first gate insulating layer (55) is disposed over a side (e.g. top side) of the first insulating layer (57) facing towards the substrate (01), the second gate insulating layer (56) is disposed between the first gate insulating layer (55) and the first insulating layer (57), and
the second light-shielding component (80 or portion thereof lateral to 11 in C2/C3) penetrates through at least one of the first gate insulating layer (55), the second gate insulating layer (56) and the first layer (57) {Fig. 24; ¶0083; only one of the three alternatives of the Markush Group need be met}.
Cao does not teach:
the first layer is an insulator; and
the first active layer is formed between the first gate insulating layer and the second gate insulating layer.
In an analogous art, Ke teaches in Fig. 3 and paragraph [0041] a first layer (524), which is an insulating layer, is disposed over a second gate insulating layer (522) which is disposed over a first gate insulating layer (512). Ke further teaches in Fig. 3 and paragraphs [0042] and [0073] a first active layer (521) is formed between a first gate insulating layer (512) and a second gate insulating layer (522). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Cao’s display panel based on the teachings of Ke – such that the first layer is an insulator; and the first active layer is formed between the first gate insulating layer and the second gate insulating layer – so two light shielding layers and the two shielding layers form a dual U-shaped conductor structure encompassing the first thin film transistor and the second thin film transistor to perfectly shield moving charges in a film layer under the thin film transistor and film layers on two sides of the thin film transistor outside the dual U-shaped conductor structure, which simultaneously keeps excellent electrical properties of the device and mitigates and fixes an issue of afterimages to increase stability of the display panel. Moreover, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao as applied to claim 1 above, and further in view of Long et al. (US20220130913A1).
Regarding claim 13, Cao teaches the display panel according to claim 1, and Cao further teaches further including:
a plurality of driving transistors (20) disposed on the side of the substrate (01), and a capacitive metal layer (61/62) disposed on a side of a driving transistor (20) of the plurality of driving transistors (20) away from the substrate (01) {Figs. 24, 28; ¶0047, 0091}, wherein:
the first switch transistor (10 in C2/C3) further includes a second gate (12) disposed on the side of the first active layer (11 in C2/C3) away from the substrate (01) {Fig. 24; ¶0053}.
Cao does not expressly teach in the embodiment discussed above the second gate is disposed on a same layer as the capacitive metal layer.
However, Cao teaches in an embodiment illustrated by Fig. 14 a second gate (12) of a switch transistor (10) is disposed on a same layer as a capacitive metal layer (40) {any two metal layers separated by a dielectric will develop a capacitance between them in the presence of an electrical field}.
In an analogous art, Long more expressly teaches in Fig. 15 and paragraph [0123] a gate (G6) [of a transistor] is disposed on a same layer as a capacitive metal layer (Cst2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Cao’s display panel based on the teachings of Cao or Long or both – such that the second gate is disposed on a same layer as the capacitive metal layer – so the second gate and the capacitive metal layer may be formed by the same patterning process, thereby reducing manufacturing resources (e.g., manufacturing operations, materials, etc.). Long ¶0123.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891
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