Prosecution Insights
Last updated: October 02, 2026
Application No. 18/130,570

DISPLAY MODULE AND MANUFACTURING METHOD THEREFOR

Non-Final OA §102§103
Filed
Apr 04, 2023
Priority
Oct 27, 2020 — RE 10-2020-0140149 +2 more
Examiner
GUPTA, RAJ R
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
69%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
432 granted / 629 resolved
+0.7% vs TC avg
Moderate +13% lift
Without
With
+13.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
29 currently pending
Career history
646
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
55.1%
+15.1% vs TC avg
§102
22.3%
-17.7% vs TC avg
§112
16.9%
-23.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 629 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I (Claims 1-14) in the reply filed on 11/14/2025 is acknowledged. Claim 15 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “molding layer” of claims 8 and 11-14 (12-14 through their dependence on claim 11) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 2, 5, 7, and 11 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Rhee (US 2017/0207249). With regard to claim 1, Rhee teaches, in Figs 10-12, a display module comprising: a substrate (1010); a thin film transistor (TFT) layer (layer spanned by 1101-1104, 1110, 1120, 1200) stacked on a surface of the substrate, a plurality of TFT electrodes (1020, 1040) being arranged on the TFT layer; a plurality of light emitting devices (LEDs) (1050) electrically connected to the plurality of TFT electrodes; an anti-reflection layer (1030) stacked on the TFT layer, the anti-reflection layer having a light absorption color for absorbing external light ([0057], [0109]), the anti-reflection layer fixing in place the plurality of LEDs ([0110]); and a protective layer (1080) stacked on the anti-reflection layer and the plurality of LEDs, wherein the plurality of TFT electrodes and the plurality of LEDs are electrically connected in the anti-reflection layer ([0011]). With regard to claim 2, Rhee teaches, in Figs 10-12, that the anti-reflection layer is formed by applying a black-based pigment or dye to an anisotropic conductive film (ACF) ([0057]). With regard to claim 5, Rhee teaches, in Figs 10-12, that a light emitting surface (top surface in the figures, [0104]) is formed on each of the plurality of LEDs, the light emitting surface being exposed to the outside of the anti- reflection layer (see figures). With regard to claim 7, Rhee teaches, in Figs 10-12, that each of the plurality of LEDs comprises a pair of LED electrodes (1152, 1156) formed on a lower portion opposite to an upper portion on which the light emitting surface is formed, and the pair of LED electrodes is embedded in the anti-reflection layer (see figure). With regard to claim 11, Rhee teaches, in Figs 10-12, a display module comprising: a thin film transistor (TFT) substrate (1010), a plurality of TFT electrodes (1120, 1140) being arranged on the TFT layer; an anti-reflection layer (1030) stacked on the TFT layer and having a black-based color ([0057], [0109]); a plurality of LEDs (1050) each respectively electrically connected to a corresponding one of the plurality of TFT electrodes of the TFT layer through the anti-reflection layer ([0110]); and a molding layer (1080) stacked on the anti-reflection layer and the plurality of LEDs, wherein each of the plurality of LEDs comprises: a light emitting surface (top surface in the figures, [0104]) formed on an upper portion thereof, and a pair of LED electrodes (1152, 1156) disposed on a lower portion opposite to the upper portion and electrically connected to a corresponding pair of TFT electrodes, among the plurality of TFT electrodes, in the anti-reflection layer ([0110], see figures). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 3, 4, and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rhee (US 2017/0207249) in view of Chung et al. (US 2020/0152721). With regard to claim 3, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 1. Rhee does not explicitly teach that the anti-reflection layer is formed by applying a black-based pigment or dye to a non-conductive film (NCF). Chung teaches, in Fig 4, that the anti-reflection layer (80) is formed by applying a black-based pigment or dye to a non-conductive film (NCF) ([0133]) so that, “uniform brightness of the display apparatus 1 may be implemented,” ([0121]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the anti-reflection layer connection of Chung so that uniform brightness of the display apparatus may be implemented. With regard to claim 4, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 1. Rhee does not explicitly teach that the anti-reflection layer is formed of a black resin. Chung teaches, in Fig 4, that the anti-reflection layer (80) is formed of a black resin ([0133]) so that, “uniform brightness of the display apparatus 1 may be implemented,” ([0121]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the anti-reflection layer connection of Chung so that uniform brightness of the display apparatus may be implemented. With regard to claim 6, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 5. Rhee does not explicitly teach that an upper portion of each of the plurality of LEDs protrudes from the anti-reflection layer, the light emitting surface being formed on the upper portion. Chung teaches, in Fig 4, that an upper portion (portion exposed from 80) of each of the plurality of LEDs (51, 52) protrudes from the anti-reflection layer (80), the light emitting surface (51b, 52b) being formed on the upper portion so that, “the non-conductive layer 80 may not adversely affect the brightness of the micro LEDs 51 and 52,” ([0123]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the anti-reflection layer connection of Chung so that the anti-reflection layer may not adversely affect the brightness of the micro LEDs. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rhee (US 2017/0207249) in view of Mun et al. (US 2020/0161283). With regard to claim 8, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 1. Rhee does not explicitly teach a molding layer covering the anti-reflection layer and the plurality of LEDs, wherein the protective layer is stacked on the molding layer. Mun teaches, in Fig 8, a molding layer (710) covering the anti-reflection layer (320) and the plurality of LEDs (330), wherein the protective layer (720) is stacked on the molding layer to, “adjust a patterned unit size to satisfy the specified CR and increase the degree of freedom in manufacturing or design,” ([0088]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the molding layer of Mun to increase the degree of freedom in manufacturing or design. Claim(s) 9, 10, and 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rhee (US 2017/0207249) in view of Tsai et al. (US 2020/0235075). With regard to claim 9, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 1. Rhee does not explicitly teach an ultra-low reflection layer stacked on the protective layer; and a radiant heat blocking layer stacked on the ultra-low reflection layer to block near-infrared and far-infrared rays. Tsai teaches, in Fig 4, an ultra-low reflection layer (310) stacked on the protective layer (500); and a radiant heat blocking layer (320) stacked on the ultra-low reflection layer to block near-infrared and far-infrared rays so that, “a mirror reflection can be avoid,” ([0032]) and, “such that the intensity of the reflected light may be reduced,” ([0033]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the overlying layers of Tsai to reduce or avoid reflections of ambient light. With regard to claim 10, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 1. Rhee does not explicitly teach that the protective layer has a plurality of diffuse reflection protrusions formed on a surface thereof. Tsai teaches, in Fig 4, that the protective layer (300) has a plurality of diffuse reflection protrusions (302) formed on a surface thereof so that, “a mirror reflection can be avoid,” ([0032]) and, “such that the intensity of the reflected light may be reduced,” ([0033]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the overlying layers of Tsai to reduce or avoid reflections of ambient light. With regard to claim 12, Rhee teaches most of the limitations of this claim as set forth above with regard to claim 11. Rhee also teaches, in Figs 10-12, a protective layer (1090) stacked on the anti-reflection layer and the plurality of LEDs. Rhee does not explicitly teach an ultra-low reflection layer stacked on the protective layer. Tsai teaches, in Fig 4, an ultra-low reflection layer (310) stacked on the protective layer (500) so that, “a mirror reflection can be avoid,” ([0032]) and, “such that the intensity of the reflected light may be reduced,” ([0033]). Therefore, it would have been obvious to the ordinary artisan at the effective time of filing to combine the device of Rhee with the overlying layers of Tsai to reduce or avoid reflections of ambient light. With regard to claim 13, Tsai teaches, in Fig 4, a radiant heat blocking layer (320) stacked on the ultra-low reflection layer to block near-infrared and far-infrared rays. With regard to claim 14, Tsai teaches, in Fig 4, that the protective layer has a plurality of diffuse reflection protrusions (302) formed on a surface thereof. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAJ R GUPTA whose telephone number is (571)270-5707. The examiner can normally be reached 9:30AM-4PM, 8PM-10PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 5712721236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RAJ R GUPTA/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Apr 04, 2023
Application Filed
Aug 10, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
69%
Grant Probability
82%
With Interview (+13.4%)
3y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 629 resolved cases by this examiner. Grant probability derived from career allowance rate.

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