DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on September 4, 2025 is being considered by the examiner.
Response to Arguments
Applicant’s arguments, per page 7, filed October 27, 2025, with respect to the title have been fully considered and are persuasive. The objection of August 26, 2025 has been withdrawn.
Applicant’s arguments, per page 7, filed October 27, 2025, with respect to claim 2 have been fully considered and are persuasive. The 112 rejection of August 26, 2025 has been withdrawn.
Applicant’s arguments, per page 7, filed October 27, 2025, with respect to claim 1 have been fully considered and are persuasive. The rejection of August 26, 2025 has been withdrawn.
Applicant's arguments filed October 27, 2025 have been fully considered but they are not persuasive. Regarding newly added claim 22, applicant asserts that the prior art of record Yang (US 2013/0134492) does not disclose that the storage layer 152 “conformally covers a sidewall of the conductive pillar 142. However, the storage layer of Yang is described as both 151 and 152, where 151 would conformally cover a sidewall of 142 as described in the updated rejection below.
Status of the Claims
Claims 11-20 are canceled. Claims 21-22 are added. No new matter is introduced. Claims 1-2 are amended. Claims 1-10 and 21-22 are present for examination.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang (US 2013/0134492). Claim 22, Yang discloses (Figs. 3D, 3G and 3I) a three-dimensional memory device, comprising: a substrate (101, substrate, Para [0078]); a stack structure (161-168/110, gates/insulating layers, Para [0087], hereinafter “stack”) disposed on the substrate (stack is disposed on 101) and comprising a plurality of alternating conductive layers (161-168) and dielectric layers (110); and a memory string structure (142/151/152, upper channel/first data storage layer/second data storage layer, Para [0101], hereinafter “string”) extending vertically through the stack structure (string extends vertically through stack), and comprising: a conductive pillar (142, upper channel, since current flows between 142 it would be conductive, Para [0091]); and a storage layer (151/152) disposed between the conductive pillar (142) and the stack structure (151/152 laterally between 142 and stack) and surrounding the conductive pillar (151/152 surrounds 142), wherein the storage layer (151/152) comprises a plurality of first protruding portions (152 considered protruding portions) filling first recesses respectively at interfaces between the conductive layers and the dielectric layers (152 fills recesses at interfaces between 161-168 and 110), wherein the storage layer (151/152) conformally covers a sidewall of the conductive pillar (151 conformally covers a sidewall of 143 of 142 which is labeled in Fig. 3D) and directly contacts sidewalls, top surfaces and bottom surfaces of the dielectric layers (as can be seen in Fig. 3G, 152 directly contacts outer sidewalls of 110, top and bottom surfaces of 110).
Allowable Subject Matter
Claims 1-10 and 21 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: The following is an examiner’s statement of reasons for allowance: the closest prior art of record, Yang (US 2013/0134492), Komori (US 2012/0211820), Jeong (US 2010/0320528), Son (US 2011/0147724), Kim (US 2011/0303970), Yasuda (US 2008/0237688), fail to disclose (by themselves or in combination) the following limitations in combination with the rest of the claim:
Regarding Claim 1 (from which claims 2-10 depend), wherein the storage layer comprises a plurality of first protruding portions filling first recesses respectively at interfaces between the conductive layers and the dielectric layers, wherein the conductive layers and the dielectric layers are in direct contact with each other at the interfaces.
Regarding Claim 21, the conductive pillar comprise tungsten, the interfacial layers comprise tungsten silicide…
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO G RAMALLO whose telephone number is (571)272-9227. The examiner can normally be reached Monday-Friday 10am - 6pm.
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/G.G.R/Examiner, Art Unit 2812 /William B Partridge/Supervisory Patent Examiner, Art Unit 2812