Prosecution Insights
Last updated: May 29, 2026
Application No. 18/140,388

POTTED ELECTRONIC CIRCUIT

Final Rejection §103
Filed
Apr 27, 2023
Priority
May 06, 2022 — DE 10-2022-111-320.5
Examiner
HIBBERT, DANIEL JOHNATHAN
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semikron Elektronik GmbH &Co Kg
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
14 granted / 16 resolved
+19.5% vs TC avg
Strong +22% interview lift
Without
With
+22.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
10 currently pending
Career history
42
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
74.7%
+34.7% vs TC avg
§102
15.5%
-24.5% vs TC avg
§112
5.6%
-34.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 16 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments made in Amendment The objections to claims 1 and 8 have been overcome by amendment. The amendment fixed a missing determiner (“that” or alike) in claim 1, and the cancelation of claim 8 are persuasive in overcoming the objections. Therefore, the objections to claims 1 and 8 have been withdrawn. The arguments to the 35 U.S.C. § 112(b) rejections of claims 2-6, and 11 found in pages 7-12 of “Arguments/Remarks Made in an Amendment” filed 01/09/2026. Applicant has either amended the claim to fix issues pointed out by examiner or canceled the claim outright. Therefore, all previous 35 U.S.C. § 112(b) rejections of claims 2-6, and 11 have been properly overcome and as such the rejections have been withdrawn. Regarding the 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 103 rejections of claims 1-15, applicants’ arguments on pages 7-12 in “Arguments/Remarks Made in an Amendment” filed 01/09/2026. The 35 U.S.C. § 102(a)(1) rejection of claim 1 by Waltrich fail to anticipate every limitation of the now amended claim 1. Examiner has fully considered the arguments presented in amendment and finds the arguments made in amendment persuasive. Therefore, the rejection has been withdrawn. The arguments against the 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 103 rejections of claims 4, 5, 12, and 14 have all been considered and are persuasive because at least the new limitations moved into claim 1 no longer make their previous rejection proper. However, upon further consideration, a new ground(s) of rejection is made to each of claims 1, 4, 5, 12, and 14 in response to the new limitations introduced in amendment. The 35 U.S.C. § 102(a)(1) and 35 U.S.C. § 103 rejections of the canceled claims 2-3, 6-11, 13, and 15 have all be withdrawn. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, 12, and 14 are rejected under 35 U.S.C. 103 as being unpatentable as obvious by United States Patent Application Publication by Waltrich (US 20210100091 A1; Waltrich) in view of Chinese Patent by Hotta et al. (CN 107083027 A; Hotta) and further in view of United States Patent Application Publication by Pfefferlein (US 20200381370 A1; Pfefferlein). Regarding Claim 1, Waltrich discloses an electronic circuit, comprising a circuit carrier (1), wherein: said circuit carrier (1) further comprises: a metal layer (2) and an electrically insulating base layer (1.1) on the metal layer (2); a plurality of conductor tracks (1.2) is arranged on the base layer (1.1) and a plurality of electronic components (3/4) are arranged on the conductor tracks (1.2); the plurality of conductor tracks (1.2) and the electronic components (3/4) are covered using a potting compound (7); a separating layer (8) that is an electrically insulating material that is also an elastic material (Waltrich discloses the electronic circuit, the separating layer (8) consists of elastic material that is a polyimide film. While polyimide films are not known for being exclusively soft, they are still relatively soft when compared to alternate solutions as polyimide films are bendable and can be shaped. Under broadest reasonable interpretation, it would be reasonable to say that the separating layer in Waltrich does disclose that it is an elastic/soft layer, relatively) and also is different from both a base layer material of the base layer (1.1) and the potting compound (7) (While the separating layer is not different then the base layer 1.1, it is different than the plotting compound 8. Thus, it can be understood that it is different from base layer and plotting compound); and said separating layer (8) is arranged in the areas between the conductor tracks (Fig. 3, where it is longitudinally between the conductor tracks) and between the base layer (1.1) and the potting compound (8) (See fig 3, Where the separating layer is above base layer 1.1 and below plotting compound 8); the separating layer (8) has a thickness that is less than a height of the respective conductor tracts (1.2) (Para. 22, where the metallization layer [conductor tracks], may be filled up to its height or less with the separation layer 8; the separating layer (8) consists of a material wetting the base layer (1.1) and the conductor tracks (1.2) (Waltrich uses polyimide as the material for the separating which is deposited as a liquid. The instant application in para. 18, even says that the “wetting property applies at least for the state upon application of the still free-flowing - at this point in time - separating layer”. Therefore, it is reasonable that the polyimide that Waltrich disposes can be considered “wetting” as it is also liquid at the point of dispensing); the separating layer (8) is applied on the base layer (1.1), to sides of respective conductor tracks (1.2), and not to a top of respective conductor tracks (1.3) (See Fig. 3, where separating layer 8 is disposed on the side of the conductor tracks 1.2 but not on not on top of the conductor tracks or on top of the plurality of electronic components 3/4); the separating layer (8) is arranged between the base layer (1.1) and the potting compound (7) between the conductor tracks (1.2) and an edge of the base layer (1.1) (Notably, from a top-down perspective, the separating layer can be seen as between the base layer and the plotting compound, and between the conductor tracks and an edge of the base layer (Figs 3 & 5); Waltrich also discloses that the potting compound is a hard potting compound (The softness or hardness is a relative term of degree and without definition in this application. Potting compound hardness is not an absolutely property. It is stypically measured in Shore A or Shore D. However, it without context or comparison, one potting compound can be seen as “soft” in view of a much harder potting compound and the same potting compound can be seen as “hard” in view of a softer potting compound. It is not unreasonable to interpret the potting compound in Waltrich as a hard potting compound.). Waltrich fails to disclose that the hard potting compound is a hard epoxy resin that contains filler particles made of one of silicon dioxide, antimony trioxide, or boron nitride. However, Hotta discloses potting layers that can be made of oxazine resin composition with fill materials that can be silicon dioxide, antimony trioxide, or boron nitride. Accordingly, before the effective filling date of the invention, it would have been obvious to one having ordinary skill in the art to select a potting that contains filler particles made of one of silicon dioxide, antimony trioxide, or boron nitride., since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. See MPEP § 2144.07 (citing In re Leshin, 277 F.2d 197 (C.C.P.A. 1960)). One would be motivated make the choice over other materials depending on manufacturing considerations such as cost of materials or time it takes to process the layer. The combination of Waltrich and Hotta fails to explicitly disclose wherein base layer is a hard epoxy resin that contains filler particles made of aluminum oxide. However, Pfefferlein discloses a base layer (Pfefferlein: 8) containing filler particles made of aluminum oxide (Pfefferlein: Para. 37, “he layers 8, 10 each comprise a dielectric material 12 designed as a ceramic plate, wherein the ceramic plate is produced, for example, from aluminum oxide and/or aluminum nitride having a thickness of 250 μm to 1 mm”). Accordingly, before the effective filling date of the invention, it would have been obvious to one having ordinary skill in the art to select a base layer that contains filler particles made of aluminum oxide, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. See MPEP § 2144.07 (citing In re Leshin, 277 F.2d 197 (C.C.P.A. 1960)). One would be motivated make the choice over other materials depending on manufacturing considerations such as cost of materials or time it takes to process the layer. Regarding Claim 5, the combination of Waltrich, Hotta, and Pfefferlein disclose the electronic circuit, according to claim 1 wherein; the separating layer is at least one of an epoxy lacquer, an acrylate, a polyurethane, and a polyurethane resin (Waltrich: Para. 39 where “The insulation layer 1.1 is a polyimide film” and Para. 42, “the second potting compound 8 is composed of the same material as the insulation layer 1.1.” Where a polimide film is a type of epoxy). Regarding Claim 12, the combination of Waltrich, Hotta, and Pfefferlein disclose the electronic circuit, according to claim 1, and further wherein; a spacing distance between respective conductor tracks is at least as great as a height of the respective conductor tracks (Waltrich: See Fig 5, where the distance between the conductor tracks is greater than its height). Regarding Claim 14, the combination of Waltrich, Hotta, and Pfefferlein disclose the electronic circuit, according to claim 1, and further wherein a distance of the respective conductor tracks from an edge of the base layer is at least as great as the height of the conductor tracks (Waltrich: See Fig 5, where the distance between an edge of the base layer and the respective conductor tracks is greater than the conductor tracks height). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over the obvious combination of Waltrich, Hotta, and Pfefferlein as applied to claim 1 above, and further in view of United States Patent Application Publication by Kutchko et al. (US 20220126516 A1). Regarding Claim 4, the combination of Waltrich, Hotta, and Pfefferlein disclose the electronic circuit, according to claim 1. However, the combination fails to disclose explicitly disclose the hardness or the dielectric strength of the separating layer. However, Kutchko discloses the use of a separation layer (coreactive composition) with a hardness a hardness between 5 and 70 Shore A (Para. 115, 127, 268); and the separating layer (11) has a dielectric strength between 1 kV/mm and 5 kV/mm (Para. 269). Accordingly, before the effective filling date of the invention, it would have been obvious to one having ordinary skill in the art to select separating layer, notably made of thermosetting resin, with a desired hardness in Shore A and a dielectric strength. See MPEP § 2144.07 (citing In re Leshin, 277 F.2d 197 (C.C.P.A. 1960)). One would be motivated make the choice over other materials depending on manufacturing considerations such as desire of specific hardness, dielectric strength, cost of materials or time it takes to process the layer. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL J HIBBERT whose telephone number is (703)756-1562. The examiner can normally be reached Monday - Friday 8am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571) 272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL J HIBBERT/Examiner, Art Unit 2899 /ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
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Prosecution Timeline

Apr 27, 2023
Application Filed
Jul 09, 2025
Non-Final Rejection mailed — §103
Jan 09, 2026
Response Filed
May 19, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+22.2%)
3y 4m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 16 resolved cases by this examiner. Grant probability derived from career allowance rate.

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