Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1- are rejected under 35 U.S.C. 103 as unpatentable over U.S. Pat. Pub. No. 20020185665 to Kuhara et al. (Kuhara) in view of U.S. Pat. Pub. No. 20010002120 to Bessendorf et al. (Bessendorf).
Regarding Claim 1, Kuhara teaches an optoelectronic semiconductor structure, comprising:
a first-type N semiconductor substrate 1/21/22, having a top surface (facing up on page);
a second-type P semiconductor light-receiving region 12; and
a second-type semiconductor conduction region 6, disposed on said top surface of said first-type semiconductor substrate, used for conducting a photocurrent, said second-type semiconductor light-receiving region surrounding said second-type semiconductor conduction region, and said second-type semiconductor conduction region and said second-type semiconductor light-receiving region spaced by a distance (see Figs. 7-8).
Kuhara does not explicitly teach a bias gate layer, covering said top surface of said first-type semiconductor substrate, and located between said second-type semiconductor light-receiving region and said second-type semiconductor conduction region.
However, in analogous art, Bettendorf teaches a bias gate 200 similarly situated. It would have been obvious to the person of ordinary skill in the art before the time of filing to include the teaching of Bettendorf to better control current, as taught by Bettendorf throughout.
Regarding Claim 2, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, wherein said second-type semiconductor light-receiving region surrounds or partially surrounds said second-type semiconductor conduction region (see Figs. 7-8).
Regarding Claim 3, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, wherein
said first-type semiconductor substrate includes a spacer part;
the inner side of said spacer part surrounds or partially surrounds said second-type semiconductor conduction region; and
the outer side of said spacer part is adjacent to said second-type semiconductor light-receiving region (gap between 6 and 12 defines a spacer).
Regarding Claim 9, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, wherein said second-type semiconductor light-receiving region is disposed on said top surface of said first-type semiconductor substrate (see Figs. 7-8).
Regarding Claim 14, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, but does not explicitly teach that said second-type semiconductor conduction region is coupled to an analog-to-digital converter. Kuhara does teach in Fig. 12 coupling the output of the detector to an amplifier 28. It would further be obvious to digitize this output in order to more easily manipulate the output data.
Regarding Claim 15, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, wherein said second-type semiconductor light-receiving region is a second-type semiconductor well, and said second-type semiconductor conduction region is a second-type semiconductor with high doping concentration (10^19, [0058]).
Regarding Claim 16, Kuhara teaches the optoelectronic semiconductor structure of claim 1, but does not explicitly teach that the concentration of ions implanted into said second-type semiconductor conduction region is higher than the concentration of ions implanted into said second-type semiconductor light-receiving region. Kuhara is silent regarding dopant concentrations other than that it is “high.” The person of ordinary skill having the benefit of Kuhara is thus motivated to experiment with various dopant concentrations in the various regions to optimize and best practice the invention of Kuhara and my readily arrive at such an arrangement.
Regarding Claim 18, Kuhara and Bettendorf teach the optoelectronic semiconductor structure of claim 1, wherein when said first-type semiconductor substrate is n-type, said photocurrent includes the holes flowing from said second-type semiconductor light-receiving region to said second-type semiconductor conduction region via said first-type semiconductor substrate (see Figs. 7-8).
Regarding Claim 17, Kuhara teaches the optoelectronic semiconductor structure of claim 1, but does not explicitly teach that when said first-type semiconductor substrate is p-type, said photocurrent includes the photoelectrons flowing from said second-type semiconductor light-receiving region to said second-type semiconductor conduction region via said first-type semiconductor substrate. Kuhara teaches the inverse dopant scheme. Forming the required PN junctions taught by Kuhara throughout may be formed with either dopant scheme and are obvious variants.
Allowable Subject Matter
Claim 10 is allowed.
The following is an examiner’s statement of reasons for allowance: the cited prior art does not teach a shelter layer in context with the remaining elements of Claim 10.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claims 11 and 12 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims for the same reason as Claim 10.
Conclusion
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/EVREN SEVEN/Primary Examiner, Art Unit 2812
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