DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings were received on 6.22.2026. These drawings are unacceptable. The drawings are not entered because of noncompliance with 37 CFR 1.121(d).
Applicant is required to submit a marked-up copy of each Replacement Sheet including annotations indicating the changes made to the previous version. The marked-up copy must be clearly labeled as “Annotated Sheets” and must be presented in the amendment or remarks section that explains the change(s) to the drawings. See 37 CFR 1.121(d)(1). Failure to timely submit the proposed drawing and marked-up copy will result in the abandonment of the application.
In addition, per 37 CFR 1.121(d)(2), “(2) A marked-up copy of any amended drawing figure, including annotations indicating the changes made, must be provided when required by the examiner” wherein, the examiner is hereby requiring submission of said marked-up copies.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 7-9 and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsuchiko (US 20130069154 A1).
Regarding claim 1, Tsuchiko discloses an integrated circuit (Figs. 2 and 14) comprising:
a first epitaxial layer (16) having a first conductivity type (P, [0017]) over a semiconductor substrate (14) having a top surface;
a second epitaxial layer (18) having (partly) the first conductivity type (P in 148, [0020]) over the first epitaxial layer;
a first doped region (136) having a different second conductivity type (N, [0020]) between and extending into the semiconductor substrate (14) and the first epitaxial layer (16);
a second doped region (134) having the second conductivity type (N, [0020]) between and extending into the first epitaxial layer (16) and the second epitaxial layer (18. See Fig. 10: 134 extends into 18);
a well region (126/156) having the first conductivity type (P, [0020], [0033]) extending from a top surface of the second epitaxial layer (18) into the second epitaxial layer over the first doped region (136); and
an active device (LDMOS) formed over or in the well region over the first doped region (Figs. 2 and 14).
Regarding claim 7, Tsuchiko discloses the integrated circuit of claim 1, wherein the active device is a transistor (Fig. 14).
Regarding claim 8, Tsuchiko discloses the integrated circuit of claim 1, wherein the active device includes an LDMOS transistor (Fig. 14).
Regarding claim 9, Tsuchiko discloses the integrated circuit of claim 1, wherein the first conductivity type is P-type and the second conductivity type is N-type ([0017], [0020], [0033]).
Regarding claim 23, Tsuchiko discloses (Fig. 16) an integrated circuit comprising:
a first epitaxial layer (16) having a first conductivity type (P) over a semiconductor substrate (14) having a top surface;
a second epitaxial layer (18) over the first epitaxial layer;
a first doped region (136) having a different second conductivity type (N) between and extending into the semiconductor substrate (14) and the first epitaxial layer (16);
a second doped region (134) having the second conductivity type (N) between and extending into the first epitaxial layer (16) and a portion (137) of the second epitaxial layer (18) having the first conductivity type (“137 is provided as a deep P-well”; 137 is part of 18, and, 134 extends into 16 and 137 per Fig. 16);
a well region (156) having the first conductivity type (P) extending from a top surface of the second epitaxial layer (18) into the second epitaxial layer over the first doped region; and
an active device (LDMOS) formed over or in the well region over the first doped region (Fig. 16).
Allowable Subject Matter
Claims 2-6 and 24-26 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 10-14 and 21-22 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, the prior art of record fails to disclose or suggest wherein the second doped region has a higher average dopant concentration than does the first doped region.
Regarding claim 3, the prior art of record fails to disclose or suggest wherein a portion of the first epitaxial layer between the first and second doped regions has an unmodified dopant concentration.
Regarding claim 4, the prior art of record fails to disclose or suggest wherein the first doped region is spaced apart from the top surface of the second epitaxial layer by a first distance and merges with a third doped region having the second conductivity type that is laterally spaced apart from the first doped region and vertically spaced apart from the top surface by a lesser second distance; claims 5-6 depend from claim 4.
Regarding claim 10, the prior art of record fails to disclose or suggest a second P-type epitaxial layer extending between the first P-type epitaxial layer and a top surface of the second P-type epitaxial layer; an unmodified portion of the first P-type epitaxial layer between the first N-type buried layer and the P-type buried layer; a second N-type buried layer extending into the first P-type epitaxial layer and laterally spaced apart from and at a same height over the semiconductor substrate as the P-type buried layer; and a third N-type buried layer in the first P-type epitaxial layer between the second N-type buried layer and the semiconductor substrate as recited within the context of claim; claims 11-14 and 21-22 depend from claim 10.
With regards to independent claim 10, the closest prior art (Tsuchiko, US 20130069154 A1) discloses an integrated circuit (Figs. 1 and 16) comprising:
a first N-type buried layer (136) extending into a semiconductor substrate (14);
a first P-type epitaxial layer (16) extending from the first N-type buried layer away from the semiconductor substrate;
a P-type buried layer (137) extending into the first P-type epitaxial layer over the first N-type buried layer;
a second
a P-type well (156) in the second
a second N-type buried layer (134) extending into the first P-type epitaxial layer
a transistor formed in or over the P-type well (156, Fig. 16).
Regarding claim 24, the prior art of record fails to disclose or suggest the integrated circuit of claim 23, wherein the second doped region has a higher average dopant concentration than does the first doped region.
Regarding claim 25, the prior art of record fails to disclose or suggest the integrated circuit of claim 23, wherein a portion of the first epitaxial layer between the first and second doped regions has an unmodified dopant concentration.
Regarding claim 26, the prior art of record fails to disclose or suggest the integrated circuit of claim 23, wherein the first doped region is spaced apart from the top surface of the second epitaxial layer by a first distance and merges with a third doped region having the second conductivity type that is laterally spaced apart from the first doped region and vertically spaced apart from the top surface by a lesser second distance.
Response to Arguments
Applicant's arguments filed 6.22.2026 have been fully considered but they are not persuasive.
The applicant alleges that the prior art of record fails to disclose or suggest “a second epitaxial layer having the first conductivity type over the first epitaxial layer” as recited within claim 1 because the examiner’s position of Tsuchiko (US 20130069154 A1) disclosing (Figs. 2 and 14) a second epitaxial layer (18) having (partly) the first conductivity type (P in 148, [0020]) over the first epitaxial layer is improper.
In support of applicant’s position, the applicant alleges “Independent Claim 1 recites, inter alia, that both the first and second epitaxial layers have the same first conductivity type (e.g., P-type). In contrast, Tsuchiko explicitly teaches that the first epitaxial layer (layer 16) is P-type, while the second epitaxial layer (layer 18) is N-type. (See Tsuchiko at [0017]). The Office Action asserts that epitaxial layer 18 is "partly" P-type merely because a P-well 148 is formed inside it (Office Action, p. 2), and that Tsuchiko therefore satisfies the claimed limitation. The Applicant respectfully traverses this rejection”, “Here, the Examiner's interpretation represents an impermissible "broadest possible" interpretation that defies the understanding of a person of ordinary skill in the art (PHOSITA). In the field of semiconductor fabrication, a PHOSITA can distinguish between the baseline conductivity type of an epitaxial layer as originally grown and a distinct, localized doped region (such as a well) subsequently formed within it. A localized implant modifies electrical characteristics in a specific zone, but it does not structurally transform the surrounding, underlying matrix of the N-type epitaxial layer into a P-type epitaxial layer”, and, “Because Tsuchiko's epitaxial layer 18 remains structurally and definitionally an N-type layer outside of the localized P-well 148, Tsuchiko fails to teach or suggest a second epitaxial layer having the claimed first (P-type) conductivity type. To conflate a localized implant region with the overarching epitaxial layer violates the boundaries of reasonableness established in Cortright. Accordingly, Tsuchiko fails to meet each and every feature of Claim 1, and the rejection should be withdrawn”.
The examiner acknowledges the applicant’s arguments but notes that “a second epitaxial layer having the first conductivity type…” as recited in claim 1 does not explicitly state that an entirety of the second epitaxial layer has the first conductivity type. The examiner treats “having the first conductivity type” as including portions thereof of said “second epitaxial layer” because said interpretation is not precluded by the claim.
Hence, applicant arguments are not persuasive and Tsuchiko (US 20130069154 A1) discloses(Figs. 2 and 14) a second epitaxial layer (18) having (partly) the first conductivity type (P in 148, [0020]) over the first epitaxial layer is improper.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/Primary Examiner, Art Unit 2818
Prosecution Insights