Prosecution Insights
Last updated: April 19, 2026
Application No. 18/141,466

Vector Gather with a Narrow Datapath

Final Rejection §112
Filed
Apr 30, 2023
Examiner
VICARY, KEITH E
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Sifive Inc.
OA Round
6 (Final)
58%
Grant Probability
Moderate
7-8
OA Rounds
3y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allow Rate
393 granted / 683 resolved
+2.5% vs TC avg
Strong +41% interview lift
Without
With
+41.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
41 currently pending
Career history
724
Total Applications
across all art units

Statute-Specific Performance

§101
8.7%
-31.3% vs TC avg
§103
34.0%
-6.0% vs TC avg
§102
12.0%
-28.0% vs TC avg
§112
37.6%
-2.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 683 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-19 are pending in this office action and presented for examination. Claims 1, 9, and 16-17 are newly amended by the response received January 2, 2026. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation “the other indices stored in the first operand buffer that point to the elements of the vector of source data stored in the second operand buffer” in lines 20-22. However, there is insufficient antecedent basis for this limitation in the claims. Note that while claim 1 recites the limitation “check whether other indices stored in the first operand buffer point to elements of the vector of source data stored in the second operand buffer” in lines 17-18, this limitation of lines 17-18 does not convey that these other indices stored in the first operand buffer were all determined, via the check, to point to elements of the vector of source data stored in the second operand buffer. It is further indefinite, in view of the aforementioned limitations, as to whether “other indices” is intended to refer to a) other indices that are checked (but not necessarily determined to point to elements of the vector of source data stored in the second operand buffer); b) other indices that are both checked and determined to point to elements of the vector of source data stored in the second operand buffer; or c) something else. It is further indefinite as to whether the aforementioned limitations are conveying that all of the checked other indices are determined to point to elements of the vector of source data stored in the second operand buffer. It is further indefinite as to whether the limitation of lines 20-22 precludes the claim from encompassing, within its metes and bounds, the scenario wherein no checked other indices are determined to point to elements of the vector of source data stored in the second operand buffer. Note that the limitation “the other indices” is further recited in claim 1, line 24, and claim 1, line 26. Claims 2-8 are rejected for failing to alleviate the rejection of claim 1 above. Claim 9 recites the limitation “copying a plurality of elements stored in the second operand buffer that are pointed to by the first index and the other indices stored in the first operand buffer” in lines 11-13. However, it is indefinite, in view of the aforementioned limitation as well as the limitation “checking whether other indices stored in the first operand buffer point to elements of the vector of source data stored in the second operand buffer” in claim 9, lines 9-10, as to whether “other indices” is intended to refer to a) other indices that are checked (but not necessarily determined to point to elements of the vector of source data stored in the second operand buffer); b) other indices that are both checked and determined to point to elements of the vector of source data stored in the second operand buffer; or c) something else. It is further indefinite as to whether the aforementioned limitations are conveying that all of the checked other indices are determined to point to elements of the vector of source data stored in the second operand buffer. It is further indefinite as to whether the limitation of lines 11-13 precludes the claim from encompassing, within its metes and bounds, the scenario wherein no checked other indices are determined to point to elements of the vector of source data stored in the second operand buffer. Note that the limitation “the other indices” is further recited in claim 9, line 15, and claim 9, line 17. Claims 10-15 are rejected for failing to alleviate the rejection of claim 9 above. Claim 16 recites the limitation “copy a plurality of elements stored in the second operand buffer that are pointed to by the b bits of the vector of indices stored in the first operand buffer to the third operand buffer” in lines 22-23. However, it is indefinite as to whether “a plurality of elements” of the aforementioned limitation is the same as, or different from, the w elements of the limitation “read b bits of a vector of source data stored in the vector register file into the second operand buffer via the datapath, wherein the b bits of the vector of source data encode w elements of the vector of source data” in claim 16, lines 14-16. Relatedly, it is indefinite as to whether the limitation of lines 22-23 is necessitating that all indices represented by the b bits of the vector of indices point to the plurality of elements stored in the second operand buffer that are pointed to, or whether the limitation of lines 22-23 encompasses the possibility that not all indices represented by the b bits of the vector of indices point to the plurality of elements stored in the second operand buffer that are pointed to. Claims 17-19 are rejected for failing to alleviate the rejection of claim 16 above. Response to Arguments Applicant on page 8 argues: ‘Applicant has amended claims 1 and 9 to replace the ambiguous phrasing with "the first index and the other indices". This language provides a clear and direct link to the specific indices introduced in the preceding claim elements: The "first index" refers back to the index used to fetch the element in the "read b bits... source data" step. The "other indices" refers back to the indices scanned in the "check whether other indices..." step. Similarly, Applicant has amended claim 16 to recite copying elements pointed to by "the b bits of the vector of indices". This explicitly references the bits read in the first step of the claim ("read b bits of a vector of indices"), resolving the ambiguity regarding which indices control the copy operation.’ In view of the language deleted from amended claims 1, 9, and 16, the indefinite rejections directed to that now-deleted language are withdrawn. Applicant on page 9 argues: ‘The Office Action noted that the recitation of "the b bits" was indefinite because the claims introduced two different sets of "b bits" (one for indices, one for source data). Applicant has amended claims 9 and 16 to recite "wherein the b bits of the vector of source data encode w elements". This amendment distinguishes the source data bits from the index bits, resolving the ambiguity.’ In view of the aforementioned amendments, the associated previously presented indefinite rejections are withdrawn. Applicant on page 9 argues: ‘Applicant has amended claim 16 to recite checking the vector length and maximum index range "that are stored in the one or more control status registers". This grammatical correction clarifies that the circuitry checks the values held within the previously defined registers.’ In view of the aforementioned amendment, the associated previously presented indefinite rejections are withdrawn. Applicant on page 9 argues: ‘Furthermore, regarding claim 17, Applicant has amended the claim to recite "responsive to the checked vector length... and the checked maximum index range". This aligns the terminology with the "check" step in claim 16 and resolves the ambiguity regarding the reference.’ In view of the aforementioned amendment, the associated previously presented indefinite rejections are withdrawn. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEITH E VICARY whose telephone number is (571)270-1314. The examiner can normally be reached Monday to Friday, 9:00 AM to 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at (571)270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEITH E VICARY/ Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Apr 30, 2023
Application Filed
Aug 16, 2024
Non-Final Rejection — §112
Sep 26, 2024
Response Filed
Oct 04, 2024
Final Rejection — §112
Jan 09, 2025
Request for Continued Examination
Jan 13, 2025
Response after Non-Final Action
Mar 07, 2025
Non-Final Rejection — §112
Jun 03, 2025
Response Filed
Jun 18, 2025
Final Rejection — §112
Sep 04, 2025
Response after Non-Final Action
Sep 18, 2025
Request for Continued Examination
Oct 05, 2025
Response after Non-Final Action
Oct 31, 2025
Non-Final Rejection — §112
Jan 02, 2026
Response Filed
Jan 29, 2026
Final Rejection — §112
Apr 01, 2026
Interview Requested
Apr 09, 2026
Examiner Interview Summary
Apr 09, 2026
Response after Non-Final Action
Apr 09, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

7-8
Expected OA Rounds
58%
Grant Probability
99%
With Interview (+41.2%)
3y 8m
Median Time to Grant
High
PTA Risk
Based on 683 resolved cases by this examiner. Grant probability derived from career allow rate.

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