Tech Center 2100 • Art Units: 2100 2182 2183 2199
This examiner grants 58% of resolved cases
Keith E. Vicary is an examiner in Tech Center 2100 with 698 resolved cases. His allowance rate of 57.7 percent reflects a balanced approach to examination in Art Unit 2100. The median days to allowance is 1423, indicating that successful applications often face a longer prosecution timeline before a grant is issued. This duration suggests that multiple rounds of prosecution may be common.
The interview lift for this examiner is a substantial 40.3 percent. This high lift suggests that direct engagement is exceptionally effective at moving cases toward allowance. Given the 57.7 percent base allowance rate, an interview can significantly improve the probability of success. For the 698 resolved cases on record, practitioners should prioritize interviews as a primary strategy to navigate the 1423-day median path to allowance. The 40.3 percent lift is a key indicator of interview effectiveness.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 19094393 | MASKING/ZEROING PREDICATION IN PROCESSOR CIRCUITS | Non-Final OA | Apple Inc. |
| 18660925 | Multi-Instruction Packing In Single Instruction Slot | Non-Final OA | Google LLC |
| 19203556 | BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES | Non-Final OA | Intel Corporation |
| 18661103 | APPARATUSES AND METHODS FOR SPECULATIVE EXECUTION SIDE CHANNEL MITIGATION | Final Rejection | Intel Corporation |
| 18478882 | MEMORY SAFETY USING TAG CHECKING INSTRUCTIONS AND ISLANDS OF TAGS IN LINE WITH BUCKETED DATA | Final Rejection | Intel Corporation |
| 18193232 | INSTRUCTIONS FOR WRITE AND/OR READ OF CONTROL AND/OR STATUS REGISTERS | Final Rejection | INTEL CORPORATION |
| 17957969 | DEVICE, METHOD AND SYSTEM TO DETERMINE A MODE OF PROCESSOR OPERATION BASED ON PAGE TABLE METADATA | Non-Final OA | Intel Corporation |
| 17712118 | SYNCHRONOUS MICROTHREADING | Non-Final OA | Intel Corporation |
| 17708933 | CONTROL REGISTER SET TO FACILITATE PROCESSOR EVENT BASED SAMPLING | Final Rejection | Intel Corporation |
| 17484840 | CIRCUITRY AND METHODS FOR ACCELERATING STREAMING DATA-TRANSFORMATION OPERATIONS | Non-Final OA | Intel Corporation |
| 17463390 | BFLOAT16 CLASSIFICATION AND MANIPULATION INSTRUCTIONS | Final Rejection | Intel Corporation |
| 18326202 | DEVICE AND METHOD OF DETECTING STRIDE ACCESS BASED ON PREDICTED ADDRESS FOR HARDWARE PREFETCH USED FOR CACHE MEMORY | Final Rejection | Fujitsu Limited |
| 19210296 | BRANCH PREDICTION USING SPECULATIVE INDEXING AND INTRALINE COUNT | Non-Final OA | INTERNATIONAL BUSINESS MACHINES CORPORATION |
| 18680032 | PHYSICAL REGISTER DEALLOCATION IN A PROCESSING SYSTEM | Non-Final OA | International Business Machines Corporation |
| 18096115 | Sorting Method and Control for Partially Ordered Data Arrays in Embedded Systems | Non-Final OA | SK hynix Inc. |
| 19206182 | SECURING REGISTERS ACROSS SECURITY ZONES | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 19049097 | PIPELINE PROTECTION FOR CPUS WITH SAVE AND RESTORE OF INTERMEDIATE RESULTS | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18958042 | PROCESSOR WITH INSTRUCTION CONCATENATION | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 16422754 | VECTOR FLOATING-POINT SCALE | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18926133 | GATHER ACCELERATED ADDRESS SPACE | Non-Final OA | NVIDIA Corporation |
| 18789957 | PROCESSING DATA USING ACCELERATORS IN A SYSTEM ON A CHIP | Final Rejection | NVIDIA Corporation |
| 19142401 | PROCESSOR WITH DELAYED INSTRUCTION PIPELINE FLUSH | Non-Final OA | Rivos Inc. |
| 18619392 | WAVE LEVEL MATRIX MULTIPLY INSTRUCTIONS | Non-Final OA | Advanced Micro Devices, Inc. |
| 18390821 | ACCUMULATION APERTURES | Final Rejection | Advanced Micro Devices, Inc. |
| 19053672 | FETCH QUEUE POPULATION | Final Rejection | Arm Limited |
| 18731006 | UNALIGNED LOAD AND STORE IN A CORE | Non-Final OA | XILINX, INC. |
| 18714604 | DECODING METHOD, PROCESSOR, CHIP, AND ELECTRONIC DEVICE | Final Rejection | Hygon Information Technology Co., Ltd. |
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