DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of species A, reflected in claims 1-2 and 5-7 in the reply filed on 12/23/2025 is acknowledged. Claims 3-4, 8-18 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 5 recites the limitation "the insulating" in line 6. There is insufficient antecedent basis for this limitation in the claim. For examination purpose, the limitataion "the insulating" will be replaced by "the insulating member"
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (US 20230076238 A1, hereinafter Kim‘238).
Regarding independent claim 1, Kim‘238 teaches, “A method of manufacturing a semiconductor device including a semiconductor element formed in each of a plurality of element regions defined in a semiconductor substrate (fig. 1-10; ¶ [0027] - ¶ [0113]), comprising steps of: preparing the semiconductor substrate (‘W’ in fig. 4, ‘1’ in fig. 5A) having a main surface; defining a plurality of scribe regions (SR) in the main surface of the semiconductor substrate (W, 1), the plurality of scribe regions (SR) including a plurality of first scribe regions (see annotated fig. 4) each extending in a first direction (Y) and arranged to be spaced apart from each other in a second direction (X) intersecting the first direction (Y); forming the semiconductor element (‘a shallow isolation pattern, memory cells, capacitors, and the like’, ¶ [0029]) in each of the plurality of element regions (DR) defined in a matrix form by the plurality of scribe regions (SR); and obtaining the plurality of element regions (DR) in each of which the semiconductor element is formed, as a semiconductor chip, by cutting each of the plurality of scribe regions (SR) with a dicing blade (fig. 5J; ¶ [0091]), wherein the step of forming the semiconductor element includes steps of: forming a first trench (TSV, fig. 5J) in each of the plurality of element regions (DR), and forming a trench group comprised of a plurality of second trenches (GR1, fig. 5D and TR1, H1 in fig. 5J) in each of the plurality of first scribe regions (SR); and evaluating the trench group (fig. 5J, ¶ [0091] and fig. 9B, ¶ [0103]), wherein the step of forming the trench group (annotated fig. 5J) comprised of the plurality of second trenches includes a step of forming a second-trench-first portion (see annotation) in a first region (see annotation) of one of the plurality of first scribe regions to be removed by the dicing blade, and forming a second-trench-second portion (see annotation) in a second region (see annotation) of the one of the plurality of first scribe regions, the second region being located between the first region of the one of the plurality of first scribe regions and one of the plurality of element regions, and the one of the plurality of element regions (DR) being adjacent to the one of the plurality of first scribe regions (SR) including the first region, and wherein, in plan view, the second-trench-second portion is formed in a bar shape (fig.5J with fig. 4, the boundary of the second-trench-second portion in Y-direction can be drawn to have a bar shape) extending in the first direction (Y) in which each of the plurality of first scribe regions extends”.
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Regarding claim 2, Kim‘238 further teaches, “The method of manufacturing the semiconductor device according to claim 1, wherein the second-trench-first portion has a first length in the first direction (X), and wherein the second-trench-second portion is formed to have a second length equal to or larger than the first length in the first direction (X) (boundary of the second-trench-first portion and the second-trench-second portion can be drawn to have equal length in first direction (X))”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kim‘238 as applied to claim 1 above, and further in view of Kuroki (JP 2006339481 A, hereinafter Kuroki‘481).
Regarding claim 6, Kim‘238 teaches all the limitations described in claim 1.
But Kim‘238 is silent upon the provision of wherein, in the step of forming the semiconductor element, each of the trench group and the first trench is formed to have a depth of at least 1.0 µm.
However, Kuroki teaches trenches (28, fig. 2C, 3C) formed in the scribe region (22) has a depth of 500 µm.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Kim‘238 and Kuroki to form the trenches with claimed dimension according to the teachings of Kuroki with a motivation of shortening the time required for the dicing process compared to the conventional method as described Kuroki in ‘TECH-PROBLEM’ and ‘TECH-SOLUTION’.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Kim‘238 as applied to claim 1 above, and further in view of Lee et al. (US 20150294455 A1, hereinafter Lee‘455).
Regarding claim 7, Kim‘238 teaches all the limitations described in claim 1.
But Kim‘238 is silent upon the provision of wherein, in the step of evaluating the trench group, the trench group is optically evaluated.
However, Lee‘455 teaches evaluating the test patterns using optical images (¶ [0054]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Kim‘238 and Lee‘455 to use optical method to evaluate the test circuit according to the teachings of Lee‘455 as optical method provides fast and high-precision measurements.
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding dependent claim 5, the prior arts of record do not anticipate or make obvious, inter alia, the step of: “wherein after the step of evaluating the trench group, the step of forming the semiconductor element includes a step of embedding an insulating member into each of the trench group and the first trench such that the insulating member embedded into each of the trench group and the first trench member has a cavity therein.”.
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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