DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US. Pub: 2019/0214463 A1~hereinafter “Chen”) in view Kuang et al. (US. Pat: 10,084,063 B2~hereinafter “Kuang”) of record.
Regarding claim 1, Chen discloses (in at least figs. 1-7) a method for fabricating a semiconductor device, comprising: forming a fin-shaped structure (320; [0023]-[0024]) on a substrate (300; [0023]); forming a gate structure (340; [0023]) on the fin-shaped structure; forming a spacer (344; [0025]) adjacent to the fin-shaped structure (320), wherein the spacer (344) comprises a stress material ([0025]); removing part of the fin-shaped structure (320; see at least fig. 3) along a sidewall of the spacer (344) to form a recess (360; [0027]-[0028]); forming a first epitaxial layer (361; [0030]-[0031]) in the recess, wherein the first epitaxial layer (361) comprises a first protrusion (see at least figs. 3-5).
Chen does not expressly disclose a bottom surface of the first epitaxial layer comprises a first V-shape pointing directly downward, and the first epitaxial layer comprises: a neck portion above a top surface of the substrate; and a top portion above the neck portion, wherein a width of the neck portion is greater than a width of the top portion; and forming a second epitaxial layer on the first epitaxial layer.
Kuang in the same field of fabricating a semiconductor device discloses (in at least fig. 1) a bottom surface of the first epitaxial layer (52; col. 4, lines 59-60) comprises a V-shape (col. 4, lines 65-67) pointing directly downward (see at least fig. 1), and the first epitaxial layer (52) comprises: a neck portion (see at least fig. 1) above a top surface of the substrate (10); and a top portion above the neck portion (see at least fig. 1); and forming a second epitaxial layer (54) on the first epitaxial layer for the benefit of providing a semiconductor device with a more efficient electrical performance (col. 1, lines 5-8).
However, Kuang does not expressly disclose a width of the neck portion is greater than a width of the top portion.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device method of Chen with the bottom V-shape and neck teachings of Kuang, wherein a width of the neck portion is greater than a width of the top portion for the benefit of providing a semiconductor device with a more efficient electrical performance (col. 1, lines 5-8).
Also, one of ordinary skill in the art would have been led to the recited V-shape bottom surface and neck width through design choice. Applicant has not disclosed that the recited V-shape bottom and neck width are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that process would possess utility using the V-shape first epitaxial layer flat bottom surface and neck width of Chen as modified by Kuang.
Regarding claims 2 and 11, Chen discloses (in at least figs. 1-7) forming a fin-shaped structure (320) on the substrate; forming the gate structure (340); removing the fin-shaped structure (320) to form a recess (360); forming the first epitaxial layer (361) in the recess.
Regarding claims 3-4 and 12, Chen discloses (in at least figs. 1-7) forming the first protrusion (i.e. the protrusion is formed on the recess portion; see at least figs. 3-5) on one side of the first epitaxial layer (161); but is silent about forming a second protrusion on another side of the first epitaxial layer; wherein forming the first protrusion and the second protrusion at the same time.
One of ordinary skill in the art would have been led to the recited second protrusion through design choice. Applicant has not disclosed that the recited protrusion is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, and it appears prima facie that the process would possess utility using epitaxial layer arrangement of Chen. Also, one of ordinary skill in the art would consider forming the first protrusion and the second protrusion at the same time for the benefit of reducing the manufacturing steps of the device.
Regarding claims 5 and 13, Chen discloses (in at least figs. 3-5) a sidewall of the first protrusion comprises a curve.
Regarding claims 6 and 14, Chen does not expressly disclose a sidewall of the first protrusion comprises a V-shape.
However, Chen discloses (in at least figs. 3-5) a protrusion is formed on one side of the first epitaxial layer (361) comprises a curve.
One of ordinary skill in the art would have been led to the recited V-shape protrusion through design choice. Applicant has not disclosed that the recited V-shape is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, and it appears prima facie that the process would possess utility using the curve shape protrusion of Chen.
Regarding claims 7 and 15, Chen as modified by Kuang discloses (in at least fig. 1 Kuang) a bottom surface of the second epitaxial layer (54) comprises a V-shape.
Regarding claims 8 and 16, Chen as modified by Kuang discloses (in at least figs. 1-7 Chen; fig. 1 Kuang) the first epitaxial layer (361; 52) and the second epitaxial layer (54) comprise same material ([0030] Chen; col. 5, lines 17-21 Kuang).
Regarding claims 9 and 17, Chen as modified by Kuang does not expressly disclose the first epitaxial layer and the second epitaxial layer comprise same concentration.
However, Kuang discloses (in at least col. 5, lines 27-4) “the first epitaxial-grown doped layer 52 includes a germanium concentration in a range from about 10% to about 40%. The second epitaxial-grown doped layer 54 includes a germanium concentration in a range from about 25% to about 50%... The second epitaxial-grown doped layer 54 includes a germanium concentration in a range from about 40% to about 50%... The germanium concentration is adjustable to meet different requirements of strain.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to consider forming the first epitaxial layer and the second epitaxial layer of Chen as modified by Kuang with the same concentration for the benefit of reducing the manufacturing steps of the device.
Regarding claim 10, Chen discloses (in at least figs. 1-7) a semiconductor device, comprising: a fin-shaped structure (320) on a substrate (300); a shallow trench isolation (STI) (360; see at least figs. 3-5) around the fin-shaped structure; a gate structure (340) on the fin-shaped structure; a first epitaxial layer (361) adjacent to the gate structure, wherein the first epitaxial layer (361) comprises a first protrusion (see at least figs. 3-5).
Chen does not expressly disclose a bottom surface of the first epitaxial layer comprises a first V-shape pointing directly downward, and the first epitaxial layer comprises: a neck portion above top surfaces of the substrate and the STI; and a top portion above the neck portion, wherein a width of the neck portion is greater than a width of the top portion; and a second epitaxial layer on the first epitaxial layer.
Kuang in the same field of fabricating a semiconductor device discloses (in at least fig. 1) a bottom surface of the first epitaxial layer (52; col. 4, lines 59-60) comprises a V-shape (col. 4, lines 65-67) pointing directly downward (see at least fig. 1), and the first epitaxial layer (52) comprises: a neck portion (see at least fig. 1) above a top surface of the substrate (10) and the STI; and a top portion above the neck portion (see at least fig. 1); and forming a second epitaxial layer (54) on the first epitaxial layer for the benefit of providing a semiconductor device with a more efficient electrical performance (col. 1, lines 5-8).
However, Kuang does not expressly disclose a width of the neck portion is greater than a width of the top portion.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device method of Chen with the bottom V-shape and neck teachings of Kuang, wherein a width of the neck portion is greater than a width of the top portion for the benefit of providing a semiconductor device with a more efficient electrical performance (col. 1, lines 5-8).
Also, one of ordinary skill in the art would have been led to the recited V-shape bottom surface and neck width through design choice. Applicant has not disclosed that the recited V-shape bottom and neck width are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that process would possess utility using the V-shape first epitaxial layer flat bottom surface and neck width of Chen as modified by Kuang.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-17 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELMITO BREVAL whose telephone number is (571)270-3099. The examiner can normally be reached M-Th~ 7:30-5:30.
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ELMITO BREVAL
Primary Examiner
Art Unit 2875
/ELMITO BREVAL/ Primary Examiner, Art Unit 2875
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