Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
Claim(s) 1-5, 7-10, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Takizawa (PGPub No. 20210175148) in further view of Wedi (PGPub No. 20190006193) and Bayerer (PGPub No. 20110075451).
Regarding claim 1, Takizawa teaches a power semiconductor module arrangement, comprising: a base plate; a plurality of substrates arranged on a first surface of the base plate; a plurality of connection layers, wherein each of the plurality of connection layers is arranged between a different one of the plurality of substrates and the base plate and permanently attaches the respective substrate to the base plate (Fig. 7 points to a semiconductor device comprising a metal base plate 30, ceramic circuit boards 21 (a plurality of substrates), and solders 25a and 25b (a plurality of connection layers).); and a plurality of spacers, wherein each of the plurality of spacers is arranged between one of the plurality of substrates and the base plate, and is embedded in a material of the respective connection layer, and wherein for at least one of the plurality of substrates: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate; and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height (Id. points to a first group of protrusions 32a/33b (first kind of spacers) and a second group of protrusions 33a/32b (second kind of spacers), where the height of the second group (second height) is greater than the height of the first group (first height).).
Takizawa fails to teach wherein each of the plurality of spacers is an element separate from the base plate.
Wedi teaches wherein each of the plurality of spacers is an element separate from the base plate (Fig. 4 and [0036] point to a substrate 10 mounted to a base plate 40 via spacers 51, which may be separate elements that are mounted to the base plate 40 by any appropriate means.). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Takizawa and Wedi , such that the plurality of spacers are formed separate from the base plate in order to allow for material flexibility and/or avoid geometric constraints that would come from integrally forming the spacers.
Takizawa et al. still fails to teach wherein the base plate is flat.
Bayerer teaches wherein the base plate is flat (Fig. 2 points to a power semiconductor module 100 comprising a base plate 9.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa et al. and Bayerer, such that the base plate is flat in order to achieve dissipation that is as good as possible of the lost heat occurring in the power components positioned above.
Regarding claim 2, Takizawa teaches wherein one or more of the first kind of spacers is arranged below the first half of the respective substrate, and wherein the second height is between 20µm and 500µm greater than the first height ([0045] points to the height of protrusions 33a/32b (second height) is greater than the height of protrusions 32a/33b (first height) by 50% or more and 400% or less; for example, the height of protrusions 33a/32b is 0.35mm/350µm, and the height of protrusions 32a/33b is 0.10mm/100µm.).
Regarding claim 3, Takizawa teaches wherein each of the one or more of the first kind of spacers has a first height of between 0µm and 400µm ([0030] points to the height of the protrusions 32a through 35a and 32b through 35b ranging from 0.05mm to 0.5mm, or 50µm to 500µm. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).).
Regarding claim 4, Takizawa teaches wherein each of the one or more second kind of spacers has a second height of between 20µm and 900µm ([0030] points to the height of the protrusions 32a through 35a and 32b through 35b ranging from 0.05mm to 0.5mm, or 50µm to 500µm.).
Regarding claim 5, Takizawa teaches wherein the second half of the respective substrate is arranged closer to an edge of the base plate than the first half of the same substrate (Fig. 7 points to each ceramic circuit board 21 (respective substrate) having one half (first half) that is closer to the center of metal base plate 30 as defined by centerline CL, and another half (second half) that is closer to an edge of said plate 30.).
Regarding claim 7, Takizawa teaches wherein the base plate comprises a layer of metallic material ([0029] points to the metal base plate 30 being made of metal, such as aluminum, iron, silver, copper, or an alloy containing at least one of them.).
Regarding claim 8, Takizawa teaches at least one semiconductor body arranged on a top surface of each of the plurality of substrates, and wherein the top surface of a substrate is a surface facing away from the base plate (Fig. 7, [0027] and [0047] point to semiconductor chips 28a and 28b (semiconductor body) arranged on the top surfaces of ceramic circuit boards 21 (plurality of substrates).).
Regarding claim 9, Takizawa teaches wherein the plurality of connection layers are solder layers (Fig. 7 and [0045] point to solders 25a and 25b (plurality of connection layers).).
Regarding claim 10, Takizawa teaches a base plate for a power semiconductor module, the base plate comprising: a layer of a metallic material ([0029] points to the metal base plate 30 being made of metal, such as aluminum, iron, silver, copper, or an alloy containing at least one of them.); and a plurality of spacers, the plurality of spacers comprising at least one of a first kind of spacers having a first height in a vertical direction perpendicular to a first surface of the layer of a metallic material, and at least one of a second kind of spacers having a second height in the vertical direction which is greater than the first height (Fig. 7 points to a first group of protrusions 32a/33b (first kind of spacers) and a second group of protrusions 33a/32b (second kind of spacers), where the height of the second group (second height) is greater than the height of the first group (first height).).
Takizawa fails to teach wherein each of the plurality of spacers is an element separate from the layer of a metallic material, and wherein prior to attaching any substrates to the base plate, the layer of metallic material has a convex deflection.
Wedi teaches wherein each of the plurality of spacers is an element separate from the layer of a metallic material (Fig. 4 and [0036] point to a substrate 10 mounted to a base plate 40 via spacers 51, which may be separate elements that are mounted to the base plate 40 by any appropriate means.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa and Wedi, such that the plurality of spacers are formed separate from the metallic material of the base plate in order to allow for material flexibility and/or avoid geometric constraints that would come from integrally forming the spacers.
Takizawa et al. still fails to teach wherein prior to attaching any substrates to the base plate, the layer of metallic material has a convex deflection.
Bayerer teaches wherein prior to attaching any substrates to the base plate, the layer of metallic material has a convex deflection ([0058-59] point to a base plate 9, which may be copper-based (layer of metallic material), that may be pre-bent before it is loaded with the ceramic substrates 3 and 4.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa et al. and Bayerer, such that the metallic material has a convex deflection prior to attaching any substrates to the base plate so that the metallic material and base plate become as planar as possible at high operating temperatures in order to achieve dissipation that is as good as possible.
Regarding claim 12, Takizawa teaches a method for forming a power semiconductor module arrangement, the method comprising: arranging a plurality of substrates on a first surface of a base plate with a solid connection layer arranged between the base plate and each of the plurality of substrates (Figs. 7-9 and [0047-48] point to a method for manufacturing a semiconductor device comprising the formation of a metal base plate 30, ceramic circuit boards 21 (a plurality of substrates), and solder plates 27a and 27b (solid connection layer) located between said plate 30 and boards 21.); heating the base plate with the plurality of substrates and connection layers arranged thereon, thereby liquefying a material of the plurality of connection layers (Figs. 3 & 7-9, and [0049] point to heating the solder plates 27a and 27b (plurality of connection layers) via the back surface of the metal base plate 30, resulting in molten solder 27a1 and 27b1.); and cooling the base plate with the plurality of substrates and connection layers arranged thereon, thereby solidifying the material of the plurality of connection layers (Figs. 3 & 7-8, and [0051] point to cooling the molten solder 27a1 and 27b1 (plurality of connection layers), resulting in the formation of solder 25a and 25b respectively.), wherein for at least one of the plurality of substrates: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate; and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height (Fig. 7 and [0045] point to a first group of protrusions 32a/33b (first kind of spacers) and second group of protrusions 33a/32b (second kind of spacers), where the height of the second group of protrusions (second height) is greater than the height of the first group (first height).).
Takizawa fails to teach wherein each of the spacers is an element separate from the base plate, wherein before the heating of the base plate, the base plate has a convex form, and wherein during the cooling of the base plate, the base plate deforms from the convex form to a flat form.
Wedi teaches wherein each of the spacers is an element separate from the base plate (Fig. 4 and [0036] point to a substrate 10 mounted to a base plate 40 via spacers 51, which may be separate elements that are mounted to the base plate 40 by any appropriate means.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa and Wedi, such that the plurality of spacers are formed separate from the base plate in order to allow for material flexibility and/or avoid geometric constraints that would come from integrally forming the spacers.
Takizawa et al. still fails to teach wherein before the heating of the base plate, the base plate has a convex form, and wherein during the cooling of the base plate, the base plate deforms from the convex form to a flat form.
Bayerer teaches wherein before the heating of the base plate, the base plate has a convex form, and wherein during the cooling of the base plate, the base plate deforms from the convex form to a flat form ([0058-59] point to a base plate 9 that may be pre-bent before it is loaded with the ceramic substrates 3 and 4 so that the underside 92 of the base plate is as planar as possible, in particular at high operating temperatures.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa et al. and Bayerer, such that the base plate is heated to change shape from an initial convex form into a flat form in order to achieve dissipation that is as good as possible.
Claim(s) 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Takizawa in further view of Bayerer (PGPub No. 20110075451) and Tamaki (PGPub No. 20080237838).
Regarding claim 14, Takizawa teaches a power semiconductor module arrangement, comprising: a base plate; a plurality of substrates arranged on a first surface of the base plate; a plurality of connection layers, wherein each of the plurality of connection layers is arranged between a different one of the plurality of substrates and the base plate and permanently attaches the respective substrate to the base plate (Fig. 7 points to a semiconductor device comprising a metal base plate 30, ceramic circuit boards 21 (a plurality of substrates), and solders 25a and 25b (a plurality of connection layers).); and a plurality of spacers, wherein each of the plurality of spacers is arranged between one of the plurality of substrates and the base plate, and is embedded in a material of the respective connection layer, wherein for at least one of the plurality of substrates: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate; and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height (Id. points to a first group of protrusions 32a/33b (first kind of spacers) and a second group of protrusions 33a/32b (second kind of spacers), where the height of the second group (second height) is greater than the height of the first group (first height).).
Takizawa fails to teach wherein the base plate is flat, wherein an uneven number of the substrates is arranged about a center of the base plate, wherein a substrate is arranged essentially at the center of the base plate, wherein only spacers of the first kind and no spacers of the second kind are arranged below the substrate arranged essentially at the center of the base plate.
Bayerer teaches wherein the base plate is flat (Fig. 2 points to a power semiconductor module 100 comprising a base plate 9.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa and Bayerer, such that the base plate is flat in order to achieve dissipation that is as good as possible of the lost heat occurring in the power components positioned above.
Takizawa et al. still fails to teach wherein an uneven number of the substrates is arranged about a center of the base plate, wherein a substrate is arranged essentially at the center of the base plate, wherein only spacers of the first kind and no spacers of the second kind are arranged below the substrate arranged essentially at the center of the base plate.
Takizawa in combination with Tamaki teaches wherein an uneven number of the substrates is arranged about a center of the base plate (Fig. 20 points to a MCM-packaged semiconductor device 140 comprising three semiconductor chips 141, 142 and 143 (substrates) positioned on an unnamed carrier (base plate).), wherein a substrate is arranged essentially at the center of the base plate (Id. points to semiconductor chip 141 (substrate).), wherein only spacers of the first kind and no spacers of the second kind are arranged below the substrate arranged essentially at the center of the base plate (Fig. 4 of Takizawa points to an alternative embodiment of the metal base plate 30, such that it comprises a flat shape and protrusions that all match the height of protrusions 32a/33b (spacers of the first kind). Fig. 20 of Tamaki points to a flat central area of the unnamed carrier (base plate) located between bending points P on which the semiconductor chip 141 (substrate) is positioned.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa and Tamaki, such that one of the substrates is mounted in the center of the base plate at a uniform height in order to control the location(s) and degree of warpage within the base plate by taking advantage of the warpage that occurs in the area(s) between chips/substrates during fabrication.
Regarding claim 15, Tamaki teaches wherein the base plate has a curvature below the first half of the substrate arranged essentially at the center of the base plate that is generally symmetric to the curvature below the second half of the substrate arranged essentially at the center of the base plate (Fig. 20 points to the flat central area of the unnamed carrier (base plate) located between bending points P on which the semiconductor chip 141 (substrate) is positioned.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Takizawa and Tamaki, such that the curvature under each half of the central substrate is symmetric to the other in order to create a uniform surface that will improve mounting.
Response to Arguments
Applicant’s arguments, see Remarks, filed 01/22/2026, with respect to the rejection(s) of amended claim(s) 1, 10, 12, and 14 (and by extension any dependent claims) under 35 U.S.C. §103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Takizawa et al. in further view of Bayerer (PGPub No. 20110075451).
Conclusion
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/PATRICK CULLEN/Assistant Examiner, Art Unit 2899
/DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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