DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 15-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 15 recites “the metallization layer” in line 7. There is insufficient antecedent basis for this limitation in the claim. For the purpose of compact prosecution, the examiner assumes the claimed “the metallization layer” is the first metallization layer.
Claim 15 recites “the first metallization layer comprising a first insulator material” in lines 3-4. Metal is known an electrically conductive material. It is unclear how an electrically conductive material comprises insulator material.
Claims 16-18 are rejection since they inherit the deficiency from claim 15.
Claim 19 recites “the first metallization layer comprising a first insulator material, ... the second metallization layer comprising a second insulator material” in lines 3-4. Metal is known an electrically conductive material. It is unclear how an electrically conductive material comprises insulator material.
Claims 20 are rejection since they inherit the deficiency from claim 19.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Tsai et al. (U.S. Patent Application Publication No. 2023/0343818).
Regarding to claim 1, Tsai teaches an integrated circuit (IC) die, comprising:
a base (Fig. 1; element 10; [0015], lines 1-2);
a front-end-of-line (FEOL) layer over the base, the FEOL layer comprising active or passive circuitry (Fig. 1; element 12; [0015], last 3 lines);
a first back-end-of-line (BEOL) layer lines comprising first conductive pathways (Fig. 1; element 20/22 in dielectrics 18);
a second BEOL layer comprising second conductive pathways (Fig. 1; element 20/22, electrodes of capacitor 46A/B, and metal 28/30 in dielectrics 18A/18B); and
a third BEOL layer comprising third conductive pathways (Fig. 1; element 38, in dielectrics 36/42),
wherein the first BEOL layer is between the FEOL layer and the second BEOL layer, the second BEOL layer is between the first BEOL layer and the third BEOL layer (Fig. 1), and an electrically conductive fill material of the second conductive pathways is different from an electrically conductive fill material of the first conductive pathways and from an electrically conductive fill material of the third conductive pathways ([0016], lines 8-9;, [0021], last 2 lines; [0027], lines 5-7; [0017], lines 3-4, electrically conductive fill material of the second conductive pathways (aluminum pad 30 and nitride metal capacitor electrodes), is different from an electrically conductive fill material of the first conductive pathways 20 and from an electrically conductive fill material of the third conductive pathways 38, which are copper).
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Regarding to claim 2, Tsai teaches the electrically conductive fill material of the second conductive pathways includes aluminum ([0017], lines 3-4), and wherein at least one of the electrically conductive fill material of the first conductive pathways or the electrically conductive fill material of the third conductive pathways includes copper ([0021], last 2 lines).
Regarding to claim 3, Tsai teaches
the second BEOL layer includes a first sub-layer (Fig. 4, element 46B) and a second sub-layer (Fig. 1, stack 20/50),
the first sub-layer is between the FEOL layer and the second sub-layer and includes a first subset of the second conductive pathways separated from one another by a first insulator material (Fig. 1, capacitor 46B is between the first FEOL layer and the second sub-layer, the capacitor includes a first subset of the second conductive pathways, which are the top and bottom electrodes of the capacitor, separated from one another by insulator material),
the second sub-layer is between the first sub-layer and the third BEOL layer and includes a second subset of the second conductive pathways separated from one another by a second insulator material (Fig. 1, the stack is between the third FEOL layer and the second sub-layer 46B, includes second subset 20/50 of the second conductive pathways, separated from one another by insulator material 36), and
the second insulator material and the first insulator material have different material compositions (the second insulator material 36 is polymer, different from the material of the first insulator which is non-organic dielectric).
Regarding to claim 4, Tsai teaches a portion of the second insulator material is above the second subset of the second conductive pathways (Fig. 1, the second insulator material 36 is above the second subset of the second conductive pathways), and at least one of the third conductive pathways extends through the portion of the second insulator material that is above the second subset of the second conductive pathways and contacts at least one of the second subset of the second conductive pathways (Fig. 1, third conductive pathways 38 extends through the portion of the second insulator material 36 that is above the second subset of the second conductive pathways and contacts pad 30 of the second subset of the second conductive pathways).
Regarding to claim 5, Tsai teaches an intermediate layer over the second subset of second conductive pathways, wherein the at least one of the third conductive pathways extends through the intermediate layer (Fig. 1, intermediate layer 32 over the second subset of second conductive pathways, portion of layer 38 of the third conductive pathways extends through the intermediate layer 32).
Regarding to claim 6, Tsai teaches the intermediate layer is between the second subset of the second conductive pathways and the portion of the second insulator material that is above the second subset of the second conductive pathways (Fig. 1, the intermediate layer 32 is between the second subset 50 of the second conductive pathways and the portion of the second insulator material 36 that is above the second subset of the second conductive pathways).
Regarding to claim 7, Tsai teaches the intermediate layer is further at an interface between the first insulator material and the second insulator material (Fig. 1).
Regarding to claim 8, Tsai teaches
the third conductive pathways are separated from one another by a third insulator material (FIG. 1, element 42),
the intermediate layer is a first intermediate layer (Fig. 1, element 32), and
the IC die further includes a second intermediate layer at an interface between the second insulator material and the third insulator material (Fig. 1, element 36).
Regarding to claim 9, Tsai teaches the at least one of the third conductive pathways extends through the second intermediate layer (Fig. 1, portion of layer 38 extends through the second intermediate layer 36).
Regarding to claim 10, Tsai teaches one or more capacitors in the third BEOL layer (Fig. 1, element 46C).
Regarding to claim 11, Tsai teaches at least some of the first conductive pathways include a liner and an electrically conductive fill material, at least some of the third conductive pathways include a liner and an electrically conductive fill material, and a material composition of the liner of the first conductive pathways is different from a material composition of the liner of the third conductive pathways (Fig. 13).
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Regarding to claim 12, Tsai teaches material composition of the electrically conductive fill material of the first conductive pathways is different from a material composition of the electrically conductive fill material of the third conductive pathways (Fig. 1, material 20 is different from material 38).
Regarding to claim 13, Tsai teaches the second BEOL layer further includes a conductive pad (Fig. 1, element 30).
Regarding to claim 14, Tsai teaches the conductive pad has a first face and a second face, the first face is closer to the base than the second face, one of the second conductive pathways is connected to the first face of the conductive pad, and one of the third conductive pathways is connected to the second face of the conductive pad (Fig. 1).
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Regarding to claim 15, Tsai teaches an integrated circuit (IC) die, comprising:
a device layer, comprising active or passive circuitry (Fig. 1; element 12; [0015], last 3 lines);
a first metallization layer over the device layer, the first metallization layer comprising a first insulator material having a first face and a second face opposite the first face (Fig. 1, element 18), and further comprising first conductive pathways in the first insulator material (Fig. 1, elements 28), wherein the first face is closer to the device layer than the second face (Fig. 1, the first face is the bottom face);
a layer (Fig. 1, element 32) comprising conductive contacts (Fig. 1, element 30) at the second face of the metallization layer; and
a second metallization layer (Fig. 1, element 36/38) comprising second conductive pathways (Fig. 1, element 38),
wherein the layer is between the first metallization layer and the second metallization layer (Fig. 1).
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Regarding to claim 16, Tsai teaches the conductive contacts include conductive pads (Fig. 1, element 30).
Regarding to claim 17, Tsai teaches at least one of the conductive contacts is connected to one of the first conductive pathways on one side of the at least one of the conductive contacts and is connected to one of the second conductive pathways on another side of the at least one of the conductive contacts (Fig. 1).
Regarding to claim 18, Tsai teaches at least one of the conductive contacts is connected to one of the first conductive pathways on one side of the at least one of the conductive contacts and is not connected to any further pathways above the second face of the first metallization layer (Fig. 1).
Regarding to claim 19, Tsai teaches an integrated circuit (IC) die, comprising:
a device layer, comprising active or passive circuitry (Fig. 1; element 12; [0015], last 3 lines);
a first metallization layer over the device layer, the first metallization layer comprising a first insulator material (Fig. 1, element 18A) and first conductive pathways in the first insulator material (Fig. 1, elements 28);
a second metallization layer over the device layer, the second metallization layer comprising a second insulator material (Fig. 1, element 36) and second conductive pathways in the second insulator material (Fig. 1, element 38); and
conductive contacts (Fig. 1, element 30) buried in a layer of a third insulator material between the first metallization layer and the second metallization layer (Fig. 1, element 32).
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Regarding to claim 20, Tsai teaches at least one of the conductive contacts is connected to one of the first conductive pathways on one side of the at least one of the conductive contacts and is connected to one of the second conductive pathways on another side of the at least one of the conductive contacts (Fig. 1).
Pertinent Art
For the benefits of the Applicant, US-7622364-B2, US-9059110-B2, US-11201157-B2, US-10116891-B2, US-11327228-B2 US-10158072-B1, US-20200091156-A1 US-20200227377-A1, US-20200328186-A1 US-20050026397-A1, and US-20200227401-A1, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. The references fail to disclose the limitations including “an electrically conductive fill material of the second conductive pathways is different from an electrically conductive fill material of the first conductive pathways and from an electrically conductive fill material of the third conductive pathways”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VU A VU whose telephone number is (571)270-7467. The examiner can normally be reached M-F: 8:00AM - 5:00PM.
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/VU A VU/Primary Examiner, Art Unit 2897