Prosecution Insights
Last updated: April 19, 2026
Application No. 18/148,230

MULTI-PHASE CLOCKING SCHEME FOR A MEMORY DEVICE

Non-Final OA §112§DP
Filed
Dec 29, 2022
Examiner
PEIKARI, BEHZAD
Art Unit
3992
Tech Center
3900
Assignee
Intel Ndtm US LLC
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
3y 5m
To Grant
84%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
62 granted / 77 resolved
+20.5% vs TC avg
Minimal +3% lift
Without
With
+3.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
9 currently pending
Career history
86
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
16.7%
-23.3% vs TC avg
§102
6.7%
-33.3% vs TC avg
§112
35.5%
-4.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 77 resolved cases

Office Action

§112 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . NONFINAL OFFICE ACTION This Office Action addresses U.S. Patent Application No. 18/148,230, entitled “MULTI-PHASE CLOCKING SCHEME FOR A MEMORY DEVICE”, filed December 29, 2022. Claims 1-20 are pending. REQUIREMENT FOR INFORMATION UNDER 37 CFR 1.105 37 CFR 1.105(a)(1) states: In the course of examining or treating a matter in a pending or abandoned application … the examiner or other Office employee may require the submission, from individuals identified under § 1.56(c), or any assignee, of such information as may be reasonably necessary to properly examine or treat the matter. 37 CFR 1.63(c) states: A person may not execute an oath or declaration for an application unless that person has reviewed and understands the contents of the application, including the claims, and is aware of the duty to disclose to the Office all information known to the person to be material to patentability as defined in § 1.56. (1) In the Declaration submitted August 24, 2023, applicant acknowledged, under oath, the duty to disclose to the Patent and Trademark Office all information known to be material to patentability of the subject matter claimed in this application, as “materiality” is defined in Title 37, Code of Federal Regulations, § 1.56. (2) On January 30, 2026 a search of the prior art revealed several relevant patents and published patent applications by those having a duty to disclose under 37 CFR § 1.56 (each inventor named in the application; each attorney or agent who prepares or prosecutes the application; and every other person who is substantively involved in the preparation or prosecution of the application and who is associated with the inventor, the applicant, an assignee, or anyone to whom there is an obligation to assign the application). Some examples of such prior art relevant to the present claims are: U.S. Patent No. 8,619,931: “The resulting current clock signal (CURCLK) 110 output by the PI 104 may include four phases at the frequency of the multi-phase clock signal 64” EP 1753143 A2: “One of the purposes of the multi-phase recovered clock outputs of CDR 20 is to provide multiple versions of a half-rate clock signal” and “The multi-phase recovered clock signals output by CDR circuitry 20 are also applied to local clock generator circuitry 110.” U.S. Patent Application Pub. No. 20220200781: “The ones described herein are: and (1) Very wide frequency range (one-octave) quadrature clock generator i.e. generating 4-phases (e.g., 0, 90, 180 and 270 degrees) from two input phases (0 and 180 degrees), and (2) Very wide frequency range quadrature oscillator (direct 4-phase generation). They both function using the same underlying principal which is detailed herein. The clock buffer can also be used in other situations such as clock distribution network.” U.S. Patent No. 9,252,743: “In one embodiment, an apparatus includes a clock generator to generate differential clock signals. The apparatus also includes a distributed polyphase filter to obtain phase-corrected multi-phase clock signals based on the differential clock signals.” U.S. Patent No. 9,013,213: “The fractional frequency divider can use a multi-phase input to perform fractional division. FIG. 1A illustrates a 4-phase input clock signal P1-P4.” U.S. Patent No. 8,194,811: “Multi-phase reference clock signals, such as four-phase reference clocks, are used in many processing systems”. U.S. Patent No. 6,633,190: “The multi-phase clock generator 300 also includes a clock divider 370 that simply divides the reference, or input, clock by eight. Alternate implementations need not divide the reference clock or may divide it by any other suitable number.” U.S. Patent Application Pub. No. 20220303034: “Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle.” This list is not exhaustive. Applicants have not satisfied the duty to disclose all information known to be material to patentability of the subject matter claimed in this application. Related applications or publications by the applicant (inventors and/or assignee) suggest that applicant likely has access to information necessary to a more complete understanding of the invention and its context than has been disclosed. The record suggests that the details of such information may be relevant to the issue of patentability, and thus shows the need for information. See MPEP 704.11. Applicant and the assignee of this application are required under 37 CFR 1.105 to provide the following information that the examiner has determined is reasonably necessary to the examination of this application. The information is required to enter in the record the art suggested by the applicant as relevant to this examination, narrowed to the scope of technologies that generate, based on a first clock signal having a first frequency, multi-phase clock signals for a memory device having a second frequency, wherein the second frequency is a fraction of the first frequency and generate local clock signals for data channels of the memory device based on the multi-phase clock signals, wherein the local clock signals are synchronous with respective rising edges of the multi-phase clock signals. (1) In response to this requirement, please provide copies of each publication which any of the inventors authored or co-authored and/or which was owned by the assignee and which describe the disclosed subject matter, narrowed to the scope of technologies that generate, based on a first clock signal having a first frequency, multi-phase clock signals for a memory device having a second frequency, wherein the second frequency is a fraction of the first frequency and generate local clock signals for data channels of the memory device based on the multi-phase clock signals, wherein the local clock signals are synchronous with respective rising edges of the multi-phase clock signals. (2) In response to this requirement, please provide the title, citation and copy of each publication that is a source used for the description of the prior art in the disclosure, narrowed to “technologies that generate, based on a first clock signal having a first frequency, multi-phase clock signals for a memory device having a second frequency, wherein the second frequency is a fraction of the first frequency and generate local clock signals for data channels of the memory device based on the multi-phase clock signals, wherein the local clock signals are synchronous with respective rising edges of the multi-phase clock signals.” For each publication, please provide a concise explanation of that publication’s contribution to the description of the prior art. (3) In response to this requirement, please provide the title, citation and copy of each publication that any of the inventors relied upon to develop and/or draft the disclosed subject matter that describes the invention, particularly as to technologies that generate, based on a first clock signal having a first frequency, multi-phase clock signals for a memory device having a second frequency, wherein the second frequency is a fraction of the first frequency and generate local clock signals for data channels of the memory device based on the multi-phase clock signals, wherein the local clock signals are synchronous with respective rising edges of the multi-phase clock signals. For each publication, please provide a concise explanation of the reliance placed on that publication in the development of the disclosed subject matter. (4) As demonstrated above, applicant’s own patents and publications appear to teach critical limitations of the present claims. In response to this requirement, please state the specific improvements of the subject matter in claims 1-20 over the disclosed prior art and indicate the specific elements in the claimed subject matter that provide those improvements. The timing fee and certification requirements of 37 CFR 1.97 are waived for those documents submitted in reply to the requirement. This waiver extends only to those documents within the scope of this requirement under 37 CFR 1.105 that are included in the applicant’s first complete communication responding to this requirement. Any supplemental replies subsequent to the first communication responding to this requirement and any information disclosures beyond the scope of this requirement under 37 CFR 1.105 are subject to the fee and certification requirements of 37 CFR 1.97 where appropriate. The applicant is reminded that the reply to this requirement must be made with candor and good faith under 37 CFR 1.56. Where the applicant does not have or cannot readily obtain an item of required information, a statement that the item is unknown or cannot be readily obtained may be accepted as a complete reply to the requirement for that item. This requirement is an attachment of the following Office action. A complete reply to the Office action must include a complete reply to this requirement. The time period for reply to this requirement coincides with the time period for reply to the enclosed Office action. A reply, or a failure to reply, to a requirement for information under 37 CFR 1.105(a)(1) will be governed by §§ 1.135 and 1.136. DRAWING OBJECTIONS The drawings are objected to under 37 CFR 1.83(a) because: (1) Figures 1A – 1C should be designated by a legend such as --Prior Art-- because only that which is old is illustrated (cf. ¶ [0004] of the specification). Note MPEP § 608.02(g). (2) Figure 3A is not in accordance with 37 CFR 1.84(p)(3), which states, “Numbers, letters, and reference characters must measure at least .32 cm. (1/8 inch) in height.” (3) Figures 7 and 8 are not in accordance with 37 CFR 1.84(p)(3) and 37 CFR 1.84(q). Elements 30 and 40 should not be underlined. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. SPECIFICATION The disclosure is objected to because of the following informalities: In ¶ [0081], the language the phrases “one or more of A, B or C” may mean A, B, C; A and B; A and C; B and C; or A, B and C. should be rewritten as: the phrases “one or more of A, B or C” may mean “A”, “B”, “C”, “A and B”, “A and C”, “B and C”, or “A, B and C”. CLAIM OBJECTIONS Claims 1-15 and 17 are objected to because of the following informalities: (1) In claim 1, lines 3-5, the “one or more of configurable or fixed-functionality hardware” can be “coupled to the one or more substrates”, but the logic cannot. (2) In claim 2, lines 1-2, “the logic is to bypass use of a trailing edge” is confusing. The trailing edge would have to be used for it to be bypassed. (3) In claim 8, line 6, the “one or more of configurable or fixed-functionality hardware” can be “coupled to the one or more substrates”, but the logic cannot. (4) In claim 9, lines 1-2, “the logic is to bypass use of a trailing edge” is confusing. The trailing edge would have to be used for it to be bypassed. (5) In claim 17, lines 1-2, “the logic is to bypass use of a trailing edge” is confusing. The trailing edge would have to be used for it to be bypassed. Claims 2-7 and 9-15 are objected to as being dependent on independent claims 1 and 8, respectively. Appropriate correction is required. CLAIM INTERPRETATION The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. An application may include one or more claim limitations that use the words “means for” and also limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) use(s) a generic placeholder. Three Prong Analysis To invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, a claimed phrase must meet the three prong analysis as set forth in MPEP § 2181, subsection I. (A) Regarding Prong (A), the MPEP states: the claim limitation uses the term "means" or "step" or a term used as a substitute for "means" that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function.... The claim limitations listed below do not use the language "means" or "step". However, each of these may be found to be a generic placeholder. logic memory controller memory devices Thus, these limitations meet Prong (A) of the analysis. (B) Regarding Prong (B), the MPEP states: the term "means" or "step" or the generic placeholder is modified by functional language, typically, but not always linked by the transition word "for" (e.g., "means for") or another linking word or phrase, such as "configured to" or "so that"... The claim limitations listed below may be modified by functional language, as shown. logic (not modified by functional language) memory controller (not modified by functional language) memory devices (not modified by functional language) Any limitations which have been marked “not modified by functional language” do not meet Prong (B) and will not be further considered in this analysis. Since none of the limitations above are modified by functional language, the analysis stops at here at Prong (B). Thus, the limitations listed above do not meet Prong (B) of the analysis and thus the claims do not invoke 35 U.S.C. § 112, 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph. CLAIM REJECTIONS - 35 USC § 112, 1st PARAGRAPH The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. (1) Regarding claim 1, line 14, “output data sequence based on the local clock signals”, the only explanation provided is in ¶ [0047], which states, “At block 630, output data is provided for the data channels of the memory device in an output data sequence based on the local clock signals.” (2) Regarding claim 8, line 15, “output data sequence based on the local clock signals”, the only explanation provided is in ¶ [0047], which states, “At block 630, output data is provided for the data channels of the memory device in an output data sequence based on the local clock signals.” (3) Regarding claim 16, lines 8-9, “output data sequence based on the local clock signals”, the only explanation provided is in ¶ [0047], which states, “At block 630, output data is provided for the data channels of the memory device in an output data sequence based on the local clock signals.” Paragraph [0047] goes on to state, “In some embodiments, the output data is clocked out at an effective rate equal to the first frequency based on the local clock signals. In some embodiments, a staggered, multi-phase data sequence is converted to the output data sequence”, but does not relate a staggered, multi-phase data sequence to the local clock signals. The remaining claims are rejected as being dependent on rejected independent claims 1, 8 and 16. CLAIM REJECTIONS - 35 USC § 112, 2nd PARAGRAPH The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. (1) In claim 1, line 7, it is unclear whether the antecedent basis of “having a second frequency” either “multiphase clock signals” or “a memory device”. (2) In claim 1, line 8, the scope of “fraction” is undefined. A fraction could be ½ or it could be 5/3. (3) In claim 6, lines 1-3, “wherein the output data is clocked out at an effective rate equal to the first frequency based on the local clock signals” is unclear. Claim 1 requires that the first frequency is based on a first clock signal, not the local clock signals. Or perhaps this is meant to be worded as “wherein the output data is clocked out based on the local clock signals, at an effective rate equal to the first frequency”. (4) In claim 8, line 9, it is unclear whether the antecedent basis of “having a second frequency” either “multiphase clock signals” or “a memory device”. (5) In claim 8, line 10, the scope of “fraction” is undefined. A fraction could be ½ or it could be 5/3. (6) In claim 13, “wherein the output data is clocked out at an effective rate equal to the first frequency based on the local clock signals” is unclear. Claim 8 requires that the first frequency is based on a first clock signal, not the local clock signals. Or perhaps this is meant to be worded as “wherein the output data is clocked out based on the local clock signals, at an effective rate equal to the first frequency”. (7) In claim 16, line 3, it is unclear whether the antecedent basis of “having a second frequency” either “multiphase clock signals” or “a memory device”. (8) In claim 16, line 4, it is unclear whether the antecedent basis of “having a second frequency” either “multiphase clock signals” or “a memory device”. (9) In claim 20, “wherein the output data is clocked out at an effective rate equal to the first frequency based on the local clock signals” is unclear. Claim 16 requires that the first frequency is that of a first clock signal, not the local clock signals. Or perhaps this is meant to be worded as “wherein the output data is clocked out based on the local clock signals, at an effective rate equal to the first frequency”. The remaining claims are rejected as being dependent on rejected independent claims 1, 8 and 16. PRIOR ART Any rejections based on prior art (e.g., nonstatutory double patenting, 35 U.S.C. §102 or 35 U.S.C. §103) will be held in abeyance until applicant has satisfied the requirements for information under 37 CFR 1.105 set forth above and clarified the inventive concept to distinguish the invention from prior art systems that utilized multi-phase clock signals to access memory. CONCLUSION Any inquiry concerning this communication or earlier communications from the examiner should be directed to B. James Peikari at telephone number (571) 272-4185. The examiner can normally be reached M-F 8:30am - 5:30pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Kosowski can be reached at (571) 272-3744. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /B. James Peikari/ Primary Examiner, Art Unit 3992
Read full office action

Prosecution Timeline

Dec 29, 2022
Application Filed
Jul 11, 2023
Response after Non-Final Action
Feb 01, 2026
Non-Final Rejection — §112, §DP (current)

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