Prosecution Insights
Last updated: July 17, 2026
Application No. 18/148,598

STACKED INORGANIC-ORGANIC DIELECTRICS FOR THIN FILM CAPACITORS IN PACKAGE SUBSTRATES

Non-Final OA §103
Filed
Dec 30, 2022
Examiner
CHANG, JAY C
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
564 granted / 663 resolved
+17.1% vs TC avg
Moderate +14% lift
Without
With
+14.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
31 currently pending
Career history
697
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
58.6%
+18.6% vs TC avg
§102
18.9%
-21.1% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 663 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This action is responsive to the following communications: the Amendment filed 3/24/2026. Claims 1-20 are pending. Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/30/2022 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Election/Restrictions Applicant’s election without traverse of Species I in the reply filed on 3/24/2026 is acknowledged. Claim 16 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 3/24/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1, 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Gangal et al. (US 2022/0302007 A1, hereinafter “Gangal”) in view of Wang (US 2024/0032365 A1). Regarding independent claim 1, Figures 9B-9C and 11F of Gangal, specifically the overall configuration shown in Figure 11F with further details shown in Figures 9B-9C, disclose a microelectronic assembly, comprising: a package substrate 1101 (“substrate”- ¶0092) having a core 504 (“core”- ¶0053) of continuous polyimide material (¶0044) with one or more capacitors 811 (“capacitive element”- ¶0076) in the continuous polyimide material; and one or more integrated circuit (IC) dies 731 (“integrated circuit die”- ¶0073) coupled to the package substrate 1101, wherein at least one of the capacitors 811 comprises: a first tubular layer 921 (“conductors”- ¶0089) comprising a metallic material (¶0089), the first tubular layer 921 having an outer surface and an inner surface, the outer surface in indirect contact with the polyimide material; a second tubular layer 922 (“dielectric material”- ¶0085, specifically the portion of 922 between 921 and 923; see Fig. 9C) concentric with the first tubular layer 921 and in contact with the inner surface of the first tubular layer, the second tubular layer comprising a first dielectric material (¶0089); a third tubular layer 922 (“dielectric material”- ¶0085, specifically the portion of 922 between 923 and 925; see Fig. 9C) concentric with the second tubular layer 922 and in contact with the second tubular layer 922, the third tubular layer 922 comprising a second dielectric material (¶0089); a fourth tubular layer 922 (“dielectric material”- ¶0085, specifically the portion of 922 between 925 and 927; see Fig. 9C) concentric with the third tubular layer 922 and in contact with the third tubular layer 922, the fourth tubular layer 922 comprising the first dielectric material (¶0089); and a fifth tubular layer 927 (“conductors”- ¶0085) concentric with the fourth tubular layer 922 and in contact with the fourth tubular layer 922, the fifth tubular layer 927 comprising the metallic material (¶0089). Gangal does not expressly disclose wherein the core of the package substrate is of solid continuous glass. Wang discloses a semiconductor device comprising a package substrate which is comprises of a solid continuous glass material or a polyimide material (¶0021). In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gangal such that the core of the package substrate is of solid continuous glass as taught by Wang for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known material for a package substrate. Regarding claim 7, Figures 9B-9C and 11F of Gangal disclose wherein: the core 504 comprises a first surface and an opposing second surface, and the at least one of the capacitors 811 extends through a thickness of the core 504, contacting the first surface and the second surface. Regarding claim 9, Figures 9B-9C and 11F of Gangal disclose wherein: the first tubular layer 921 is conductively coupled to a first conductive structure 814a (“electrodes”- ¶0078) configured to operate at a first voltage (¶0078), the fifth tubular layer 927 is conductively coupled to a second conductive structure 814b (“electrodes”- ¶0078) configured to operate at a second voltage (¶0078), and the first conductive structure 814a and the second conductive structure 814b are in organic materials 501, 507 (“dielectric material layers”- ¶¶0044, 0084) on at least a first side or a second side of the core 504, the second side being opposite to the first side. Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over the combined teachings of Gangal and Wang in further view of Cai et al. (US 2022/0059554 A1, hereinafter “Cai”). Regarding claim 3, Figures 9B-9C and 11F of Gangal disclose wherein the first tubular layer 921 and the fifth tubular layer 927, which act as the conductors of the capacitor 811, comprise tantalum (¶0089). Gangal does not expressly disclose wherein the first tubular layer and the fifth tubular layer comprise at least one of: copper, iridium, a compound comprising iridium and oxygen, ruthenium, a compound comprising ruthenium and oxygen, or a compound comprising titanium and nitrogen. Figure 1C of Cai discloses a semiconductor device comprising a capacitor 168 (“capacitor”- ¶0036) wherein conductors (i.e., “conducting material”- ¶0036) of the capacitor 168 comprise tantalum or titanium nitride (¶0036). In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that the first tubular layer and the fifth tubular layer, which act as the conductors of the capacitor, comprise a compound comprising titanium and nitrogen (i.e., titanium nitride), as taught by Cai for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known conducting material for the conductors of the capacitor (Cai ¶0036). Regarding claim 4, Gangal does not expressly disclose wherein the first dielectric material comprises at least one of: a compound comprising titanium and oxygen, a compound comprising hafnium and oxygen, or a compound comprising zirconium and oxygen. Figure 1C of Cai discloses a semiconductor device comprising a capacitor 168 (“capacitor”- ¶0036) wherein a dielectric material (i.e., “insulating dielectric material”- ¶0036) of the capacitor 168 comprises hafnium oxide (¶0036). In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that the first dielectric material comprises a compound comprising hafnium and oxygen (i.e., hafnium oxide) as taught by Cai for the purpose of utilizing a suitable and well-known insulating dielectric material for the dielectric material of the capacitor (Cai ¶0036). Allowable Subject Matter Claims 2, 5-6, 8 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 2, the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the first dielectric material is a crystalline inorganic material and the second dielectric material is an amorphous organic material”. Regarding claim 5, the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the second dielectric material comprises at least one of: polytetrafluoroethylene (PTFE), poly (1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane), or poly (1,3,5,7-tetravinyl-1,3,5,7-tetramethylcyclotetrasiloxane)”. Regarding claim 6, the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein: the first dielectric material has a first dielectric constant, the second dielectric material has a second dielectric constant, and the first dielectric constant is higher than the second dielectric constant”. Regarding claim 8, the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein: the core comprises a first surface and an opposing second surface, and the at least one of the capacitors extends partially through a thickness of the core, contacting one of the first surface or the second surface”. Regarding claim 10, the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein: the first conductive structure comprises an annular conductive trace overlapping the first tubular layer in plan view”. Claims 11-15 and 17-20 are allowed. Regarding independent claim 11, Figures 9B-9C and 11F of Gangal, specifically the overall configuration shown in Figure 11F with further details shown in Figures 9B-9C, disclose a package substrate, comprising: a core 504 (“core”- ¶0053) including a continuous polyimide material (¶0044), the core 504 having a first surface and an opposing second surface and a capacitor 811 (“capacitive element”- ¶0076) in the continuous polyimide material layers of a first organic dielectric material 501, 507 (“dielectric material layers”- ¶¶0044, 0084) on at least one side of the core 504, the layers 501, 507 being parallel to the first surface and the second surface; conductive traces 814a, 814b (“electrodes”- ¶0078) between the layers of the first organic dielectric material 501, 507, the conductive traces 814a, 814b being parallel to the first surface and the second surface; and wherein: the capacitor 811 comprises a dielectric structure 922 (“dielectric material”- ¶0085) between two conductive structures 921, 927 (“conductors”- ¶0085); and the two conductive structures 921, 927 are conductively coupled to the conductive traces 814a, 814b. Gangal does not expressly disclose wherein the core of the package substrate is of solid continuous glass. Wang discloses a semiconductor device comprising a package substrate which is comprises of a solid continuous glass material or a polyimide material (¶0021). In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gangal such that the core of the package substrate is of solid continuous glass as taught by Wang for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known material for a package substrate. The combined teachings do not expressly disclose conductive vias through the layers of the first organic dielectric material, the conductive vias being perpendicular to the first surface and the second surface, and wherein the dielectric structure comprises a second organic dielectric material between two inorganic dielectric materials, and the two conductive structures are conductively coupled to the conductive vias. Thus, regarding independent claim 11, the claim is allowed, because the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “conductive vias through the layers of the first organic dielectric material, the conductive vias being perpendicular to the first surface and the second surface”, “wherein the dielectric structure comprises a second organic dielectric material between two inorganic dielectric materials” and “the two conductive structures are conductively coupled to… the conductive vias”. Claims 12-15 are allowed as being dependent on allowed claim 11. Regarding independent claim 17, Figures 9B-9C and 11F of Gangal, specifically the overall configuration shown in Figure 11F with further details shown in Figures 9B-9C, disclose a capacitor structure, comprising: a first conductive structure 921 (“conductors”- ¶0089) of a metallic material (¶0089); a second conductive structure 927 (“conductors”- ¶0089) of the metallic material (¶0089); and a dielectric structure 922 (“dielectric material”- ¶0085) between the first conductive structure 921 and the second conductive structure 927. Gangal does not expressly disclose wherein the dielectric structure comprises a first layer of crystalline inorganic material, a second layer of the crystalline inorganic material and a layer of amorphous organic dielectric material between the first layer and the second layer. Thus, regarding independent claim 17, the claim is allowed, because the prior art of record including Gangal and/or Wang, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the dielectric structure comprises: a first layer of crystalline inorganic material; a second layer of the crystalline inorganic material; and a layer of amorphous organic dielectric material between the first layer and the second layer”. Claims 18-20 are allowed as being dependent on allowed claim 18. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Lee et al. (US 2017/0040255 A1), which discloses a capacitor comprised of annular/tubular conductive and dielectric layers. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C CHANG/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Dec 30, 2022
Application Filed
Jul 19, 2023
Response after Non-Final Action
Apr 30, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+14.1%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 663 resolved cases by this examiner. Grant probability derived from career allowance rate.

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