DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to Amendment filed on November 14, 2025.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 4-8 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, claim 1 recites the limitation "that of the P-well" recited in the last line of claim 1. There is insufficient antecedent basis for this limitation in the claim, because the phrase “that of the P-well” implies “the ion doping concentration of the P-well”, however, the claim does not previously recite “an ion doping concentration of the P-well” before claiming “that of the P-well” or “the ion doping concentration of the P-well”, and therefore, it is not clear whether the limitation “that of the P-well” suggests that the P-well has a uniform p-type ion dopant concentration, or “that of the P-well” should be interpreted as “an ion doping concentration of the P-well” where the ion doping concentration may vary inside the P-well. Claims 2, 4-8 and 19 depend on claim 1, therefore, claims 2, 4-8 and 19 are also indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-7, as best understood, are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Andoh (US 2001/0053054).
An alternative interpretation of Andoh, differing from the previous Office Action filed on 8/14/2025, has been applied.
Regarding claim 1, Andoh discloses for an electrostatic protection structure (Title, Abstract) comprising that
a first diode structure (diode Xn1/Qrn1/Qr1, Figs. 7 and 10), the first diode structure comprises a first diode substructure (Qrn1/Qr1, Fig 10), wherein a first terminal of the first diode substructure is connected to a ground terminal (terminal connected to between p+ diffusion layer 12/13 and the ground (GND), see the attached Fig. 10 below), and a second terminal of the first diode substructure is connected to a signal terminal (terminal connected to among IN, n+ diffusion layer 9/p+ diffusion layer 11 and internal circuit element (far-right side), see Fig. 10 below); and
a second diode structure (diode Xp1/Qrp1/Qp1, Figs. 7 and 11) adjacent to the first diode structure (Fig. 5), the second diode structure comprises a second diode substructure (Qrp1/Qp1, Fig 11) which adjacent to the first diode substructure, because Applicant does not specifically claim what geometrical orientation the first and second diode substructures has, as shown in Fig. 7 of Andoh below, Qn1 and Qp1 by Andoh are vertically adjacent each other (Fig. 7), wherein a first terminal of the second diode substructure is connected to a power supply terminal (terminal connected to power supply Vdd, see the attached Fig. 11 below), and a second terminal of the second diode substructure is connected to the signal terminal (terminal connected to among IN, p+ diffusion layer 29/n+ diffusion layer 31 and internal circuit element (far-right side), see Fig. 11 below);
wherein a breakdown voltage of the first diode structure and/or a breakdown voltage of the second diode structure is less than a preset threshold, because Andoh further discloses “Normally, trigger voltage Vt1 is set to be lower than the breakdown voltage of a MOSFET of an internal circuit element (i.e., the breakdown voltage of a gate oxide film)”;
the first diode substructure (Qrn1/Qr1, Fig 10) comprises: P-type regions (p+ diffusion layers 12 and 13, Fig. 10), an N-type region (n+ diffusion layer 9, Fig. 10), and a P- well (p-type well 3, Fig. 10);
each of the P-type regions (each of 12 and 13, Fig. 10) serves as the first terminal of the first diode substructure (terminal connected to GND, Fig. 10), and each of the N-type region (9, Fig. 10) serves as the second terminal of the first diode substructure (terminal connected to IN and internal circuit element, Fig. 10);
the first diode structure (diode Xn1/Qrn1/Qr1, Figs. 7 and 10) further comprises: a first doped region positioned in the P-well (in 3, Fig. 10) and below the N-type region (below 9. Fig. 10), because the Merriam-Webster dictionary defines a word “region” as “an indefinite area of the world or universe”, therefore, an interface between p-type well 3 and n+ diffusion layer 9 by Andoh can be selected as the first doped region in the claimed invention; and
an ion doping concentration of the first doped region is greater than that of the P-well, because Applicant does not specifically claim what dopant species are implanted into the first doped region, e.g., whether the region includes p-type dopants such as boron or n-type dopants such as arsenic, at the interface between the p-type well 3 and n+ diffusion layer 9 by Andoh, the net ion concentration including contributions from both p-type boron dopant ([0084]) and n-type arsenic dopant ([0088]) would be greater than the ion concentration of the p-type well 3 alone. The claimed limitation “that of the P-Well” was discussed in 35 U.S.C. 112(b) rejections above.
Regarding claim 2, Andoh further discloses for the electrostatic protection structure according to claim 1 that the P-well and the N-type region form a PN junction, because it is inherent that P-type well 3 and n+ diffusion layer 9 by Andoh would form PN junction, and a shallow trench isolation structure (field oxide film 2, Fig. 10) is provided between adjacent two of the P-type regions (between 12 and 13, Fig. 10).
Regarding claim 4, Andoh further discloses for the electrostatic protection structure according to claim 2 that a type of doping ions in the first doped region (p-type doping of p-type well 3, Fig. 10) is identical to a type of doping ions in the P-type region (12/13, Fig. 10), comprising boron ions, because “implanting boron into an nMOSFET formation region by… so as to form a p-type well 3” (emphasis added, [0084]).
Regarding claim 5, Andoh further discloses for the electrostatic protection structure according to claim 1 that the second diode structure (diode Xp1/Qrp1/Qp1, Figs. 7 and 11) comprises a second diode substructure (Qrp1/Qp1, Fig. 11), the second diode substructure comprises: a P-type region (p+ diffusion layer 29, Fig. 11), N-type regions (n+ diffusion layers 32/33, Fig. 11), and a first N-well (n-type well 23, Fig. 11);
each of the N-type regions (32/33, Fig. 11) serves as the first terminal of the second diode substructure (terminal connected to the power supply Vdd, Fig. 11), the P-type region (29, Fig. 11) serves as the second terminal of the second diode structure (terminal connected to internal circuit element, Fig. 11), the first N-well (23, Fig. 11) and the P-type region (29, Fig. 11) form a PN junction, because it is inherent that P-type well 3 and n+ diffusion layer 9 by Andoh would form PN junction, and a shallow trench isolation structure (field oxide film 2, Fig. 11) is provided between adjacent two of the N-type regions (32/33, Fig. 11).
Regarding claim 6, Andoh further discloses for the electrostatic protection structure according to claim 5 that the second diode structure (diode Xp1/Qrp1/Qp1, Figs. 5 and 11) further comprises: a second doped region positioned in the first N-well (23, Fig. 11) and below the P-type region (29, Fig. 11), because the Merriam-Webster dictionary defines a word “region” as “an indefinite area of the world or universe”, therefore, an arbitrary region of n-type well 23 adjacent to and below p+ diffusion layer 29 by Andoh can be selected as the second doped region in the claimed invention.
Regarding claim 7, Andoh further discloses for the electrostatic protection structure according to claim 6 that a type of doping ions in the second doped region (n-type doping of n-type well 23, Fig. 11) is identical to a type of doping ions in the N-type region (32/33, Fig. 11), comprising phosphorus ions and arsenic ions, because “Next, to form an n-type well 4, phosphorus is implanted into each diode formation region of the diode array Xn1… and further, arsenic is implanted by…” (emphasis added, [0085]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over by Andoh (US 2001/0053054).
Regarding claim 8, Andoh discloses for the electrostatic protection structure according to claim 1 that a substrate, wherein the substrate (substrate 1, Figs. 10-11) comprises a semiconductor substrate (silicon substrate, [0083]) and p-type substrate.
Andoh does not explicitly disclose that a deep N-well layer positioned on the semiconductor substrate, and/or a second N-well positioned beside the first diode structure and away from a direction of the second diode structure.
However, Andoh further discloses that “As the structure of the electrostatic protection circuit of this embodiment is similar to that of the electrostatic protection circuit shown in FIG. 10 and FIG. 11 except that the additional deep n-type well surrounding the p-type well is required to bias the substrate of the nMOSFET, the description is omitted” (emphasis added, [0113]), therefore, one of ordinary skill in the semiconductor circuitry would readily recognize that a deep n-type well can be formed in a surrounding area of p-type well on a semiconductor substrate.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a deep n-type well region (or deep N-well) can be formed on a p-type semiconductor substrate of an electrostatic discharge protection circuit, as disclosed by Andoh, in order to effectively isolate pMOSFET and other circuit components from the p-type semiconductor substrate and bias the substrate of the nMOSFET, as well known in the art.
Response to Arguments
Applicant's arguments filed in November 14, 2025 have been fully considered but they are not persuasive, for the reasons discussed above, an alternate interpretation of Andoh, different from the previous Office Action, in connection with the rejections of claim 1 above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/JAY C KIM/Primary Examiner, Art Unit 2815
/WOO K LEE/Examiner, Art Unit 2815
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