DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
The present application, 18150810, filed 01/06/2023 Claims Priority from Provisional Application 63404545, filed 09/08/2022; 18150810 Claims Priority from Provisional Application 63434924, filed 12/22/2022.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 20 in Figure 1A.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 11, 13, 15, 17 and 20 are objected to under 37 C.F.R. 1.71(a) which requires “full, clear, concise, and exact terms” as to enable any person skilled in the art or science to which the invention or discovery appertains, or with which it is most nearly connected, to make and use the same. The following should be corrected.
A. In claim 11 lines 1-2, “wherein inspecting non-zero operands in input vectors” should read “wherein inspecting the non-zero operands in the input vectors” instead because these limitations are already introduced in claim 10 from which the claim depends.
B. In claim 13 lines 1-2, “wherein generating MUX selection signals for swapping the non-zero operands according to a set of swapping policies” should read “wherein generating the MUX selection signals for swapping the non-zero operands according to [[a]] the set of swapping policies” instead because these limitations are already introduced in claim 10 from which the claim depends. Claim 15 recites a similar limitation and is objected for the same reason
C. In claim 17 line 3, “performing additions” should read “performing the additions” instead because this limitation is already introduced in claim 10 from which the claim depends. Claim 20 recites a similar limitation and is objected for the same reason.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “the MUX selection signal” in lines 7-8 and 8-9. It is unclear whether this is supposed to be interpreted to refer to the MUX selection signals or a specific MUX selection signal of the MUX selection signals. For purposes of examination, this is interpreted to refer to the MUX selection signals. Claims 7, 10 and 16 recite a similar limitation and are rejected for the same reason. Claims 2-9 inherit the same deficiency as claim 1 by reason of dependence. Claims 11-17 inherit the same deficiency as claim 10 by reason of dependence.
Claim 3 recites “in response to the operand in a former order of the input vector being inspected as zero, swapping the non-zero operand in a latter order of the input vector with the operand in the former order of the input vector”. There is insufficient antecedent basis for the underlined limitations in the claim. Claim 1 recites operands and input vectors are recited in plural form, therefore, it is unclear which specific operand of the operands and input vector of the input vectors are being referred to. For purposes of examination, this is interpreted as “in response to an operand in a former order of an input vector being inspected as zero, swapping a non-zero operand in a latter order of the input vector with the operand in the former order of the input vector. Claim 4 recites “the operand in the former order of the input vector” in line 3 and is rejected for the same reason. Claim 12 recites the same limitations as claim 3 and is rejected for the same reason. Claim 13 recites the same limitations as claim 4 and is rejected for the same reason. Claim 4 inherit the same deficiency as claim 3 by reason of dependence. Claim 13 inherit the same deficiency as claim 14 by reason of dependence.
Claim 4 recites “the operand in the latter order” in line 5. There is insufficient antecedent basis for this limitation in the claim. It is unclear whether this is supposed to refer to the non-zero operand in the latter order or to a different operand. For purposes of examination, this is interpreted as the non-zero operand in the latter order instead. Claim 13 recites the same limitations as claim 4 and is rejected for the same reason.
Claim 5 recites “the operand” in line 5. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as an operand. Claim 14 recites the same limitations as claim 5 and is rejected for the same reason. Claim 6 inherit the same deficiency as claim 5 by reason of dependence. Claim 15 inherit the same deficiency as claim 14 by reason of dependence.
Claim 18 recites “in response to the operand in a former order of the input vector being inspected as zero, swapping the non-zero operand in a latter order of the input vector with the operand in the former order of the input vector”. There is insufficient antecedent basis for the underlined limitations in the claim. For purposes of examination, this is interpreted as “in response to an operand in a former order of an input vector being inspected as zero, swapping an non-zero operand in a latter order of the input vector with the operand in the former order of the input vector” instead. Claims 19-20 inherit the same deficiency as claim 18 by reason of dependence.
Claim 19 recites “the operands” in lines 2, 3 and 5. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, the first recitation in line 2 interpreted as operands instead.
Further, claim 19 recites the operand” in line 6. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this is interpreted as an operand.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 18-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under Step 1, claims 18-20 recite a series of steps and, therefore, is a process.
Under Step 2A prong 1, claim 18 recites
A computation method with input swapping, comprising:
inspecting non-zero operands in input vectors;
for each two operands in the input vectors, in response to the operand in a former order of the input vector being inspected as zero, swapping the non-zero operand in a latter order of the input vector with the operand in the former order of the input vector; and
performing additions on the input vectors with the swapped operands by an adder tree to output a computation result.
The above underlined limitations amounts to processing mathematical relationships/calculations and falls within the “Mathematical Concepts” and “Mental Processes” grouping of abstract ideas. The steps of “inspecting”, “swapping” and “performing” is a process that under its broadest reasonable interpretation, covers performance of the limitation in the mind. That is, other than reciting “an adder tree”, nothing in the claim element precludes the step from practically being performed in the human mind. For example, but for the “an adder tree” language, the claim encompasses manually inspecting non-zero elements in a four element input vector, swapping a non-zero element in the third or fourth location in the input vector with a zero-operand in the third or fourth location in the input vector as shown in at least rows 2-4 of Fig. 1B then adding the elements of the input vector to compute the result with or without using pen and paper. Accordingly, the claim is directed to recite an abstract idea.
Under step 2A prong 2, the claim recites the following additional elements: an adder tree. However, the additional elements of “an adder tree” is recited at a high-level of generality (i.e., as a generic adder tree for adding an array of inputs) such that it amounts to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as a tool to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 18 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “an adder tree” is recited at a high-level of generality (i.e., as a generic adder tree for adding an array of inputs) such that it amounts to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as a tool to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) for more information. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under step 2A prong 1, claims 19-20 recite the same abstract idea as claim 18 by reason of dependence. Further, claim 19 recites further steps of swapping the inputs as shown in at least row 11 of Fig. 1B where “for a first set of the operands and a second set of the operands in the input vectors, in response to the first set of the operands to be swapped in a first stage both being non-zero operands, swapping the non-zero operand in a latter order in the first set with a zero operand in a latter order in the second set of the operands having two zero operands in a second stage before the first stage, and swapping the non-zero operand being swapped to the second set with the operand in a former order in the second set”; and claim 20 recites further details of the abstract idea of performing the addition where “performing the additions on the input vectors with the swapped operands to output the computation result comprises: performing in a first level of the plurality of levels, additions on N bits of two operands in the input vectors with the swapped operands, wherein N is a positive integer; and performing, in a M-th level of the plurality of levels, additions on bits output by one or more adders in a (M-1)-th level, wherein M is a positive integer” which falls within the “Mathematical Concepts” and “Mental Processes” grouping of abstract ideas. In particular claim 19 does not include additional elements that would require further analysis under step 2A prong 2 and step 2B. Accordingly, the claims are directed to recite an abstract idea.
Under step 2A prong 2, claim 20 recites the following additional elements: a plurality of adders. However, the additional elements of “a plurality of adders” is recited at a high-level of generality (i.e., as generic adders for adding) such that it amounts to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as a tool to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) for more information. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under step 2B, claim 20 does not include additional elements that, individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a plurality of adders” is recited at a high-level of generality (i.e., as generic adders for adding) such that it amounts to no more than merely reciting the words “apply it” (or an equivalent) with the judicial exception or merely as a tool to implement the abstract idea. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) for more information. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Allowable Subject Matter
Claims 1-20 would be allowable if rewritten to overcome the 35 U.S.C. 112(b) rejections discussed above; and if claims 18-20 are rewritten to overcome the 35 U.S.C. 101 rejection discussed above.
The following is a statement of reasons for the indication of allowable subject matter:
Terashima et al. (US 20230376415 A1) discloses an apparatus comprising a group controller configured to receive input vectors, detect positions of zero operands in the input vectors and generates a zero-indicative signal corresponding to the zero operands; a parameter switch circuit configured to configured to swap positions of the zero operands with a non-zero operand in order to group zero-operands to disable a group of multiplier assigned to the zero-operands; and a multiply-accumulate (MAC) circuit configured to multiply the swapped operands to generate products and add the products to generate a computation result as shown in at least Fig. 3A and described in paragraphs [0046-0065]. However, Terashima fails to explicitly teach or suggest providing the swapped operands to the adders and adding the swapped operands to generate a computation result. Therefore, Terashima fails to explicitly teach or suggest, “an adder tree, configured to receive the input vectors with the swapped operands output by the swapper matrix circuit and perform additions on the received input vectors to output a computation result” as recited in claim 1; “performing additions on the input vectors with the swapped operands output by the swapper matrix circuit by an adder tree to output a computation result” as recited in claim 10; and “performing additions on the input vectors with the swapped operands by an adder tree to output a computation result” as recited in claim 18.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlo Waje whose telephone number is (571)272-5767. The examiner can normally be reached 9:00-6:00 M-F.
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/Carlo Waje/Examiner, Art Unit 2151 (571)272-5767
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