Prosecution Insights
Last updated: April 19, 2026
Application No. 18/150,863

PHASE-CHANGE DEVICE STRUCTURE

Non-Final OA §103
Filed
Jan 06, 2023
Examiner
AMER, MOUNIR S
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
3 (Non-Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
2y 2m
To Grant
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
531 granted / 602 resolved
+20.2% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
24 currently pending
Career history
626
Total Applications
across all art units

Statute-Specific Performance

§103
55.1%
+15.1% vs TC avg
§102
24.4%
-15.6% vs TC avg
§112
8.2%
-31.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 602 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Application This Office Action is in response to Applicant’s application 18/150,863 filed on February 25 2026 in which claims 1 to 25 are pending. Claims 16-20 are canceled. Claim 9 is amendment. Drawings The drawings submitted on May 22, 2025 have been reviewed and accepted by the Examiner. Information Disclosure Statement The Information Disclosure Statement (IDS), filed on January 06 2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner. Notation References to patents will be in the form of (C:L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ XXXX). Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 25 2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-13 and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Yen et al. (US 2007/0285962 A1; hereinafter “Yen”) in view of Ok et al. (US 2023/0189536 A1; hereinafter “Ok”). Regarding claim 1, Yen teaches in Figure 2E and related e.g. a structure, comprising: a first electrode (230, ¶0021) and a second electrode (230 on the second side, ¶ 0021) disposed over a substrate (200; ¶ 0022); a first dielectric layer (228; Fig.2E; ¶ 0024) disposed between the first electrode (230) and the second electrode (230); a phase-change material layer (232, ¶ 0026) disposed over the first electrode (230), the dielectric insulation layer (228 formed between 230) and the second electrode (230); an insulator layer (234, ¶0027) disposed over the phase-change material layer (232); and a metal feature (244; ¶ 0029) disposed on a top surface of the insulator layer (234); wherein the metal feature extends lengthwise along a second direction perpendicular to the first direction (extends in the lengthwise along X-axis, Y-axis). Yen does not teach a second dielectric layer disposed over the insulator layer, first electrode, the second electrode, the phase-change material layer, and the metal feature. However, Ok teaches a second dielectric layer (1504, Fig. 15; ¶ 0068) disposed over the insulator layer (1204; Fig.15; ¶ 0063), the first electrode (314), the second electrode (314), the phase-change material layer (902; ¶ 0051), and the metal feature (1304; ¶ 0064). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have a dielectric layer disposed over the first electrode, the second electrode, the phase-change material layer, and the metal feature in the device of Yen as taught by Ok to protect the expose surface of the metal layer. Regarding claim 2, Yen teaches the first electrode and the second electrode comprise tantalum, titanium, hafnium, ruthenium, platinum, iridium, molybdenum, tungsten, a combination thereof, or a nitride compound thereof (TiAlN; ¶ 0024). Regarding claim 3, Yen teaches the metal feature comprise tantalum, titanium, hafnium, ruthenium, platinum, iridium, molybdenum, tungsten, a combination thereof, or a nitride compound thereof (TiAlN; ¶ 0024). Regarding claim 4, Yen teaches wherein the phase-change material layer comprises germanium antimony tellurium (GeSbTe), silver indium antimony tellurium (AgInSbTe), or germanium tellurium (GeTe) (¶ 0025). Regarding claim 5, Yen teaches wherein the insulator layer (234; Fig.2E) comprises silicon nitride (¶ 0027), silicon oxycarbide, or silicon carbide. Regarding claim 6, Yen as modified by Ok teaches wherein the first dielectric layer (Yen 228; Fig.2E) and the second dielectric layer (Ok 1504; Fig.15) comprise silicon oxide (228; ¶ 0024; Ok teaches 1502; ¶ 0068). Regarding claim 7, Yen as modified by Ok teaches a mask layer (1502, Fig. 15; ¶ 0067) disposed between the metal feature (1304; Fig.15) and the second dielectric layer (1504). Regarding claim 8, Yen as modified by Ok wherein a composition of the mask layer (1502, Fig. 15; ¶ 0067; “SiN”) disposed is different from a composition of the second dielectric layer (1504; Fig.15; ¶ 0068; “SiO”). Regarding claim 9, Yen teaches in Figure 2D and related e.g. a structure, comprising: a first electrode (230, ¶0021) and a second electrode (230 on the second side, ¶ 0021) spaced apart from one another along a first direction space by a dielectric insulation layer (X-axis or Y-axis); a phase-change material layer (232, ¶ 0026) spanning over and in contact with top surfaces of the first electrode 230), the dielectric insulation layer (228 formed between 230) and the second electrode (230); an insulator layer (234, ¶0027) disposed over the phase-change material layer (232); and a metal feature (244; ¶ 0029) disposed on the insulator layer (234); wherein the metal feature extends lengthwise along a second direction perpendicular to the first direction (extends in the lengthwise along X-axis, Y-axis). Yen does not teach a spacer layer extending along and interfacing with sidewalls of the phase-change material layer and the insulator layer. However, Ok teaches in the same field of endeavor, teaches a memory device (Fig. 15) a spacer layer (1202; Fig. 15; ¶ 0062) extending along and interfacing with sidewalls of the phase-change material layer (902’; Fig.15; ¶ 0062) and the insulator layer (1204; Fig.12; ¶ 0063). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have a spacer layer extending along and interfacing with sidewalls of the phase-change material layer and the insulator layer in the device of Yen as taught by Ok for the purpose of protecting the exposed surfaces of the PCM material and the sidewalls of the PCM unit (¶ 0062). Regarding claim 10, Yen teaches the metal feature, the first electrode and the second electrode comprise tantalum, titanium, hafnium, ruthenium, platinum, iridium, molybdenum, tungsten, a combination thereof, or a nitride compound thereof (TiAlN; ¶ 0024). Regarding claim 11, Yen teaches wherein the phase-change material layer comprises germanium antimony tellurium (GeSbTe), silver indium antimony tellurium (AgInSbTe), or germanium tellurium (GeTe) (¶ 0025). Regarding claim 12, Yen teaches the phase-change material layer (232; Fig.2E; ¶ 0026) comprises a top surface (top surface of 232; Fig.2E) and bottom surface opposing the top surface (bottom surface of 232; Fig.2E), wherein the bottom surface (bottom surface of 232) contacts the top surfaces of the first electrode and the second electrode (top surface of 230; Fig.2E), wherein the top surface (top surface of 230) is spaced apart from the metal feature (244) by the insulator layer (234; Fig.2E). Regarding claim 13, Yen does not teach the dielectric layer disposed over the first electrode, the second electrode, the phase-change material layer, and the metal feature. However, Ok teaches a dielectric layer (1502, Fig. 15; ¶ 0067; “SiN”) disposed over the first electrode (314), the second electrode (314), the phase-change material layer (902; ¶ 0051), and the metal feature (1304; ¶ 0064). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have a dielectric layer disposed over the first electrode, the second electrode, the phase-change material layer, and the metal feature in the device of Yen as taught by Ok to protect the expose surface of the metal layer. Regarding claim 21, Yen teaches in Figure 2E and related e.g. a structure, comprising: a substrate (200; ¶ 0022); an etch stop layer (224; Fig.2E; ¶ 0023) over the substrate (200); a first electrode (230, ¶0021) and a second electrode (230 on the second side, ¶ 0021) disposed over the etch stop layer (224); a first dielectric layer (228; Fig.2E; ¶ 0024) disposed between the first electrode (230) and the second electrode (230) along a direction (X-direction); a phase-change material layer (232, ¶ 0026) extending over the first electrode (230), the dielectric insulation layer (228 formed between 230) and the second electrode (230); an insulator layer (234, ¶0027) disposed over the phase-change material layer (232); and a heating element (244; ¶ 0029; an electrode can be a heating element) disposed on a top surface of the insulator layer (234); a second dielectric layer (242; ¶ 0029) disposed over the first electrode (230) and the second electrode (230). Yen does not teach a third dielectric layer disposed over the second dielectric layer, the insulator layer and heating element. However, Ok teaches a third dielectric layer (1504, Fig. 15; ¶ 0068) disposed over the second dielectric layer (1502; ¶ 0067), the insulator layer (1204; Fig.15; ¶ 0063) and the heating element (1304; ¶ 0064). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have a third dielectric layer disposed over the second dielectric layer, the insulator layer and heating element in the device of Yen as taught by Ok to protect the expose surface of the metal layer. Regarding claim 22, Yen does not teach wherein sidewalls of the phase-change material layer are spaced apart from the second dielectric layer by a sidewall spacer. However, Ok teaches in the same field of endeavor, teaches a memory device (Fig. 15) wherein sidewalls of the phase-change material layer (902’; Fig.15; ¶ 0062) are spaced apart from the second dielectric layer (1502) by a sidewall spacer (1202; ¶ 0062). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have sidewalls of the phase-change material layer are spaced apart from the second dielectric layer by a sidewall spacer in the device of Yen as taught by Ok for the purpose of protecting the exposed surfaces of the PCM material and the sidewalls of the PCM unit (¶ 0062). Regarding claim 23, Yen teaches wherein the phase-change material layer comprises germanium antimony tellurium (GeSbTe), silver indium antimony tellurium (AgInSbTe), or germanium tellurium (GeTe) (¶ 0025). Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Yen et al. (US 2007/0285962 A1; hereinafter “Yen”) in view of Ok et al. (US 2023/0189536 A1; hereinafter “Ok”) as applied to claim 21 above and further in view of Li et al. (US 2021/0288250 A1; hereinafter “Li”). Regarding claim 25, Yen as modified by Ok does not teach the insulator layer comprises a thickness between about 300 Å and about 1500Å. However, Li teaches in the same field of endeavor a memory device (Fig.4A) with a PCM layer (408; Fig.4A; ¶ 0044) and insulator (412; Fig.4A; ¶ 0044) formed on the PCM (408) wherein the insulator layer (412) comprises a thickness between about 300 Å and about 1500Å (30nm to 300 nm; 300Å to 3000 Å; ¶ 0044). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date, to have the insulator layer comprises a thickness between about 300 Å and about 1500Å in the device of Yen and Ok as taught by Li since since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. See MPEP § 2144.05. Allowable Subject Matter Claims 14, 15 and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant’s submission for a request for continued examination under 37 CFR 1.114 on February 25 2026 has been accepted. All the claims are re-examined including claims indicated allowable under the final rejection sent on December 17 2025. Under further consideration of the prior art on record and the allowable subject matter in each of claims 1-8 and 21-25, the Office concludes that claims 1-8 and 21- 23 are rejectable under the prior art. For at least the following reason the claims 1-13 and 21-23 are rejected. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mounir S Amer/ Primary Examiner, Art Unit 2818
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Prosecution Timeline

Jan 06, 2023
Application Filed
Jun 14, 2025
Non-Final Rejection — §103
Sep 15, 2025
Response Filed
Dec 13, 2025
Final Rejection — §103
Feb 19, 2026
Response after Non-Final Action
Mar 04, 2026
Request for Continued Examination
Mar 04, 2026
Response after Non-Final Action
Mar 12, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+8.6%)
2y 2m
Median Time to Grant
High
PTA Risk
Based on 602 resolved cases by this examiner. Grant probability derived from career allow rate.

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