DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of invention Group I and Species I (FIG. 10) in the reply filed on 1/14/2026 is acknowledged.
Applicant allege claims 1-10 read on the elected species. However, upon further consideration, claim 10 reciting “removing the substrate; and forming a common second electrode over the first and the second pillar structures on an opposite side of the first and second light emitting diodes from the first electrodes” pertains to features of non-elected Species II (FIG. 11). As shown in FIG. 11, the common second electrode 1102 is formed on a bottom side of the light emitting diodes 601a,601b after removing the growth substrate 102. Whereas, elected Species I as shown in FIG. 10, retains the buffer layer 104 and the substrate 102. Therefore, claim 10 does not read on the elected Species I.
Claims 10-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species and invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/14/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 6-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 3 reciting “third portions of the semiconductor regrowth layer, the semiconductor active layer and the second-conductivity-type compound semiconductor layer” render the claim indefinite. It is unclear whether “third portions” is intended to recite a plurality of third portions of each of the semiconductor regrowth layer, the semiconductor active layer and the second-conductivity-type compound semiconductor layer. Or does “third portions” refer to a third portion of the semiconductor regrowth layer, a third portion of the semiconductor active layer and “a third portion” of the second-conductivity-type compound semiconductor layer.
Claim 3 reciting “the third portion second-conductivity-type compound semiconductor layer” further renders the claim indefinite because the “second-conductivity-type compound semiconductor layer” is not only composed of “third portion”. It is unclear if “the third portion” here is intended to refer to the “third portion of the second-conductivity-type compound semiconductor layer”.
Claim 3 reciting “first and second portions of the semiconductor active layer located over the first and the second pillar structures, respectively” renders the claim indefinite. It is unclear if the claim requires “a plurality of first portions of the semiconductor active layer located over the first pillar structure” and “a plurality of second portions of the semiconductor active layer located over the second pillar structure”. Or is the claim scope intended to recite “a first portion and a second portion of the semiconductor active layer located over the first and the second pillar structures, respectively”.
Claim 8 reciting “a first portion of the semiconductor regrowth layer” renders the claim indefinite for lacking antecedent basis. No “semiconductor regrowth layer” has been recited previously in claim 8 or claim 1.
Other claims are rejected for depending on a rejected claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 and 6-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yan et al. US 2012/0025230 A1 (Yan).
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In re claim 1, Yan discloses (e.g. FIGs. 1-3) a method of forming light emitting diodes, comprising:
forming a first-conductivity-type compound semiconductor layer 251,252 over a substrate 10 (¶ 73);
etching the first-conductivity-type compound semiconductor layer 251,252 (¶ 78) to form a first pillar structure 25 (of a LED structure 2) and a second pillar structure 25 (of another LED structure 2) without exposing the substrate 10 between the first and the second pillar structures (substrate 10 covered by layer 20);
selectively growing a semiconductor active layer 402 (¶ 78) over the first and the second pillar structures 25 (of LED structures 2); and
selectively growing a second-conductivity-type compound semiconductor layer 502 (¶ 78) on the semiconductor active layer 402.
In re claim 2, Yan discloses (e.g. FIG. 1-3) further comprising selectively growing a semiconductor regrowth layer 302 on the first pillar structure and the second pillar structure 25 (of LED structures 2), wherein the semiconductor active layer 402 is selectively grown on the semiconductor regrowth layer 302 (¶ 78).
In re claim 3, as best understood, Yan discloses (e.g. FIGs. 1-3) wherein: “third portions” of the semiconductor regrowth layer 301, the semiconductor active layer 401 and the second-conductivity-type compound semiconductor layer 501 are also formed in a trench located between the first pillar structure and the second pillar structure (301,401,501 between adjacent LED structures 2, see FIG. 2); and
a top surface of “the third portion second-conductivity-type compound semiconductor layer” 501 (of LED structures 1) is located below first and second portions of the semiconductor active layer 402 located over the first and the second pillar structures 25 (of LED structures 2), respectively.
In re claim 4, Yan discloses (e.g. FIGs. 1-3) wherein the first-conductivity-type compound semiconductor layer 251,252 and the second-conductivity-type compound semiconductor layer 502 each comprise a Group III-nitride material (¶ 72).
In re claim 6, Yan discloses (e.g. FIGs. 1-3) further comprising forming a compound semiconductor buffer layer 20 over the substrate 10 prior to forming the first-conductivity-type compound semiconductor layer 251,252 (¶ 78).
In re claim 7, Yan discloses (e.g. FIGs. 1-3) wherein:
the substrate 10 comprises sapphire (¶ 72); and
the etching the first-conductivity-type compound semiconductor layer 251,252 comprises etching the first-conductivity-type compound semiconductor layer to expose the compound semiconductor buffer layer 20 in the trench between the first pillar structure and the second pillar structure (between LED structures 2) without exposing the sapphire substrate 10 in the trench between the first and the second pillar structures (¶ 78).
In re claim 8, as best understood, Yan discloses (e.g. FIGs. 1-3) wherein:
the first pillar structure 25 (of a LED structure 2), a first portion of “the semiconductor regrowth layer” 302 located on the first pillar structure 25 (of a LED structure 2), a first portion of the semiconductor active layer 402 located on the first portion of “the semiconductor regrowth layer” 302, and a first portion of the second-conductivity-type compound semiconductor layer 502 located on the first portion of the semiconductor active layer 402 comprise a first light emitting diode 2; and
the second pillar structure 25 (of another LED structure 2), a second portion of “the semiconductor regrowth layer” 302 located on the second pillar structure 25 (of another LED structure 2), a second portion of the semiconductor active layer 402 (of another LED structure 2) located on the second portion of “the semiconductor regrowth layer” 302, and a second portion of the second-conductivity-type compound semiconductor layer 502 (of another LED structure 2) located on the second portion of the semiconductor active layer 402 comprise a second light emitting diode (another LED structure 2).
In re claim 9, Yan discloses (e.g. FIGs. 1-2) further comprising forming first electrodes 713 over the first and the second portions second-conductivity-type compound semiconductor layer 502 in the first and the second light emitting diodes (plural LED structures 2, four shown in FIG. 2, ¶ 83,92).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Yan as applied to claim 4 above, and further in view of Pinos et al. US 2023/0238421 (Pinos).
In re claim 5, Yan discloses the claimed invention including (e.g. FIGs. 1-3)
wherein:
the first-conductivity-type compound semiconductor layer 251,252 comprises a n-type GaN (¶ 72-73) and the second-conductivity-type compound semiconductor layer 502 comprises a p-type GaN (¶ 72-73);
the semiconductor active layer 402 comprises III-nitride (¶ 72-73); and
the semiconductor regrowth layer 302 comprises a n-type GaN layer (¶ 72-73).
Yan does not explicitly discloses the first-conductivity-type compound semiconductor layer 251,252 and the second-conductivity-type compound semiconductor layer 502 are single crystal, the semiconductor active layer 402 comprises at least one InGaN quantum well, each of the first pillar structure 25 and the second pillar structure 25 have a top surface that is a c-plane surface of the n-type GaN, and the semiconductor regrowth layer 302 is lattice matched to a crystal structure of the first pillar structure 25 and the second pillar structure 25 and has a top c-plane surface.
However, Pinos discloses (e.g. FIGs. 6 & 8-9, ¶ 150-151) a method of forming LEDs having single crystal epitaxial layers, including an active layer 22 comprising at least one InGaN quantum well (¶ 118), pillar structures 14 (see FIG. 6) on which the LED layers 16,22,24 (FIG. 9) are formed have a top surface that is a c-plane surface (¶ 69, (0001) crystal plane is the c-plane of III-nitride crystal), and the semiconductor regrowth layer 16 is lattice matched to a crystal structure of pillar structures 14 and has a top c-plane surface (¶ 75).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Yan’s LED layers as single crystals lattice matched to the c-plane as taught by Pinos to reduce strain and defects, thereby improving light emitting efficiency (¶ 10,16,90 of Pinos), and form the active layer to include at least one InGaN quantum well for increasing internal quantum efficiency through quantum confinement and to obtained desired emission wavelength (¶ 118 of Pinos).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET.
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/YU CHEN/Primary Examiner, Art Unit 2896
YU CHEN
Examiner
Art Unit 2896