Prosecution Insights
Last updated: April 19, 2026
Application No. 18/155,681

QUANTUM WELL-BASED LED STRUCTURE ENHANCED WITH SIDEWALL HOLE INJECTION

Non-Final OA §103
Filed
Jan 17, 2023
Examiner
YEMELYANOV, DMITRIY
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Google LLC
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
92%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
393 granted / 538 resolved
+5.0% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
43 currently pending
Career history
581
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
52.4%
+12.4% vs TC avg
§102
23.2%
-16.8% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 538 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions Applicant’s election of Invention II (Claims 12-17 and 26-37) in the reply filed on 02/17/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)) Further, The Examiner notes that there is no Claim 37 in Claims submitted 02/17/2026 along with Response to Election/Restriction filed. Therefore, will treat Claims 12-17 and 26-36 as being elected for examination. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “ at least six quantum wells included in an active region of the semiconductor mesa, the at least six quantum wells having at least five quantum barrier layers respectively interleaved therebetween ” of Claim 1 . “ the first thickness is greater than the second thickness. ” Of Claim 35 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 2 , 13, 14 and 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) . Regarding Claim 12, Gruart (Fig. 1) discloses a method of operating a light emitting diode (LED) including a semiconductor mesa (40) formed on a planar growth surface of an n-doped substrate ( 26 were made of n-type doped GaN ) , the method comprising: applying a voltage between a p-doped semiconductor region (44 “ p-type doped” ) of the LED and the n-doped substrate of the LED (26) , the p-doped semiconductor region (44) being in contact with at least one sidewall of the semiconductor mesa (40) , the at least one sidewall being non-parallel with a growth direction (vertical) of the semiconductor mesa (40) (Fig. 1), applying the voltage [0062-0064, “ The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071] resulting in: holes being injected into at least six quantum wells ( “preferably approximately ten quantum wells 50” ) included in an active region (40) of the semiconductor mesa, the at least six quantum wells having at least five quantum barrier layers (52) respectively interleaved therebetween [0063-0064] ; and each of the at least six quantum wells emitting light with a peak wavelength (Fig. 14) [0111] . Gruart does not explicitly a peak wavelength of at least 600 nanometers. Gruart (Fig. 1 4 ) discloses varying indium content in active areas to control the wavelength [0006, 0095] and further discloses a peak wavelength of about 600 nanometers. [0100- 0111]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart such that a peak wavelength of at least 600 nanometers have the light intensity emitted at the central wavelength of the radiation emitted by the active area to be as high as possible. [0006] and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller , 105 USPQ 233. Regarding Claim 1 3 , Gruart (Fig. 1) discloses the method of claim 12, wherein the growth direction is orthogonal to the planar growth surface (Fig. 1) . Regarding Claim 1 4 , Gruart discloses the method of claim 12, wherein the p-doped semiconductor region (44) contacts (through 40) the planar growth surface. (Fig. 1) . Regarding Claim 34 , Gruart discloses the method of claim 12, wherein the p-doped semiconductor region (44 “ p-type doped” ) comprises a regrown p-type layer (44 “ p-type doped” ) having a first thickness on the at least one sidewall and a second thickness on the planar growth surface. (See Fig. 1) Further, limitation in line 2, “ a regrown p-type layer ” is considered to be product-by-process. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe , 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Claim(s) 26 , 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of in view of Bergmann et al. (US 2011/0187294 A1). Regarding Claim 26 , Gruart discloses the method of claim 12, wherein Gruart does not explicitly disclose a quantum barrier of the at least five quantum barrier layers includes an aluminum gallium nitride (AlGaN) region . Bergmann discloses a quantum barrier of includes an aluminum gallium nitride (AlGaN) region . [ 00 67, 0076 ] . It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Bergmann such a quantum barrier of the at least five quantum barrier layers includes an aluminum gallium nitride (AlGaN) region in order to in order to improve the crystal quality active-region . [00 67, 0076 ] . Regarding Claim 2 7 , Gruart in view of Bergmann discloses the method of claim 26, wherein the AlGaN region has an aluminum content [0067, 0076] Gruart in view of Bergmann does not explicitly disclose an aluminum content of at least 10%. However, i t would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Bergmann such that the AlGaN region has an aluminum content of at least 10% and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller , 105 USPQ 233. Claim(s) 15, 17, 28 and 35 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Yan et al. (US 2011/0315952 A1). Regarding Claim 15, Gruart (Fig. 1) discloses the method of claim 12, wherein applying the voltage further results in a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface. (“The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071). Gruart does not explicitly disclose that 10% or less of a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface. Yan discloses varying a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface (“Depending on the etch patterns defined by mask 15, the laterally injected hole current component can be adjusted. “)[0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Yan such that applying the voltage further results in 10% or less of a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface to eliminate leakage path being eliminate from p-type layer and reduce heat generation in an active-region, especially in an MQW active-region associated with valence band discontinuity, and results in a more uniform hole distribution in the active-region. [0087-0089] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 1 7 , Gruart (Fig. 1) discloses the method of claim 12, wherein, wherein applying the voltage further results in a hole current flowing through the p-doped semiconductor region being injected into the active region. (“The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071). Gruart does not explicitly disclose that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region . Yan discloses varying a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface (“Depending on the etch patterns defined by mask 15, the laterally injected hole current component can be adjusted.“) [0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Yan such that that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region to eliminate leakage path being eliminate from p-type layer and reduce heat generation in an active-region, especially in an MQW active-region associated with valence band discontinuity, and results in a more uniform hole distribution in the active-region. [0087-0089] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 28 , Gruart discloses the method of claim 12, wherein a quantum barrier of the at least five quantum barrier layers has a thickness (52) of at least 6 nanometers. Gruart does not explicitly disclose quantum barrier layer has a thickness of at least 6 nanometers. Yan discloses quantum barrier layer has a thickness of at least 6 nanometers. [ 100-300nm; 0119] . It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Yan such that has a thickness of at least 6 nanometers to apply very thick barriers in the LED and have electron supplier layer and hole supplier layer can contact the active-region from lateral side. [0119]. Regarding Claim 35 , Gruart discloses the method of claim 34, wherein Gruart does not explicitly disclose the first thickness is greater than the second thickness. Yan (Fig. 2) discloses a first thickness (thickness of 60 on a side of 502) is greater than a second thickness (thickness of 60 on a top of 502) . It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Yan such that the first thickness is greater than the second thickness to enhance the LED's light extraction efficiency. [0109] Claim(s) 16 and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Jiang et al. (US 2004/0080941 A1). Regarding Claim 16, Gruart discloses the method o f claim 12, Gruart does not explicitly disclose the voltage is less than V ₀ +1.0 volt, where V ₀ equals 1240 divided by a peak wavelength Jiang discloses applying an operating voltage of less than 3.0 Volts. (all semiconductor LEDs are DC operated with typical operating voltages of a few volts (e.g., around 2 volts for Red LEDs”) [0004] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Jiang to optimize peak wavelength and Vo such that the voltage is less than V ₀ +1.0 volt, where V ₀ equals 1240 divided by a peak wavelength in order to drive red LED and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 29, Gruart discloses the method of claim 12 . Gruart does not explicitly disclose applying the voltage comprises applying an operating voltage of less than 3.0 Volts. Jiang discloses applying an operating voltage of less than 3.0 Volts. (all semiconductor LEDs are DC operated with typical operating voltages of a few volts (e.g., around 2 volts for Red LEDs”) [0004] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Jiang such that applying the voltage comprises applying an operating voltage of less than 3.0 Volts since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller , 105 USPQ 233. Claim(s) 30 and 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Bhat et al. (US 2013/0044783 A1) Regarding Claim 30 , Gruart discloses the method of claim 12 . Gruart does not explicitly disclose the LED further comprises a hole blocking layer disposed between the n-doped substrate and the active region. Bhat discloses a hole blocking layer disposed between an n-doped substrate and an active region. (“ a hole blocking layer interposed between the active region and the n-type side of the device. ”) [0002, 0007] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Bhat such the LED further comprises a hole blocking layer disposed between the n-doped substrate and the active region in order to suppress hole penetration to the high defect density zone, and the associated non-radiative recombination, while neutralizing or offsetting the high defect density of the other n-doped layers of the device. [0003, 00012] Regarding Claim 31 , Gruart in view of Bhat discloses the method of claim 30, wherein applying the voltage results in the hole blocking layer preventing migration of holes into the n-doped substrate. [0011 Bhat] Claim(s) 32 and 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Chang et al. ( KR 20110117963 A ). Regarding Claim 32 , Gruart discloses the method of claim 12, wherein the LED further comprises a dielectric layer (32) disposed adjacent to the semiconductor mesa (40) . Gruart does not explicitly disclose a dielectric layer disposed on the n-doped substrate . Chang (Fig. 1-3) discloses an LED further comprises a dielectric layer (103, 303) disposed on an n-doped substrate (102) adjacent to a semiconductor mesa (104) . It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Chang such a dielectric layer disposed on the n-doped substrate in order to prevent the n-type semiconductor layer 102 and the p-type semiconductor layer 106 from contacting each other [Chang] Regarding Claim 33 , Gruart discloses the method of claim 32, wherein the dielectric layer blocks contact between the p-doped semiconductor region and the n-doped substrate. (“ the insulating layer 103 functions to prevent the n-type semiconductor layer 102 and the p-type semiconductor layer 106 from contacting each other, and considering such a function, the insulating layer 103 “ Chang] Claim(s) 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Jiang et al. (US 2004/0080941 A1) and further in view of Meyer et al. (US 2016/0087142 A1) Regarding Claim 36 , Gruart in view of Jiang discloses the method of claim 16 . Gruart in view of Jiang does not explicitly disclose a current density associated with applying the voltage is at least 1 amp per centimeter-squared (A/cm²). Meyer discloses a current density associated is at least 1 amp per centimeter-squared (A/cm²). [0042-0043, 0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Jiang and Meyer such that a current density associated with applying the voltage is at least 1 amp per centimeter-squared (A/cm²) since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller , 105 USPQ 233 and in order to maintain constant emition spectrum [0086] Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT DMITRIY YEMELYANOV whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)270-7920 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT M-F 9a.m.-6p.m . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Matthew Landau can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT (571) 272-1731 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DMITRIY YEMELYANOV/ Examiner, Art Unit 2891
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Prosecution Timeline

Jan 17, 2023
Application Filed
Mar 22, 2023
Response after Non-Final Action
Mar 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
92%
With Interview (+18.7%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 538 resolved cases by this examiner. Grant probability derived from career allow rate.

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