Prosecution Insights
Last updated: October 02, 2026
Application No. 18/155,681

QUANTUM WELL-BASED LED STRUCTURE ENHANCED WITH SIDEWALL HOLE INJECTION

Final Rejection §103§112
Filed
Jan 17, 2023
Priority
May 19, 2020 — provisional 63/027,069 +3 more
Examiner
YEMELYANOV, DMITRIY
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Google LLC
OA Round
2 (Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
425 granted / 572 resolved
+6.3% vs TC avg
Strong +19% interview lift
Without
With
+19.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
41 currently pending
Career history
611
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
56.4%
+16.4% vs TC avg
§102
21.9%
-18.1% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 572 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 26 and 28 recites the limitation "the at least five quantum barrier layers" in 2. There is insufficient antecedent basis for this limitation in the claim. Claim 12, as amended, establishes “at least four quantum barrier layers”. For the purposes of examination, the Examiner will treat "the at least five quantum barrier layers" as --the at least four quantum barrier layers--. Claims 37-39 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 37 recites “applying a current density of at least 1 amp per centimeter-squared (A/cm²) between a p-doped semiconductor region of the LED and the n-doped substrate of the LED” The limitation is derived by substituting “current density” for “voltage”. Voltage is conventionally described as being “applied between” two terminals or regions because voltage is inherently a potential difference between two points. Current density is scalar quantity describing current per unit cross section area through a region, it is not a quantity naturally “applied between” two separate regions in the same sense. It is not clear what physical act is being claimed. Is the current density literally imposed as a boundary condition between p-doped semiconductor region and n-doped substrate? Is it shorthand for applying current resulting is a current density a current density of at least 1 amp per centimeter-squared (A/cm²)? The Claim as written does not make it clear. Originally filed specification describes current density as a resultant operating characteristic of the device, “where the p-layers and the QWs are arranged to facilitate sidewall injection of holes into the quantum wells from the p-layers, thus facilitating an operating voltage lower than V.sub.0+0.5V (where V.sub.0=1240/lambda) and an operating current density of at least 1 A/cm2.” [0043] not as an independently “applied” input parameter between two regions. For the purposes of examination, the Examiner will interpret “applying a current density of at least 1 amp per centimeter-squared (A/cm²) between a p-doped semiconductor region of the LED and the n-doped substrate of the LED” as applying a voltage (or current) between a p-doped semiconductor region of the LED and the n-doped substrate of the LED sufficient to produce a current density of at least of at least 1 amp per centimeter-squared (A/cm²). Claim 38 depends on Claim 37 and recites “applying the current density further results in…” and rejected by dependency on Claim 37. Claim 39 rejected by dependency on Claim 37. Claim Objections Claims 37, 38 and 39 are objected to because of the following informalities: Claims 37, 38 and 39 are labeled as “(Currently Amended)” in the Claim listing. The prosecution history reflects no claim numbered 37,38 or 39 in the application prior to the present amendment (the highest previously pending claim number was 36, now cancelled). Claims 37-39 are therefore being introduced for the first time. Under 37 CFR §1.121 (C)(3), the status identifier “currently amended” is reserved for a claim previously presented that is now being changed relative to its immediately preceding version. A claim introduced into the application for the first time must instead be identified as “(New)” and presented in clean form without underlining or strikethrough (MPEP §714) Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12, 13, 14, 28, 34 and 35 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Kim et al. (US 2009/0191658 A1). Regarding Claim 12, Gruart (Fig. 1) discloses a method of operating a light emitting diode (LED) including a semiconductor mesa (40) formed on a planar growth surface of an n-doped substrate (26 were made of n-type doped GaN), the method comprising: applying a voltage between a p-doped semiconductor region (44 “p-type doped”) of the LED and the n-doped substrate of the LED (26), the p-doped semiconductor region (44) being in contact with at least one sidewall of the semiconductor mesa (40), and including a p-type layer (44), the at least one sidewall being non-parallel with a growth direction (vertical) of the semiconductor mesa (40) (Fig. 1), applying the voltage [0062-0064, “The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071] resulting in: holes being injected into at least five quantum wells (“preferably approximately ten quantum wells 50”) included in an active region (40) of the semiconductor mesa, the at least five quantum wells having at least four quantum barrier layers (52) respectively interleaved therebetween [0063-0064]; and each of the at least five quantum wells emitting light with a peak wavelength (Fig. 14) [0111]. Gruart does not explicitly disclose a peak wavelength of at least 600 nanometers and that p-type layer is a regrown p-type layer. Gruart (Fig. 14) discloses varying indium content in active areas to control the wavelength [0006, 0095] and further discloses a peak wavelength of about 600 nanometers. [0100- 0111]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart such that a peak wavelength of at least 600 nanometers have the light intensity emitted at the central wavelength of the radiation emitted by the active area to be as high as possible. [0006] and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Gruart does not explicitly disclose that that p-type layer is a regrown p-type layer. Kim (Fig. 3, 5) disclose discloses a p-doped semiconductor region (36) being in contact with at least one sidewall of a semiconductor mesa (31), and including a regrown p-type layer p-type layer (36, 38, 43) [The wafer is then patterned and etched to remove portions 43 of the active region. … P-type region 36 is then grown such that portions 43 are filled in with p-type material, “ 0025] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim such that t p-type layer is a regrown p-type layer in order to providing direct hole injection paths into have extensions of the p-type region into the active region provide uniform filling of carriers into multiple quantum wells of the active region by providing direct hole injection paths into individual quantum wells and improve the operating efficiency at high current density by reducing the carrier density in the quantum wells closest to the bulk p-type region, thereby reducing the number of carriers lost to nonradiative recombination. [0006] and deliver holes to quantum wells via direct, vertical electrical paths from p-type region and the horizontal diffusion of holes from extensions to quantum wells provide uniform filling of the quantum wells with holes [0019] Further, limitation in line 2, “a regrown p-type layer” is considered to be product-by-process. The Examiner notes that Claim 12 is “A method of operating a light emitting diode…”. A method of using a pre-existing device, not a method of making one. Therefore, only method steps are “applying a voltage…resulting in…”. Further, limitations “a semiconductor mesa”, “the p-doped semiconductor region…including a regrown p-type layer”, ”the sidewall being non-parallel” are structural limitations describing the device being operated, folded into the method claim via preamble and “including”/”wherein” clauses. “Regrown” is not a step performed when operating the LED. It is describing a process of making p-type layer that already exists before the method step of “applying a voltage” ever begins. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Regarding Claim 13, Gruart (Fig. 1) in view of Kim discloses the method of claim 12, wherein the growth direction is orthogonal to the planar growth surface (Fig. 1 Gruart). Regarding Claim 14, Gruart in view of Kim discloses the method of claim 12, wherein the p-doped semiconductor region (44 Gruart) contacts (through 40 Gruart) the planar growth surface. (Fig. 1 Gruart). Regarding Claim 28, Gruart in view of Kim discloses the method of claim 12, wherein a quantum barrier of the at least five quantum barrier layers has a thickness (52) of at least 6 nanometers. Gruart in view of Kim as previously combined does not explicitly disclose quantum barrier layer has a thickness of at least 6 nanometers. However, Kim discloses quantum barrier layer has a thickness of at least 6 nanometers. [between 60 and 130 angstroms; 0018]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim such that has a thickness of at least 6 nanometers to since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding Claim 34, Gruart in view of Kim discloses the method of claim 12, wherein the regrown p-type layer (44 “p-type doped” Gruart) (36, 38, 43 Kim) having a first thickness on the at least one sidewall (thickness of 38, 43) and a second thickness on the planar growth surface. (thickness of 36) (See Fig. 1 Gruart). (See Fig. 3, 5) Regarding Claim 35, Gruart in view of Kim discloses the method of claim 34, wherein the first thickness (thickness of 38, 43 Kim) is greater than the second thickness. (thickness of 36) (See Fig. 3, 5 Kim) Claim(s) 26, 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) i Kim et al. US 2009/0191658 A1) and further in view of Bergmann et al. (US 2011/0187294 A1). Regarding Claim 26, Gruart in view of Kim discloses the method of claim 12, Gruart in view of Kim does not explicitly disclose a quantum barrier of the at least five quantum barrier layers includes an aluminum gallium nitride (AlGaN) region. Bergmann discloses a quantum barrier of includes an aluminum gallium nitride (AlGaN) region. [0067, 0076]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Bergmann such a quantum barrier of the at least five quantum barrier layers includes an aluminum gallium nitride (AlGaN) region in order to in order to improve the crystal quality active-region. [0067, 0076]. Regarding Claim 27, Gruart in view of Kim and Bergmann discloses the method of claim 26, wherein the AlGaN region has an aluminum content [0067, 0076] Gruart in view of Kim and Bergmann does not explicitly disclose an aluminum content of at least 10%. However, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Bergmann such that the AlGaN region has an aluminum content of at least 10% and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim(s) 15, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Kim et al. (US 2009/0191658 A1) and further in view of Yan et al. (US 2011/0315952 A1). Regarding Claim 15, Gruart in view of Kim discloses the method of claim 12, wherein applying the voltage further results in a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface. (“The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071 Gruart). Gruart in view of Kim does not explicitly disclose that 10% or less of a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface. Yan discloses varying a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface (“Depending on the etch patterns defined by mask 15, the laterally injected hole current component can be adjusted. “)[0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Yan such that applying the voltage further results in 10% or less of a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface to eliminate leakage path being eliminate from p-type layer and reduce heat generation in an active-region, especially in an MQW active-region associated with valence band discontinuity, and results in a more uniform hole distribution in the active-region. [0087-0089] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 17, Gruart in view of Kim discloses the method of claim 12, wherein, wherein applying the voltage further results in a hole current flowing through the p-doped semiconductor region being injected into the active region. (“The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071 , Gruart). Gruart in view of Kim does not explicitly disclose that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region. Yan discloses varying a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface (“Depending on the etch patterns defined by mask 15, the laterally injected hole current component can be adjusted.“) [0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Yan such that that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region to eliminate leakage path being eliminate from p-type layer and reduce heat generation in an active-region, especially in an MQW active-region associated with valence band discontinuity, and results in a more uniform hole distribution in the active-region. [0087-0089] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980). Claim(s) 16 and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Kim et al. (US 2009/0191658 A1) and further in view of Jiang et al. (US 2004/0080941 A1). Regarding Claim 16, Gruart in view of Kim discloses the method of claim 12, Gruart in view of Kim does not explicitly disclose the voltage is less than V₀+1.0 volt, where V₀ equals 1240 divided by a peak wavelength Jiang discloses applying an operating voltage of less than 3.0 Volts. (all semiconductor LEDs are DC operated with typical operating voltages of a few volts (e.g., around 2 volts for Red LEDs”) [0004] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Jiang to optimize peak wavelength and Vo such that the voltage is less than V₀+1.0 volt, where V₀ equals 1240 divided by a peak wavelength in order to drive red LED and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 29, Gruart in view of Kim discloses the method of claim 12. Gruart in view of Kim does not explicitly disclose applying the voltage comprises applying an operating voltage of less than 3.0 Volts. Jiang discloses applying an operating voltage of less than 3.0 Volts. (all semiconductor LEDs are DC operated with typical operating voltages of a few volts (e.g., around 2 volts for Red LEDs”) [0004] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Jiang such that applying the voltage comprises applying an operating voltage of less than 3.0 Volts since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim(s) 30 and 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Kim et al. (US 2009/0191658 A1) and further in view of Bhat et al. (US 2013/0044783 A1) Regarding Claim 30, Gruart in view of Kim discloses the method of claim 12. Gruart in view of Kim does not explicitly disclose the LED further comprises a hole blocking layer disposed between the n-doped substrate and the active region. Bhat discloses a hole blocking layer disposed between an n-doped substrate and an active region. (“a hole blocking layer interposed between the active region and the n-type side of the device.”) [0002, 0007] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Bhat such the LED further comprises a hole blocking layer disposed between the n-doped substrate and the active region in order to suppress hole penetration to the high defect density zone, and the associated non-radiative recombination, while neutralizing or offsetting the high defect density of the other n-doped layers of the device. [0003, 00012] Regarding Claim 31, Gruart in view of Kim and Bhat discloses the method of claim 30, wherein applying the voltage results in the hole blocking layer preventing migration of holes into the n-doped substrate. [0011 Bhat] Claim(s) 32 and 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Kim et al. (US 2009/0191658 A1) and further in view of Chang et al. (KR 20110117963 A). Regarding Claim 32, Gruart in view of Kim discloses the method of claim 12, wherein the LED further comprises a dielectric layer (32) disposed adjacent to the semiconductor mesa (40). Gruart in view of Kim does not explicitly disclose a dielectric layer disposed on the n-doped substrate. Chang (Fig. 1-3) discloses an LED further comprises a dielectric layer (103, 303) disposed on an n-doped substrate (102) adjacent to a semiconductor mesa (104). It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Kim and Chang such a dielectric layer disposed on the n-doped substrate in order to prevent the n-type semiconductor layer 102 and the p-type semiconductor layer 106 from contacting each other [Chang] Regarding Claim 33, Gruart in view of Kim and Chang discloses the method of claim 32, wherein the dielectric layer blocks contact between the p-doped semiconductor region and the n-doped substrate. (“the insulating layer 103 functions to prevent the n-type semiconductor layer 102 and the p-type semiconductor layer 106 from contacting each other, and considering such a function, the insulating layer 103 “ Chang] Claim(s) 37 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Meyer et al. (US 2016/0087142 A1). Regarding Claim 37, Gruart (Fig. 1) discloses a method of operating a light emitting diode (LED) including a semiconductor mesa (40) formed on a planar growth surface of an n-doped substrate (26 were made of n-type doped GaN), the method comprising: applying a current density [0062-0064, “The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071] between a p-doped semiconductor region (44 “p-type doped”) of the LED and the n-doped substrate of the LED (26), the p-doped semiconductor region (44) being in contact with at least one sidewall of the semiconductor mesa (40), the at least one sidewall being non-parallel with a growth direction (vertical) of the semiconductor mesa (40) (Fig. 1), applying the current density [0062-0064, “The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071] resulting in: holes being injected into at least five quantum wells (“preferably approximately ten quantum wells 50”) included in an active region (40) of the semiconductor mesa, the at least five quantum wells having at least four quantum barrier layers (52) respectively interleaved therebetween [0063-0064]; and each of the at least five quantum wells (50) being configured to emit light with a peak wavelength at the current density. (Fig. 14) [0111]. Gruart does not explicitly disclose applying a current density of at least 1 amp per centimeter-squared (A/cm²) and a peak wavelength of at least 600 nanometers. Gruart (Fig. 14) discloses varying indium content in active areas to control the wavelength [0006, 0095] and further discloses a peak wavelength of about 600 nanometers. [0100- 0111]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart such that a peak wavelength of at least 600 nanometers have the light intensity emitted at the central wavelength of the radiation emitted by the active area to be as high as possible. [0006] and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Gruart does not explicitly disclose applying a current density of at least 1 amp per centimeter-squared (A/cm²). Meyer discloses a current density associated with applying voltage is at least 1 amp per centimeter-squared (A/cm²). [0042-0043, 0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Meyer such that a current density associated with applying voltage is at least 1 amp per centimeter-squared (A/cm²) since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 and in order to maintain constant emition spectrum [0086] Claim(s) 38 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Meyer et al. (US 2016/0087142 A1) and further in view of Yan et al. (US 2011/0315952 A1). Regarding Claim 38, Gruart in view of Meyer discloses the method of claim 37, wherein applying the current density further results a hole current flowing through the p-doped semiconductor region being injected into the active region. (“The injection of holes into each quantum well may thus occur through the lateral edges of the quantum well” 0071 , Gruart). Gruart in view of Meyer does not explicitly disclose that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region. Yan discloses varying a hole current flowing through the p-doped semiconductor region being injected into the planar growth surface (“Depending on the etch patterns defined by mask 15, the laterally injected hole current component can be adjusted.“) [0085-0087]. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Meyer and Yan such that that at least 90% of a hole current flowing through the p-doped semiconductor region being injected into the active region to eliminate leakage path being eliminate from p-type layer and reduce heat generation in an active-region, especially in an MQW active-region associated with valence band discontinuity, and results in a more uniform hole distribution in the active-region. [0087-0089] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980). Claim(s) 39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruart et al. (US 2022/0238753 A1) in view of Meyer et al. (US 2016/0087142 A1) and further in view of Kim et al. (US 2009/0191658 A1). Regarding Claim 39, Gruart in view of Meyer discloses the method of claim 37, wherein the p-doped semiconductor region comprises a p-type layer (44 “p-type doped”) has a first thickness on the at least one sidewall and a second thickness on the planar growth surface. (26 were made of n-type doped GaN) (See thickness of 44 on sidewall and on 26) Gruart in view of Meyer does not explicitly disclose that that p-type layer is a regrown p-type layer. Kim (Fig. 3, 5) disclose discloses a p-doped semiconductor region (36) being in contact with at least one sidewall of a semiconductor mesa (31), and including a regrown p-type layer p-type layer (36, 38, 43) [The wafer is then patterned and etched to remove portions 43 of the active region. … P-type region 36 is then grown such that portions 43 are filled in with p-type material, “ 0025] It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the optoelectronic semiconductor device in Gruart in view of Meyer and Kim such that p-type layer is a regrown p-type layer in order to providing direct hole injection paths into have extensions of the p-type region into the active region provide uniform filling of carriers into multiple quantum wells of the active region by providing direct hole injection paths into individual quantum wells and improve the operating efficiency at high current density by reducing the carrier density in the quantum wells closest to the bulk p-type region, thereby reducing the number of carriers lost to nonradiative recombination. [0006] and deliver holes to quantum wells via direct, vertical electrical paths from p-type region and the horizontal diffusion of holes from extensions to quantum wells provide uniform filling of the quantum wells with holes [0019] Further, limitation in line 2, “a regrown p-type layer” is considered to be product-by-process. The Examiner notes that Claim 12 is “A method of operating a light emitting diode…”. A method of using a pre-existing device, not a method of making one. Therefore, only method steps are “applying a voltage…resulting in…”. Further, limitations “a semiconductor mesa”, “the p-doped semiconductor region…including a regrown p-type layer”, ”the sidewall being non-parallel” are structural limitations describing the device being operated, folded into the method claim via preamble and “including”/”wherein” clauses. “Regrown” is not a step performed when operating the LED. It is describing a process of making p-type layer that already exists before the method step of “applying a voltage” ever begins. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Response to Arguments Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The Examiner further notes that, limitation in line 2, “a regrown p-type layer” is considered to be product-by-process. Claim 12 is “A method of operating a light emitting diode…”. A method of using a pre-existing device, not a method of making one. Therefore, only method steps are “applying a voltage…resulting in…”. Further, limitations “a semiconductor mesa”, “the p-doped semiconductor region…including a regrown p-type layer”, ”the sidewall being non-parallel” are structural limitations describing the device being operated, folded into the method claim via preamble and “including”/”wherein” clauses. “Regrown” is not a step performed when operating the LED. It is describing a process of making p-type layer that already exists before the method step of “applying a voltage” ever begins. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DMITRIY YEMELYANOV/Examiner, Art Unit 2891
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Prosecution Timeline

Jan 17, 2023
Application Filed
Mar 22, 2023
Response after Non-Final Action
Mar 31, 2026
Non-Final Rejection mailed — §103, §112
Jun 30, 2026
Response Filed
Sep 04, 2026
Final Rejection mailed — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12727297
ARRAY OF LIGHT EMITTING DEVICES WITH REDUCED OPTICAL CROSSTALK
3y 10m to grant Granted Sep 01, 2026
Patent 12713977
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
3y 10m to grant Granted Aug 18, 2026
Patent 12707763
LIGHT EMITTING ELEMENT AND DISPLAY DEVICE INCLUDING THE SAME
3y 11m to grant Granted Aug 11, 2026
Patent 12707711
SEMICONDUCTOR DEVICE WITH CMOS INVERTER
3y 10m to grant Granted Aug 11, 2026
Patent 12707699
Semiconductor Device Structure
2y 7m to grant Granted Aug 11, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
94%
With Interview (+19.2%)
2y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 572 resolved cases by this examiner. Grant probability derived from career allowance rate.

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