Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
Claim(s) 1-2, 9-10, and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Huang (PGPub No. 20200243383) in further view of Chandrasekhar (PGPub No. 20210305161).
Regarding claim 1, Huang teaches an interconnect structure comprising: a dielectric layer including a trench (Fig. 1 points to at least one trench 104 patterned in the dielectric 102.); a conductive wiring disposed in the trench, the conductive wiring including graphene (Figs. 6-8 and [0045] point to a conformal carbon layer 602 including crystalline graphene and a fill metal 702, which together (conductive wiring) fill the trench 104.); and a liner layer contacting at least one surface of the conductive wiring, the liner layer including a metal (Figs. 7-8 and [0044] point to a conformal metal liner 502 (liner layer) comprising suitable metals including, but not limited to, Co and/or Ru.), the first portion of the liner layer and the second portion of the liner layer are on opposite sides of the conductive wiring (Fig. 8 points to the metal liner 502 (liner layer) comprising opposing portions on the left side (first portion) and right side (second portion) of the carbon layer 602 and fill metal 702 (conductive wiring).), and the width of the graphene in the conductive wiring corresponds to a thickness of the graphene in the first direction (Id. points to the horizontal thickness of the carbon layer 602 (graphene).).
Huang fails to teach wherein a width of the trench in a first direction through the graphene of the conductive wiring is equal to a sum of a width of a first portion of the liner layer, a width of the graphene in the conductive wiring, and a width of a second portion of the liner layer.
Chandrasekhar teaches wherein a width of the trench in a first direction through the graphene of the conductive wiring is equal to a sum of a width of a first portion of the liner layer, a width of the graphene in the conductive wiring, and a width of a second portion of the liner layer (Fig. 2 points to a trench in a dielectric material 212 with a width equal to the combined widths of a graphene barrier material 214 and a conductive metal 215.). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Huang and Chandrasekhar, such that the trench is only filled with a graphene material and a metal (liner) material in order to simplify the fabrication process and/or reduce costs.
Regarding claim 2, Huang teaches wherein the graphene includes intrinsic graphene or nanocrystalline graphene (Figs. 7-8 and [0045] point to a conformal carbon layer 602 including crystalline graphene.).
Regarding claim 9, Huang teaches wherein the liner layer includes one of Cu, Mo, Ru, Al, Ti, Ta, W, Pt, Rh, Ir, Co, TiN, TaN, and Mn (Figs. 7-8 and [0044] point to a conformal metal liner 502 (liner layer) comprising suitable metals including, but not limited to, Co and/or Ru.).
Regarding claim 10, Huang teaches wherein a bonding force between the liner layer and the dielectric layer is in a range of about 2.0 J/m2 to about 10.0 J/m2, or a bonding force between the liner layer and the conductive wiring is in a range of about 2.0 J/m2 to about 10.0 J/m2 (Figs. 7-8 and [0046] point to filling the trench 104 of the dielectric 102 with an interconnect 704, with said interconnect comprising a metal liner 502 (liner layer) in contact with the dielectric layer 102, and a combination (conductive wiring) of carbon layer 602 and fill metal 702 in contact with the metal liner (liner layer). The disclosure does not appear to lend any criticality or significance to the exact amount of force needed to bond the liner layer to the dielectric layer and/or the conductive wiring and, as such, is deemed a matter of choice that a person of ordinary skill in the art would have found obvious. Absent persuasive evidence that a particular configuration is significant, said configuration is deemed a matter of choice which a person of ordinary skill in the art would have found obvious. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); see also MPEP 2144.04(IV)(B).).
Regarding claim 16, Huang teaches wherein the dielectric layer defines a first sidewall of the trench, a bottom surface of the trench, and a second sidewall of the trench, the bottom surface of the trench is connected to the first sidewall of the trench and the second sidewall of the trench, the first sidewall of the trench is spaced apart in the first direction from the second sidewall of the trench (Fig. 1 points to the formation of a trench 104 in the dielectric 102, with said trench comprising a left side (first sidewall), a bottom surface, and a right side (second sidewall).), and the liner layer defines one or more openings between the graphene of the conductive wiring and at least one of the first sidewall of the trench, the second sidewall of the trench, and the bottom surface of the trench ([0043] points to an alternative embodiment where the metal liner (liner layer) is thinned in order to place the carbon layer (graphene) in closer proximity to the metal liner-dielectric interface. In light of this, it is considered obvious that one of ordinary skill in the art would continue to thin out the metal liner such that portion(s) are removed to form at least one opening in order to bring the carbon layer into even closer proximity with the dielectric.).
Regarding claim 17, Huang teaches wherein the graphene of the conductive wiring is disposed at a central region of the trench in a cross-sectional view (Figs. 7-8 point to a conformal carbon layer 602 (graphene) which includes a bottom portion that extends across the center of the trench (central region).).
Claim(s) 3-8 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Huang in further view of Byun (PGPub No. 20200035611).
Regarding claim 3, Byun teaches wherein the graphene has a bonding structure in which a ratio of carbon having a sp2 bonding structure is in a range from about 50% to about 99% ([0006] and [0007] point to the use of nanocrystalline graphene with a ratio of carbon having a sp2 bonding structure which may be in a range from 50% to 99%.). Thus, it would have been obvious to a person of ordinary skill in the art (POSITA) prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the conductive wiring used to fill the dielectric trench is comprised of nanocrystalline graphene with a ratio of carbon having a sp2 bonding structure which may be in a range from 50% to 99% in order to balance conductivity, mechanical strength, and processability.
Regarding claim 4, Byun teaches wherein the graphene includes hydrogen in a range from about 1 at% (atomic percent) to about 20 at% ([0008] points to the nanocrystalline graphene including hydrogen of 1 atomic percent (at %) to 20 at %.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the graphene used in the conductive wiring includes hydrogen of 1 at % to 20 at % in order to conduct defect passivation without destroying the conductive sp2 network.
Regarding claim 5, Byun teaches wherein the graphene has a density in a range from about 1.6 g/cc to about 2.1 g/cc ([0008] points to the nanocrystalline graphene having a density ranging from 1.6 g/cc to 2.1 g/cc.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the graphene used in the conductive wiring has a density ranging from 1.6 g/cc to 2.1 g/cc in order to create properly balance electrical conductivity, thermal conductivity, mechanical stability, and/or flexibility.
Regarding claim 6, Byun teaches wherein the graphene includes crystals having a size in a range from about 0.5 nm to about 100 nm ([0006] and [0007] point to the nanocrystalline graphene comprising nano-sized crystals ranging from 0.5nm – 100nm.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the crystals which make up the graphene range in size from about 0.5 nm to about 100 nm in order to provide adequate conductivity while still maintaining flexibility.
Regarding claim 7, Byun teaches wherein a ratio of D peak to G peak of a Raman spectrum of the graphene is 3 or less, a ratio of 2D peak to G peak is 0.1 or more, and a half-width of D peak is 50 cm1 or less (Fig. 2B and [0055] point to a Raman spectrum representing nanocrystalline graphene, where the ratio of D peak intensity to G peak intensity may be less than about 2.1, the ratio of 2D peak intensity to the G peak intensity may be greater than about 0.1, and the full width at half maximum (half-width) of a D peak is about 25 to 120 cm1. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the ratio of D peak to G peak of a Raman spectrum of the graphene is 3 or less, the ratio of 2D peak to G peak is 0.1 or more, and the half-width of D peak is 50 cm1 or less in order to provide a three-dimensional picture of the order, defect density, and layer structure of the graphene, which by extension will indicate whether certain properties such as sp2 bonding and crystal size are within acceptable parameters.
Regarding claim 8, Byun teaches wherein the liner layer has an all-around shape surrounding the conductive wiring (Fig. 8 points to an interconnect structure 620 comprising a conductive wiring 625 completely surrounded by a cap layer 627 (liner layer).). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the all-around shape of the cap layer disclosed in Byun is applied to the metal liner/liner layer disclosed in Huang in order to provide protection for the underlying conductive metal in all directions.
Regarding claim 11, Byun teaches an electronic device comprising: the interconnect structure of claim 1 (Fig. 8 points to an electronic device 600 comprising the interconnect structure 620.). Thus, it would have been obvious to a POSITA prior to the filing date of the claimed invention to combine the teachings of Huang and Byun, such that the interconnect structure is attached to an electronic device in order to establish a physical and electrical network that said device can employ to connect multiple chips, transistors, and/or other such components.
Response to Arguments
Applicant’s arguments, see Remarks, filed 11/06/2025, with respect to the rejection(s) of claim(s) 1 and 9 under 35 U.S.C. §102(a)(1)/102(a)(2) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made under 35 U.S.C. §103 over Huang (PGPub No. 20200243383) in further view of Chandrasekhar (PGPub No. 20210305161).
Additionally, the request for rejoinder of claims 12-15 is denied and said claims will remain withdrawn.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Patrick L Cullen whose telephone number is (703)756-1221. The examiner can normally be reached Monday - Friday, 8:30AM - 5PM EST.
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/PATRICK CULLEN/Assistant Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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