DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 07 January 2026 have been fully considered but they are respectfully not persuasive.
Regarding Claim 1, Applicant submits (Remarks; pages 8-11) that the prior art of record (Kobayashi) does not teach or disclose the new amendment of: “a plurality of trenches including a plurality of first trenches and a plurality of second trenches different from each other, the plurality of first trenches … the plurality of second trenches being provided apart from the plurality of third semiconductor regions, penetrating through the second semiconductor region and reaching the first semiconductor region”.
Examiner respectfully disagrees. Kobayashi teaches these limitations in Fig. 18Ab (annotated below), wherein: a plurality of trenches (31,32) including a plurality of first trenches (31) and a plurality of second trenches (32) different from each other, the plurality of first trenches … the plurality of second trenches (32) being provided apart from the plurality of third semiconductor regions (17) (32 are provided apart from 17 by the intermediate semiconductor regions 18), penetrating through the second semiconductor region (16) and reaching the first semiconductor region (15) (as shown in Fig. 18Ab).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the second trenches (32) apart from the third semiconductor regions (17, as in the embodiment of Fig. 18Ab) in order to reduce the contact resistance (as described in ¶0107).
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Applicant submits (Remarks, page 11) that one of ordinary skill in the art would not replace the Al of 22 of Kobayashi with W (as in Yamaguchi). This is respectfully not persuasive, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981).
Furthermore, Yamaguchi teaches a clear benefit of utilizing a tungsten (W) plug instead of an aluminum (Al) plug in a trench in order to prevent poor coverage by the Al (Yamaguchi; ¶0050). Lacking any evidence of criticality of utilizing W instead Al, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to utilize the tungsten plug in the trench (of Yamaguchi) in the disclosure of Kobayashi in order to improve coverage for the metal plug in the trench.
The rejection has been updated below to reflect the newly amended limitations.
Regarding the request for rejoinder, per MPEP 821.04 “In order to be eligible for rejoinder, a claim to a nonelected invention must depend from or otherwise require all the limitations of an allowable claim. A withdrawn claim that does not require all the limitations of an allowable claim will not be rejoined”. Should the instant application be amended in the future to be in condition for allowance, claim 7 would require all of the limitations of claim 1 to be considered for rejoinder. At this time, claim 7 does not include at least the limitations of “the first metal film is a nickel film, and the second metal film is a tungsten film” as recited in claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Yusuke Kobayashi et al. (US 20200083369 A1; hereinafter Kobayashi) in view of Kazuya Yamaguchi (US 20180269278 A1; hereinafter Yamaguchi).
Regarding Claim 1, Kobayashi teaches a silicon carbide semiconductor device (Fig. 14; ¶0057), comprising:
a semiconductor substrate (Fig. 5; 1, 2, 16, 17; ¶0059; hereinafter 2) containing silicon carbide (¶0059), the semiconductor substrate having a first main surface (top of 2) and a second main surface (bottom of 2) that are opposite to each other;
a first semiconductor region (15; n-type; ¶0059) of a first conductivity type (n-type), provided in the semiconductor substrate (2);
a second semiconductor region (16; p-type; ¶0059) of a second conductivity type (p-type), provided in the semiconductor substrate (2) and between the first main surface (top of 2) of the semiconductor substrate and the first semiconductor region (15);
a plurality of third semiconductor regions (17; n-type; ¶0059) of the first conductivity type (n-type), selectively provided in the semiconductor substrate and between the first main surface of the semiconductor substrate (top of 2) and the second semiconductor region (16);
a plurality of trenches including a plurality of first trenches (gate trenches 31; ¶0059-¶0060) and a plurality of second trenches (Schottky Barrier Diode trenches 32; ¶0059-¶0060) different from each other (31 and 32 are different), the plurality of first trenches penetrating through the plurality of third semiconductor regions (17) and the second semiconductor region (16) and reaching the first semiconductor region (15), the plurality of second trenches (32) penetrating through the second semiconductor region (16) and reaching the first semiconductor region (15);
a plurality of gate electrodes (20; ¶0059) respectively provided in the plurality of first trenches (31), via a plurality of gate insulating films (19; ¶0059);
a plurality of conductive films (35, portion of 22 in the trench; ¶0093 and ¶0095) respectively embedded in the plurality of second trenches (32), each of the plurality of conductive films (35, 22) being configured by a plurality of stacked metal films (35, 22) made of materials different from one another (Ni, Al, respectively), junction interfaces between the first semiconductor region (15) and the plurality of conductive films (35, 22) forming a plurality of Schottky barriers (as described in ¶0066);
a first electrode (the rest of 12 not in the trench) electrically connected to the second semiconductor region (16), the plurality of third semiconductor regions (17), and the plurality of conductive films (35 and 22 in the trench; as shown in Fig. 14);
a second electrode (34; ¶0059) provided at the second main surface (bottom of 2) of the semiconductor substrate (as shown in Fig. 14); and
a plurality of Schottky barrier diodes (SBD 32; ¶0060) that respectively include the plurality of Schottky barriers (¶0059-¶0066), wherein each of the plurality of conductive films (35 and 22 in the trench) has:
a first metal film (35) provided along an inner wall of a respective one of the plurality of second trenches (32), the first metal film being in Schottky contact with the first semiconductor region (15; ¶0066), at the inner wall of the respective one of the plurality of second trenches (Fig. 14; ¶0066), and
a second metal film (22 in between and in the middle of 35 in the trench 32) provided closer to a center of the respective one of the plurality of second trenches (32) than is the first metal film (35) (as shown in Fig. 14), the second metal film (22, Aluminum) having an electrical resistivity that is lower than an electrical resistivity of the first metal film (35, Nickel), the first metal film (35) is a nickel film (¶0093).
Kobayashi does not expressly disclose (in the embodiment of Fig. 14) wherein the plurality of second trenches (32) being provided apart from the plurality of third semiconductor regions (17).
In the same disclosure, Kobayashi teaches an embodiment (Fig. 18Ab) wherein the plurality of first trenches (31) [are] penetrating through the plurality of third semiconductor regions (17) and the second semiconductor region (16) and reaching the first semiconductor region (15), the plurality of second trenches (32) being provided apart from the plurality of third semiconductor regions (17) (32 is apart from 17 by the intermediate regions 18, as shown in Fig. 18Ab), penetrating through the second semiconductor region (16) and reaching the first semiconductor region (15).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the second trenches (32) apart from the third semiconductor regions (17, as in the embodiment of Fig. 18Ab) in the embodiment of Fig. 14 in order to reduce the contact resistance (as described in ¶0107).
Kobayashi does not expressly disclose wherein the second metal film (22) is a tungsten (W) film. However, the substitution of a known equivalent for another known equivalent is prima facie case of obviousness. The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
In the same field of endeavor, Yamaguchi teaches a SiC semiconductor device (¶0055) that includes forming a barrier (liner) metal in a trench with a metal (plug) (¶0050), and teaches that the aluminum metal (plug) may be replaced by tungsten metal (plug). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have tungsten replace the aluminum in the device of Kobayashi, because Yamaguchi states tungsten provides better coverage than aluminum (Yamaguchi; ¶0050), which is beneficial to fill the interior of the trench.
Furthermore, the application has not established criticality of the claimed configuration of tungsten instead of aluminum as the material of the second metal film, as instant Fig. 1 shows both aluminum and tungsten as suitable options.
Regarding Claim 3, modified Kobayashi teaches the silicon carbide semiconductor device according to claim 1, wherein the first metal film (35) has a first portion at a bottom of the respective one of the plurality of second trenches (trench 32), and a second portion at a sidewall of the respective one of the plurality of second trenches, the first portion being thicker than the second portion (as shown in Fig. 14, the bottom portion of 35 is thicker than the sidewall portions of 35).
Regarding Claim 15, modified Kobayashi teaches the silicon carbide semiconductor device according to claim 1, wherein the plurality of conductive films (35/22) are not in contact with the plurality of third semiconductor regions (17) (as modified by Fig. 18Ab, the plurality of conductive films in the second trench 32 are not in contact with the plurality of third semiconductor regions 17, as they are spaced apart by semiconductor regions 18).
Regarding Claim 16, modified Kobayashi teaches the silicon carbide semiconductor device according to claim 1, further comprising:
a plurality of contact regions (18; ¶0059) of the second conductivity type (p-type), selectively provided in the semiconductor substrate and between the first main surface (top) of the semiconductor substrate and the second semiconductor region (16), the plurality of contact regions (18 with a p+ concentration; ¶0069, ¶0081) having a higher impurity concentration than the second semiconductor region (16 with a standard p concentration; ¶0079), wherein
the plurality of trenches (31/32) extend in a striped pattern in a direction that is parallel to the first main surface (top) of the semiconductor substrate (as described in ¶0063 wherein the trenches extend in the Y direction in an alternating “striped pattern” in the manner of Fig. 18Aa), and
the plurality of third semiconductor regions (17) and the plurality of contact regions (18) extend linearly in the direction (Y, as shown/modified in view of Fig. 18Aa).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Yusuke Kobayashi et al. (US 20200083369 A1; hereinafter Kobayashi) in view of Kazuya Yamaguchi (US 20180269278 A1; hereinafter Yamaguchi) and Rossano Carta et al. (US 20070212862 A1; hereinafter Carta).
Regarding Claim 4, modified Kobayashi teaches the silicon carbide semiconductor device according to claim 1, but is silent about the thickness of the first metal film, wherein the first metal film (35) has a thickness that is in a range of 100 nm to 200 nm.
In the same field of endeavor, Carta teaches utilizing a nickel film in a Schottky trench contact in a range of 10-500nm, wherein the Schottky barrier height depends on the thickness of the film (¶0019-¶0021). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to optimize the thickness of the nickel film of Kobayashi to be within the claimed range in order to adjust the desired Schottky barrier height (Carta; ¶0019-¶0021).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN PRIDEMORE whose telephone number is (703)756-4640. The examiner can normally be reached Monday - Friday 8:00am - 4:00pm EST.
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898