Prosecution Insights
Last updated: April 19, 2026
Application No. 18/159,878

Semiconductor Devices with Frontside and Backside Power Rails

Non-Final OA §102§103
Filed
Jan 26, 2023
Examiner
BERNSTEIN, ALLISON
Art Unit
2824
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
3 (Non-Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
84%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
719 granted / 889 resolved
+12.9% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
15 currently pending
Career history
904
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
38.0%
-2.0% vs TC avg
§102
35.8%
-4.2% vs TC avg
§112
15.7%
-24.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 889 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office Action is in response to the Request for Continued Examination, filed 08 January 2026. Acknowledgment is made of applicant’s amendment, filed on 19 December 2025. The changes and remarks disclosed therein have been considered. Claims 1 and 3-21 are pending in the application. Claim 18 is currently amended. Claims 1, 11 and 18 are independent claims. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 18 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu (US 2021/0225830). Re: independent claim 18, Liu discloses in figs. 1A-1B and 3A-3C a level shifting circuit, comprising: a plurality of transistors (fig. 3C) configured to convert a signal of a first voltage level to a second voltage level that is higher than the first voltage level; a frontside power line (fig. 1A: TVDD) disposed above the transistors, the frontside power line delivering the first voltage level to a first source/drain region of the transistors; a frontside ground line (fig. 1A: VSS) disposed above the transistors, the frontside ground line configured to deliver a ground reference voltage to the transistors, the frontside ground line extending lengthwise in a first direction (x-direction); a backside power line (fig. 1B: VVDD) disposed under the transistors, the backside power line delivering the second voltage level to a second source/drain region of the transistors; and a backside ground line (VVDD) disposed under the transistors, the backside ground line configured to deliver the ground reference voltage to the transistors, the backside ground line extending lengthwise in the first direction (x-direction) (A recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. MPEP § 2114.). Re: claim 20, Liu discloses in figs. 1A-1B and 3A-3C the level shifting circuit of claim 18, further comprising: another backside power line (fig. 1B: VVDD) disposed under the transistors and configured to deliver the first voltage level to the first source/drain region of the transistors. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 19 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 2021/0225830). Re: claims 19 and 21, Liu discloses the level shifting circuit of claim 18. Liu does not disclose expressly wherein a width of the backside power line is larger than a width of the frontside power line; and wherein a width of the backside ground line is larger than a width of the frontside ground line. However, dimensional limitations are prime facie obvious unless there is disclosure that the relative dimensions produce new and unexpected results, are for some unobvious purpose or are otherwise critical. See MPEP §2144.04. Allowable Subject Matter Claims 1 and 3-17 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The record as a whole makes clear the reasons for allowability. Response to Arguments Applicant's arguments filed 08 January 2026 have been fully considered but they are not persuasive. Applicant argues that Liu does not disclose wherein the frontside ground line and the backside ground line extend in a first direction. In response, Liu discloses in figs. 1A-1B wherein the frontside ground line TVDD extends in the x-direction and wherein the backside ground line VVDD extends in the x-direction. Therefore, the frontside ground line and the backside ground line extend in a first direction. Conclusion The examiner has cited particular columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. When responding to this office action, applicants are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALLISON BERNSTEIN whose telephone number is (571)272-9011. The examiner can normally be reached M-F 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached on 571-272-1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALLISON BERNSTEIN/Primary Examiner, Art Unit 2824 1/26/2026
Read full office action

Prosecution Timeline

Jan 26, 2023
Application Filed
Jul 08, 2025
Non-Final Rejection — §102, §103
Oct 10, 2025
Response Filed
Oct 21, 2025
Final Rejection — §102, §103
Dec 19, 2025
Response after Non-Final Action
Jan 08, 2026
Request for Continued Examination
Jan 24, 2026
Response after Non-Final Action
Jan 27, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604676
MEMORY CELL, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS OF MANUFACTURING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12593624
Resistive random access memory structure and manufacturing method thereof
2y 5m to grant Granted Mar 31, 2026
Patent 12593446
SEMICONDUCTOR DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12588219
METAL-DOPED SWITCHING DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12588179
FLY BITLINE DESIGN FOR PSEUDO TRIPLE PORT MEMORY
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
84%
With Interview (+3.2%)
2y 4m
Median Time to Grant
High
PTA Risk
Based on 889 resolved cases by this examiner. Grant probability derived from career allow rate.

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