DETAILED ACTION
Claims 1-2 and 4-5 have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The amended title of the invention is objected to for not being clearly indicative of the claimed invention. A new title is required. The examiner recommends --Sparse Matrix Operation with Mask Bit Expansion when a Program Counter is in a Setting Range for a Loop--.
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections/Recommendations
Claim 1 (and similarly claim 5) is objected to because of the following informalities:
In the last paragraph, replace “belonging not” to --not belonging--.
Claim 4 is objected to because of the following informalities:
In line 2, insert a colon after “comprising”.
The examiner recommends rewording claim 4 to improve readability. The examiner recommends --…comprising: after completing the mask operation corresponding to the plurality of mask bits…corresponding mask bit, releasing each of the different areas of the physical register--.
Appropriate correction is required.
Claim Interpretation
At least one claim is identified as including non-limiting contingent limitations. “The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.” “The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed.” See MPEP 2111.04(II).
Regarding claim 5, since the program counter can only be either in the setting range or not in the setting range, the last two paragraphs are mutually exclusive and, thus, only one of the last two paragraphs is required by the method.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claims recite the following limitations for which there is a lack of antecedent basis:
In claim 1, both instances of “the physical register”. Basis for this has been deleted.
In claim 2, “the plurality of elements in each of the plurality of rows”. There was no previous mention of rows, let along elements in each of the rows.
In claim 2, “the physical register” for similar reasoning given above.
In claim 2, “the one of the plurality of elements”.
In claim 2, “the mask pattern formed by the specified plurality of mask bits. In claim 1, the mask patter is formed by a plurality of mask bits, not the specified plurality in claim 2.
In claim 4, both instances of “the physical register” for similar reasoning given above.
In claim 5, “the different areas”.
In claim 5, both instances of “the physical register” for similar reasoning given above.
Claims 2-4 are rejected due to their dependence on an indefinite claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Frumkin et al. (US 2020/00342632, as previously cited), in view of Maliassov (US 2013/0116993) and the examiner’s taking of Official Notice.
Referring to claim 5, Frumkin has taught an arithmetic processing method comprising:
assigning, in a mask register used for a mask operation, each bit of a plurality of mask bits forming a mask pattern for designating the mask operation to a corresponding bit position within a respective one of a plurality of elements in the mask register, each of the plurality of elements in the mask register corresponding to an element of a sparse matrix (see FIGs.11B and 12C and paragraphs [0012], [0083], [0123], and [0223]-[0241]. A group of bits forming a pattern (e.g. 0x6969 in FIG.12C) are assigned to bit positions in metadata elements of a mask register. Each bit corresponds to an element of a row in a sparse matrix, and is set to indicate whether a corresponding element in the matrix is active/inactive for an operation, e.g. a transpose on the sparse matrix, or a matrix multiply accumulate); and
Frumkin has not taught determining whether a program counter indicates an address belonging to a setting range which is defined for executing a specific loop; and when the program counter indicates an address belonging to the setting range, storing the plurality of mask bits to the different areas of the physical register. However, Frumkin has taught that mask bits are set to ‘1’ for non-zero elements and set to ‘0’ for zero elements (see FIG.12C). Maliassov has taught a process by which a matrix is created by iterating through a series of values, comparing them to a threshold, and setting corresponding matrix values as a result of that comparison (see paragraph 30). One of ordinary skill in the art would have recognized that a similar iterative process could be used to generate the mask in FIG.12C of Frumkin, by comparing matrix A values to ‘0’, for instance, and for any value being ‘0’, a ‘0’ would be set in the mask. Official Notice is taken that implementing an iterative process via a program loop was well known in the art before applicant’s invention. A loop is an efficient piece of program code that is repeated to perform desired functionality for a number of iterations. The loop allows a programmer to not have to physically write the same sequence of code over and over where repeated execution is desired. Thus, a loop can reduce program size. As a result, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Frumkin such that the mask bits are stored to the physical register in response to iterative execution performed by a loop. And, as is known in the art, for loop instructions to execute, a program counter must have an address that corresponds to the loop. As such, in Frumkin, as modified, the mask bits would be set into different areas of a physical register when the program counter (which identifies which instructions to execute) indicates an address belonging to a loop range.
(this limitation is not required by the prior art because it is contingent and, thus, not performed when the program counter does belong to the setting range).
Allowable Subject Matter
Claims 1-2 and 4 are allowed over the prior art.
Response to Arguments
On pages 9-11 of applicant’s response, applicant argues that FIG.9 is correct as illustrated.
The examiner appreciates applicant’s explanation, but it is still not fully understood. Ultimately, the examiner does not understand where pv0 and pv1 are initially set so that they can be used by the STRIDE/GATHER LOADING and Fma instructions in FIG.9. However, the examiner does not see any easy way to fix this if applicant believes it is correct. As such, the objection is withdrawn.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to David J. Huisman whose telephone number is 571-272-4168. The examiner can normally be reached on Monday-Friday, 9:00 am-5:30 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta, can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/David J. Huisman/Primary Examiner, Art Unit 2183