Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
1. Applicant’s arguments, filed June 16th, 2026, with respect to the 35 U.S.C. 101 rejections of the 35 U.S.C. 103 rejections of claims 1-18 have been fully considered and are persuasive in light of the claim amendments. The claim rejections have been withdrawn.
2. Applicant's arguments filed June 16th, 2026, with respect to the rejections of claims 19 and its dependents have been fully considered but they are not persuasive. As the arguments are directed toward limitations of the claims added via amendment, they will be addressed in the rejections below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 19, 20, 22, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Zheng (US 11,822,617) in view of He et al (US 2023/0186979, herein He).
Regarding claim 19, Zheng teaches a random-access memory (RAM) (4:50) comprising:
a first array half including a first analog cell configured to store weights and to process correlations with at least one wire (5:25-55, array of PIM blocks split according to processing mode, 4:55-58, analog PIM cells for processing, 5:19-20, input weights, 9:21-57, 10:66-11:11, kernel weights input to CNN layer to calculate correlation to inputs, PIM array set used for computation); and
a second array half, including a second analog cell configured to store weights and process correlations with at least one wire (4:55-58, analog PIM cells for processing, 5:19-20, input weights), wherein when bit lines in the first array half compute a weight-input correlation and bit lines in the second array half digitize a correlation output (5:25-55, array of PIM blocks split into sets, 5:19-24, 9:21-57, 10:66-11:11, kernel weights input to CNN layer to calculate correlation to inputs, PIM array set used for computation, 4:55-56, PIM block includes analog to digital converter).
Zheng fails to teach wherein the RAM is a static random-access memory (SRAM) or the second array half processes a binary search to digitize the correlation output.
He teaches an SRAM device configured to process a binary search to digitize a correlation output ([0028], SRAM cell, [0023], SRAM cell generates MAC operation results for neural network weights and inputs, [0029-0032], quantization of results to a digital representation by SAR ADC, [0030], binary search).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the teachings of Zheng and He to utilize a binary search for quantizing the analog values into a digital representation. While Zheng does not disclose the implementation details of the ADC used to quantize the neural network outputs, one of ordinary skill in the art would understand that the binary search taught by He is a conventional means of performing analog to digital conversion. As both Zheng and He disclose using RAM cells to perform processing-in-memory operations in a neural network, the combination would merely entail a simple substitution of known prior art elements to achieve predictable results.
Regarding claim 20, the combination of Zheng and He teaches the SRAM according to claim 19, wherein the binary search is a successive approximation-based analog-to-digital converter (He [0030], SAR ADC).
Regarding claim 22, the combination of Zheng and He teaches the SRAM according to claim 19, wherein when bit lines in the second array half compute a weight-input correlation, bit lines in the first array half processes a binary search to digitize a second correlation output (Zheng 5:25-55, array of PIM blocks split into sets, 5:19-24, 9:21-57, 10:66-11:11, kernel weights input to CNN layer to calculate correlation to inputs, PIM array set used for computation, 4:55-56, PIM block includes analog to digital converter & He [0028], SRAM cell, [0023], SRAM cell generates MAC operation results for neural network weights and inputs, [0029-0032], quantization of results to a digital representation by SAR ADC, [0030], binary search).
Regarding claim 23, the combination of Zheng and He teaches the SRAM according to claim 19, wherein the SRAM is further configured to communicate with an adder unit for post-processing (He [0023], add output signals together in post-processing).
Allowable Subject Matter
5. Claims 1-14, 21, and 24 are allowed.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL J METZGER whose telephone number is (571)272-3105. The examiner can normally be reached Monday-Friday 8:30-5.
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/MICHAEL J METZGER/ Primary Examiner, Art Unit 2183
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